Abstract: The present disclosure provides an array substrate, its manufacturing method, and a display apparatus containing the array substrate. The array substrate includes: a substrate; a plurality of gate lines and a plurality of data lines, disposed over the substrate and arranged in rows and columns respectively; and a plurality of pixel regions, each arranged in an area defined by crossing gate lines and data lines and comprising a pixel electrode. The plurality of data lines are configured such that in each pixel region, orthographic projection of any one of the plurality of data lines on the substrate and orthographic projection of a corresponding pixel electrode on the substrate has an overlapping area having a width of ?0 ?m.

Abstract: A food preparation appliance includes a processing mechanism, a thermal element, a sensor positioned to acquire identifying data regarding identifying characteristics of a food product to be processed by the food preparation appliance, and a processing circuit. The processing circuit is configured to receive the identifying data from the sensor, identify a type of the food product based on the identifying data, and automatically set a predefined operating parameter of at least one of the processing mechanism and the thermal element to provide target processing of the food product based on the type and the identifying characteristics.

Abstract: A food pan well includes a base defining an internal cavity and a temperature regulating system disposed within the internal cavity. The temperature regulating system includes an internal enclosure and at least one of a cooling assembly and a warming assembly. The internal enclosure is positioned within the internal cavity. The internal enclosure includes a bottom wall and a sidewall that extends around a periphery of the bottom wall. The bottom wall and the sidewall cooperatively define a temperature regulated cavity. The base is configured to support one or more food pans such that the one or more food pans are selectively suspendable within the temperature regulated cavity. The cooling assembly is positioned to facilitate cooling at least one of the one or more food pans and the warming assembly is positioned to facilitate warming at least one of the one or more food pans.

Abstract: The present a plication discloses an array substrate, a display panel a splay apparatus having the same, and a fabricating method thereof The array substrate includes a base substrate; a first electrode and a second electrode, the first electrode and the second electrode being two different electrodes selected from a pixel electrode and a common electrode; and a thin film transistor including an active layer, an etch stop layer on a side of the active layer distal to the base substrate, a first node, and a second node.

Abstract: The present disclosure provides a gate turn on voltage compensating circuit, a display panel, a driving method and a display apparatus thereof. The gate turn on voltage compensating circuit includes a voltage generation module, a clock control module and a chamfering module. The voltage generation module is used for correspondingly outputting generated first voltage signal and second voltage signal to a first voltage input terminal and a second voltage input terminal of the chamfering module; the clock control module is used for controlling the chamfering module to output corresponding chamfered voltage signals in the corresponding time periods, so that the chamfering depths of gate turn on voltage signals input correspondingly to respective gate drive chips in different time periods are different.

Abstract: A mask plate is disclosed. The mask plate includes a via hole pattern, the via hole pattern includes a body portion and at least two protruding portions extending outward from the body portion; a dimension of the body portion is greater than a resolution dimension of an exposure machine, and each of the protruding portions includes a first protruding portion having a dimension greater than the resolution dimension of the exposure machine. Upon exposure of the mask plate, the protruding portions themselves and zones between adjacent protruding portions form convex portions and concave portions of a via hole, respectively; in this way, a circumstance and also an edge area of the via hole as formed is increased and an electric resistance of the via hole is reduced effectively.

Abstract: A display panel, a display device and a method for repairing a disconnected line. The display panel comprises a lower substrate and a repair circuit. The lower substrate comprises data lines. The repair circuit comprises a proximal repair circuit, a distal repair circuit and an amplifier circuit. An input terminal of the amplifier circuit is electrically connect to a signal input terminal of a disconnected data line, and an output terminal of the amplifier circuit is electrically connect to a terminal of the proximal repair circuit and a terminal of the distal repair circuit respectively; another terminal of the proximal repair circuit is connect to a terminal of the disconnected data line that is close to the signal input terminal, and another terminal of the distal repair circuit is connect to a terminal of the disconnected data line that is away from the signal input terminal.

Abstract: The present invention provides a shift register unit, a gate driving circuit and a display device. The shift register unit comprises a pull-up module, an output module and a pull-down module. The output module comprises a plurality of output lines, and a driving transistor is arranged on each output line. A switching device is arranged on at least one output line and used for turning on or turning off the output line.

Abstract: A method for allocating network data channels is provided. The method includes acquiring performance parameters of each network data channel enabled in a terminal; and according to the performance parameters of each network data channel and requirements of any initiated network service in the terminal, allocating the initiated network service to a corresponding network data channel. A device for allocating network data channels and a terminal are also provided. The method, the device and the terminal allocates a network service to a corresponding network data channel reasonably according to actual requirements of the network service, thus each of a plurality of network services executed simultaneously can provide better user experience.

Abstract: The present application discloses an array substrate, a driving method thereof, and related display apparatus based on an improved dual-gate scheme. The array substrate includes multiple groups each having two columns of pixel electrodes without laying a data line in a gap between the two columns. Each group includes multiple second transistors for pre-charging respective pairs of pixel electrodes having reversed polarities in each corresponding scanning cycle. Before each pixel electrode is charged via a first transistor, turning on the second transistor allows charge sharing between the two pixel electrodes having reversed polarities so that the charging time of each pixel electrodes is substantially reduced and the operation power is saved.

Abstract: The present disclosure provides an array substrate, including: a plurality of gate lines and a plurality of data lines intersecting with one another for defining a plurality of pixel regions, each pixel region including two pixel units, each pixel unit including a pixel electrode; and a common electrode line and a pixel electrode line, the pixel electrode line being electrically connected to the pixel electrode. The common electrode line and at least one pixel electrode line form at least an overlapping area for forming at least one storing capacitor there-between.

Abstract: Disclosed is a thin film transistor, including a gate electrode, a source electrode and a drain electrode. The source electrode includes a loop structure with an opening, and a width of the opening is less than a maximum width of an inner ring of the loop structure of the source electrode in a direction identical to a direction of the width of the opening. The drain electrode is surrounded by the loop structure, and is not in contact with the source electrode. The drain electrode is distant from the inner ring of the loop structure of the source electrode at a same interval.

Abstract: A display substrate, a display apparatus and a production method of the display substrate are provided. The display substrate includes a plurality of pixel units arranged in an array. Each of the pixel units includes: a first electrode; a first connection portion connected with the first electrode; and a first connection line, the first connection portion being connected to the first connection line through a first via hole. The first connection line of at least one of the pixel units is connected with the first connection line of the pixel unit positioned on an upper side of the at least one of the pixel units and the first connection line of the pixel unit positioned on a lower side of the at least one of the pixel units.

Abstract: Embodiments of the present invention provide an array substrate, a display panel and a display apparatus. They relate to the technical field of display technologies and can prevent the peripheral signal wirings of a display region from occupying non-display regions on both sides additionally. In this way, when the array substrate is applied in the display panel, the frame on both sides of the display region on the display panel may be omitted. The array substrate includes: a base substrate; signal lines located in positions on the base substrate corresponding to a display region of the array substrate; a pattern layer, in which the signal lines are arranged; and signal line wirings located between the pattern layer and the base substrate, wherein the signal line wirings are configured to input signals into the signal lines.

Abstract: The present disclosure provides a circuit for processing a voltage of a pixel electrode and a display apparatus. The circuit for processing a voltage of a pixel electrode comprises: a first input terminal configured to input an original voltage of the pixel electrode; a second input terminal configured to input a voltage of a common electrode; and an output terminal configured to output a processed voltage of the pixel electrode, wherein the circuit for processing a voltage of a pixel electrode is configured to superimpose the voltage of the common electrode on the original voltage of the pixel electrode, to acquire a voltage which is stable with respect to the voltage of the common electrode as the processed voltage of the pixel electrode.

Abstract: The present disclosure provides an array substrate comprising a plurality of data lines and a plurality of groups of gate lines, a display panel comprising the array substrate, a display device comprising the display panel and an electronic device comprising the display device. The plurality of data lines and the plurality of groups of gate lines intersect each other for dividing the array substrate into a plurality of pixel units. Each group of gate lines defines a row of a plurality of pixel units and comprises a first gate line and a second gate line. Each pixel unit comprises a first pixel electrode and a second pixel electrode, the first pixel electrode corresponds to the second gate line and the second pixel electrode corresponds to the first gate line.

Abstract: A color filter substrate is provided. The color filter substrate includes an underlying substrate, a first light-shielding structure, a second light-shielding structure and an electrical conductive transparent layer configured for transferring electrostatic charge An outer edge of the first light-shielding structure is spaced apart by a first distance from an outer edge of the non-displaying portion of the underlying substrate. A vertical projection of a non-displaying portion of the underlying substrate on a first plane is entirely covered by a combination of a vertical projection of the first light-shielding structure on the first plane and a vertical projection of the second light-shielding structure on the first plane, the first plane being a plane perpendicular to a propagation direction of light emitted toward the non-displaying region of the color filter substrate.

Abstract: Disclosed are a gate driving apparatus for a pixel array and a driving method therefor. The pixel array includes N gate lines. The gate driving apparatus includes: a plurality of gate drivers, wherein the N gate lines are divided into a plurality of groups, each group includes a plurality of gate lines, each gate driver corresponds to the plurality of groups on a one-to-one basis, and is used for generating a gate driving signal for the plurality of gate lines in the group corresponding thereto; and a driver control module which is used for generating a plurality of driver control signals corresponding to the plurality of gate drivers on a one-to-one basis, and state switching between any two driver control signals has at least a difference of first time, wherein under control of the driver control signals, the gate drivers are switched from first state to second state in sequence.

Abstract: A display substrate, a method for manufacturing the display substrate, and a display device are provided. The display substrate includes a display area and a non-display area surrounding the display area. The non-display area of the display substrate includes a shading pattern, to prevent light from being transmitted through the non-display area.

Abstract: A gate driver, a configuration system, and configuration method thereof, is provided. The gate driver is used for providing a gate drive signal for a TFT array substrate, and comprises at least a drive capability detection module and a drive capability adjustment module. The configuration system is configured to configure the driving capabilities of a plurality of gate drivers, and comprises a controller provided outside the plurality of gate drivers. The driving capability of the gate driver becomes adjustable and configurable. The well balance of the drive capabilities of the drive control signals received by the different TFT array regions driven by the plurality of gate drivers configured by the configuration system can avoid the occurrence of a splitting-screen phenomenon.