Patents by Inventor Fei Wen

Fei Wen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6717208
    Abstract: Disabling flash memory cells to protect their contents, and thus essentially transforming them into read-only memory (ROM) cells, is disclosed. A gate mask and an implant code mask are positioned over a given flash memory cell. A field oxide layer is then fabricated within a substrate layer of the cell through the masks as logically and'ed together. By such fabrication, the flash memory cell is at least partially disabled. The masks are preferably a gate mask and an implant code mask, as these masks typically are already existing and available for use.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: April 6, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Chang Yu, Fei-Wen Cheng
  • Publication number: 20040039974
    Abstract: A method for setting system working frequency includes the steps of: executing assert reset; modulating the system working frequency according to set values of BIOS through a jumper-free IC; deasserting reset and starting CPU; and proceeding and completing subsequent initialization process.
    Type: Application
    Filed: August 26, 2003
    Publication date: February 26, 2004
    Inventors: Fei-Wen Song, Tien-Wei Lin
  • Publication number: 20030228728
    Abstract: Disabling flash memory cells to protect their contents, and thus essentially transforming them into read-only memory (ROM) cells, is disclosed. A gate mask and an implant code mask are positioned over a given flash memory cell. A field oxide layer is then fabricated within a substrate layer of the cell through the masks as logically and'ed together. By such fabrication, the flash memory cell is at least partially disabled. The masks are preferably a gate mask and an implant code mask, as these masks typically are already existing and available for use.
    Type: Application
    Filed: June 11, 2002
    Publication date: December 11, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Chang Yu, Fei-Wen Cheng
  • Patent number: 6541339
    Abstract: A new method is provides for the creation of a hardmask over a layer of polysilicon for the etching of floating gate for split-gate flash memory devices. A layer of gate oxide is created over the surface of a substrate, a layer of polysilicon is deposited over the surface of the layer of gate oxide. In a first embodiment of the invention, a layer of native oxide is grown over the surface of the layer of gate material, this layer of gate oxide is used to enhance oxidation of exposed portions of the layer of gate material. In a second embodiment of the invention, enhanced oxidation of exposed portions of the layer of polysilicon is achieved by modifying the conventional sequence of the oxidation process. This latter modification is realized by modifying the forward motion of the substrates through the oxidation furnace or by modifying the sequence in which the substrates move through the oxidation furnace.
    Type: Grant
    Filed: February 21, 2002
    Date of Patent: April 1, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chih-Hao Lin, Bu-Fang Chen, Fei-Wen Cheng