Abstract: A zero-knowledge CBDC (zkCBDC) banking system uses zero-knowledge proofs to prove that commercial banks are processing transactions correctly. Commercial banks are the provers of the zero-knowledge proof system. The banks generate a zero-knowledge proof for one or more transactions processed by the bank. The banks also generate a hash of the total amount of the transaction(s). The zero-knowledge proof and associated transaction hash are submitted to a blockchain. The blockchain stores a bank state commitment value for each commercial bank in the system and includes a smart contract with code for verifying the zero-knowledge proofs. Once a proof is verified, the bank's state commitment value is updated and the transaction hash is added to the verifier's state.

Abstract: The application discloses a contention-free random access resource indication method, including the following steps: determining, from a random access triggering time, a time different from the random access triggering time by a first interval as a first time, and selecting an RO to carry a preamble at and after the first time, wherein the first interval is a time offset corresponding to a first time offset, the random access triggering time is a time when DCI triggers a random access procedure, and a preamble ID is indicated in DCI. The application further includes a device applying the method. The application solves the problem in an existing method of inadequate preparation time for preamble transmission, and is particularly suitable for a RACH technology of a mobile communication system.

Abstract: A calibration system for a through-casing electromagnetic instrument, includes a casing; multiple coils wound outside the casing for simulating the resistivities of different depth formations respectively when one or more current or voltage signals are applied; a transmitter connected to the multiple coils and configured to provide the voltage or current signal to each of the multiple coils based on a control signal; and a control system in communication with the transmitter. The control system is configured to: generate the control signal based on a resistivity corresponding to the formation and a radial detection range to be simulated; and send the control signal to the transmitter so that the transmitter generates the voltage or current signal based on the control signal. A method for calibrating a through-casing electromagnetic instrument, a control system, a machine-readable storage medium, and a computer program product are also provided.

Abstract: A zero-knowledge CBDC (zkCBDC) banking system uses zero-knowledge proofs to prove that commercial banks are processing transactions correctly. Commercial banks are the provers of the zero-knowledge proof system. The banks generate a zero-knowledge proof for one or more transactions processed by the bank. The banks also generate a hash of the total amount of the transaction(s). The zero-knowledge proof and associated transaction hash are submitted to a blockchain. The blockchain stores a bank state commitment value for each commercial bank in the system and includes a smart contract with code for verifying the zero-knowledge proofs. Once a proof is verified, the bank's state commitment value is updated and the transaction hash is added to the verifier's state.

Abstract: Various solutions for wireless sensing in integrated sensing and communications (ISAC) system are described. An apparatus (e.g., a receiver node) may receive one or more first reference signals (RSs) based on a first sensing RS configuration, and perform a sensing of a target object based on the first RSs. Then, the apparatus may receive one or more second RSs based on a second sensing RS configuration. The second sensing RS configuration is determined by the apparatus or is received from another apparatus in an event that at least one of a sensing requirement and a channel condition is changed. The apparatus may further perform the sensing of the target object based on the second RSs.

Abstract: In some aspects disclosed herein, a GPU based on a sliced GPU architecture includes multiple hardware slices. The GPU further includes a command processor (CP) circuit and an unslice primitive controller (PC_US). Upon receiving a graphics instruction from a central processing unit (CPU), the CP circuit determines a graphics workload, and transmits the graphics workload to the PC_US. The PC_US then partitions the graphics workload into multiple subbatches and distributes each subbatch to a PC_S of a hardware slice for processing.

Abstract: In some aspects disclosed herein, a GPU based on a sliced GPU architecture includes multiple hardware slices. The GPU further includes a command processor (CP) circuit and an unslice primitive controller (PC_US). Upon receiving a graphics instruction from a central processing unit (CPU), the CP circuit determines a graphics workload, and transmits the graphics workload to the PC_US. The PC_US then partitions the graphics workload into multiple subbatches and distributes each subbatch to a PC_S of a hardware slice for processing.

Abstract: Sweet protein mutants, preparation methods, and use thereof are provided. The sweet protein mutant is derived from a sweet protein having an amino acid sequence set forth in SEQ ID NO. 1, the mutation including amino acid mutations relative to SEQ ID NO: 1 selected from at least one of K5D, V7R, D29N, A32K, N44E, or E53R.

Abstract: Sweet protein mutants, preparation methods, and use thereof are provided. The sweet protein mutant is obtained by inducing one or more amino acid mutations in a sweet protein with an amino acid sequence shown in SEQ ID NO. 1, the one or more amino acid mutations including at least one of K5D, V7R, D29N, or E53R. By introducing mutations into the amino acid sequence of the sweet protein, the sweetness of the sweet protein mutant is significantly improved compared with the sweet protein corresponding to the original amino acid sequence.

Abstract: The present invention provides a carbonyl reductase mutant, preparation method and use thereof, and a preparation method of ethyl (R)-6-hydroxy-8-chlorooctanoate. The carbonyl reductase mutant is a carbonyl reductase with amino acid mutation; the carbonyl reductase comprises an amino acid sequence as set forth in SEQ ID NO: 2; the amino acid mutation includes E101V, F214R or E101V/F214R. In the present invention, by introducing mutations on the basis of the original carbonyl reductase sequence, the enzyme activity is improved, the stereoselectivity is improved, and ethyl (R)-6-hydroxy-8-chlorooctanoate can be obtained with high yield and high purity under relatively mild conditions, which reduces the production cost and is suitable for industrial production.

Abstract: A SIM card communication circuit. The circuit includes a processor, a first level conversion apparatus, a first card slot, and an ESIM chip; both an input port of the first level conversion apparatus and the ESIM chip are connected to the processor, and an output port of the first level conversion apparatus is connected to the first card slot; and the processor is configured to: when receiving a first message, control the first level conversion apparatus to be enabled, and control the ESIM chip to be disabled, to implement a connection between the processor and a first physical SIM card in the first card slot; or the processor is configured to: when receiving a second message, control the first level conversion apparatus to be disabled, and control the ESIM chip to be enabled, to implement a connection between the processor and an ESIM card in the ESIM chip.

Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a graphics processor. The apparatus may allocate a memory location in a plurality of memory locations for data for each of a plurality of threads. The apparatus may also align the data for each of the plurality of threads with the allocated memory location if the data is not aligned with the allocated memory location; or refrain from aligning the data for each of the plurality of threads with the allocated memory location if the data is aligned with the allocated memory location. Further, the apparatus may output an indication of the aligned data for each of the plurality of threads or the refrained from aligned data for each of the plurality of threads.

Abstract: A collagen domain, collagen, recombinant collagen expression strain, and applications thereof are provided. The present disclosure performs stability prediction and sequence design for human collagen, obtains a collagen structural domain with high homology with natural human collagen, and directly expresses recombinant human collagen with a triple helix structure in Escherichia coli. Each collagen fragment with high thermal stability designed in the present disclosure is properly folded to form a triple helix structure, while collagen fragments with low thermal stability cannot be properly folded. Additionally, designed recombinant human type I collagen with high thermal stability may self-assemble to form periodic alternating light and dark stripes similar to natural type I collagen.

Abstract: A three-level inverter includes controllable switch components T1 to T6. Each of the controllable switch components includes a parallel connected junction capacitor and an anti-parallel connected diode. A first terminal of T1 is connected to a positive direct current bus, a second terminal of T4 is connected to a negative direct current bus, a second terminal of T1 is connected to first terminals of T2 and T5. A controller is configured to: in a positive half cycle, control T3 to be conducted after T1 is conducted, and control T3 to be disconnected before T1 is conducted next time; and in a negative half cycle, control T2 to be conducted after T4 is conducted, and control T2 to be disconnected before T4 is conducted next time. The three-level inverter can balance voltages of the controllable switch components.

Abstract: An inverter and a control method for the inverter. The inverter includes a direct current conversion circuit, a direct current bus, an inverter circuit, and a controller. An input end of the direct current conversion circuit is connected to an input end of the inverter, an output end of the direct current conversion circuit is connected to an input end of the inverter circuit through the direct current bus, and an output end of the inverter circuit is connected to an output end of the inverter. The controller obtains a reactive voltage control amount based on actual output active power and reference output active power of the inverter circuit and adjusts an output voltage of the inverter circuit based on the reactive voltage control amount and a reference output voltage.

Abstract: A tylosin derivative and a preparation method and application thereof are provided. The tylosin derivative has a structure represented by in Formula 1. A veterinary pharmaceutical composition and a pharmaceutical preparation containing the tylosin derivative, and use of them in treating or preventing bacterial infection diseases in animals are also provided. Moreover, a feed additive including the tylosin derivative is provided.

Abstract: A macrolide compound and a preparation method and application thereof are provided. The macrolide compound has a structure represented by Formula I. A pharmaceutical composition or a veterinary pharmaceutical composition, which includes the macrolide compound with a structure represented by Formula I, is also provided. Moreover, a pharmaceutical preparation, which includes the macrolide compound with a structure represented by Formula I, is provided. The macrolide compound, veterinary pharmaceutical composition and pharmaceutical preparation can be used to treat pathogen infections, especially to treat pathogen infections in animals, with a significant effect.

Abstract: When a frequency of an alternating current power grid has a first frequency, a grid-connected power converter adjusts an output power of a power conversion circuit from a preset reference power to a first power, where the first power is a sum of the preset reference power and a first inertia power. When the frequency of the alternating current power grid has a second frequency, the grid-connected power converter adjusts the output power of the power conversion circuit from the first power to a second power, where the second power is a sum of the first power and a first frequency regulation power, and an absolute value of a difference between the second frequency and a utility frequency of the alternating current power grid is greater than an absolute value of a difference between the first frequency and the utility frequency of the alternating current power grid.

Abstract: The present disclosure discloses a silicon wafer side edge detection device, comprising a first detection unit and a second detection unit, wherein the first detection unit and the second detection unit are of the same structure and are respectively configured to detect two mutually parallel side edges of a silicon wafer; and the first detection unit and the second detection unit each comprises a side edge detection assembly, the side edge detection assembly comprising a first point light source, a first optical path defining element, and a camera, wherein the first optical path defining element comprises a reflective structure and a slit, the reflective structure is configured to reflect light emitted by the first point light source and reflect the light to a side edge of a silicon wafer to be detected, and the light is reflected by the side edge of the silicon wafer.

Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a UE. The UE receives, from a base station, a configuration specifying an initial aggregated bandwidth W0 carried on C0 component carriers on which a reception unit (RXU) of the UE is to receive signals. The UE determines a total bandwidth WTOT on which the UE is capable of receiving signals. The UE determines, based on WTOT and W0, an initial hardware limit of Q0? RXUs that the UE is allowed to activate concurrently. The UE determines an adjusted aggregated bandwidth W1 carried on C1 component carriers on which an RXU of the UE is to receive signals based on a channel condition between the UE and the base station.