Abstract: The object of the present invention is to provide linked stacks of reduced graphene, in which excellent electrical property on the surface of graphene may be utilized, a method for producing the same, powder comprising the same, and film comprising the same. The object may be solved by using linked stacks of partly reduced graphene 11 comprising two or more stacks of partly reduced graphene 21 to 24 linked together, in which the stack of partly reduced graphene 21 has two or more sheets of partly reduced graphene 31 and a nanosubstance 32 held between the sheets of partly reduced graphene 31, the partly reduced graphene 31 has no carbonyl groups and has carboxyl groups 31a and hydroxyl groups 31b, and different stacks of partly reduced graphene 21 to 24 are linked to each other by an ester bond 34.

Abstract: A method, a wearable device, and an apparatus for monitoring sleep of a user are provided. The method includes: determining an activity amount of a user based on multi-axial acceleration data received by the wearable device in a time period, in which the multi-axial acceleration data includes acceleration data in multiple axes; if the activity amount is smaller than a first threshold, determining a microactivity feature value using the multi-axial acceleration data and predetermined weights; and determining a microactivity state for the user in the time period based on the microactivity feature value, in which the activity amount of the user is substantially zero in the microactivity state.

Abstract: A manufacturing method of an alignment layer and a manufacturing method of a display substrate are provided. The manufacturing method of the alignment layer includes: providing a display substrate on which a patterned structure is formed; applying the entire display substrate with wetting fluid, wherein the wetting fluid can be fused with alignment liquid; transferring the alignment liquid on the display substrate applied with the wetting fluid by a transfer roller; and curing the alignment liquid to form an alignment layer. The manufacturing method is used for producing the alignment layer on the display substrate.

Abstract: A torque distribution method for an engine and a motor of an energy-efficient hybrid electric vehicle comprises the following steps: providing an offline specific fuel consumption map of the engine in all operating states; enabling the engine and motor to respond to the required torque T during travelling together, the motor and the engine working in cooperation at the same rotational speed so as to achieve the optimal working efficiency; acquiring a current state of charge (SOC) of the vehicle battery, and distributing the engine torque T and the motor torque T according to the following situation: if the SOC is greater than a first preset value, entering a first distribution mode; if the SOC is less than a second preset value, enter a second distribution mode; and otherwise, maintaining the current working state.

Abstract: A dual motor power system for a pure electric vehicle and a control method thereof are disclosed, wherein within a range defined between upper and lower torque thresholds for the operations of one of the two motors under current vehicle speed, the torque of this motor is changed stepwise with a certain torque step; the required torque of the other motor is determined based on the torque distribution relation of the first and second motors; and the synchronized efficiency of the power system is determined based on the torques of the first and second motors so that the optimal synchronized efficiency of the power system is ergodically searched out, and the optimal working points of the two motors and the corresponding gear of the second motor are determined then.

Abstract: Provided are a method and device for controlling transmitting power. According to the method, when it is detected that a target object approaches a mobile terminal, a position, which the target object approaches, on the mobile terminal is determined, and an optimal sensing area for a Specific Absorption Rate (SAR) reducing antenna of the mobile terminal to sense a movement of the target object is selected according to the position; movement information of the target object is acquired by sensing the movement of the target object in the optimal sensing area by the SAR reducing antenna, and the transmitting power of the mobile terminal is controlled according to the movement information. The technical solution can improve the sensing distance and range of the SAR reducing antenna, namely, improve the sensitivity of the SAR reducing antenna.

Abstract: Disclosed are an oligonucleotide primer with an omega structure for detecting short-chain RNAs and the use thereof. The primer from the 5? end to the 3? end sequentially is: a PCR primer target region of 20-30 bases, a variable coding region of 0-50 bases, an omega stem-loop, a probe spacer of at least one base and a probe region of 4-11 bases. The length of the stem of the omega stem-loop is 4-12 paired bases, and the length of the loop of the omega stem-loop is 3-20 unpaired bases.

Abstract: A torque distribution method for an engine and a motor of an energy-efficient hybrid electric vehicle comprises the following steps: providing an offline specific fuel consumption map of the engine in all operating states; enabling the engine and motor to respond to the required torque T during travelling together, the motor and the engine working in cooperation at the same rotational speed so as to achieve the optimal working efficiency; acquiring a current state of charge (SOC) of the vehicle battery, and distributing the engine torque T and the motor torque T according to the following situation: if the SOC is greater than a first preset value, entering a first distribution mode; if the SOC is less than a second preset value, enter a second distribution mode; and otherwise, maintaining the current working state.

Abstract: The object of the present invention is to provide linked stacks of reduced graphene, in which excellent electrical property on the surface of graphene may be utilized, a method for producing the same, powder comprising the same, and film comprising the same. The object may be solved by using linked stacks of partly reduced graphene 11 comprising two or more stacks of partly reduced graphene 21 to 24 linked together, in which the stack of partly reduced graphene 21 has two or more sheets of partly reduced graphene 31 and a nanosubstance 32 held between the sheets of partly reduced graphene 31, the partly reduced graphene 31 has no carbonyl groups and has carboxyl groups 31a and hydroxyl groups 31b, and different stacks of partly reduced graphene 21 to 24 are linked to each other by an ester bond 34.

Abstract: A resistive switching memory device and a method for operating the same are disclosed. The device includes a plurality of resistive switching memory units arranged in a matrix, each of which includes a switching element and a resistive switching device, and the switching element being connected to a word line at its control terminal, to the resistive switching device at one terminal, and to a bit line at the other terminal; a word line decoder adapted to decode an input address signal to switch on the switching element in at least one of resistive switching memory units; and a driving circuit adapted to apply a voltage pulse whose front edge changes slowly across the resistive switching device by the bit line synchronously with the switching-on of the switching element.

Abstract: Disclosed are an oligonucleotide primer with an omega structure for detecting short-chain RNAs and the use thereof. The primer from the 5? end to the 3? end sequentially is: a PCR primer target region of 20-30 bases, a variable coding region of 0-50 bases, an omega stem-loop, a probe spacer of at least one base and a probe region of 4-11 bases. The length of the stem of the omega stem-loop is 4-12 paired bases, and the length of the loop of the omega stem-loop is 3-20 unpaired bases.

Abstract: The present disclosure provides a resistive-switching device capable of implementing multiary addition operation and a method for implementing multiary addition operation using the resistive-switching device. The resistive-switching device has a plurality of resistance values each corresponding to a respective data value stored by the resistive-switching device and ranging from a high resistance value to a low resistance value. The data value stored by the resistive-switching device is increased by ‘1’ successively with a series of set pulses having a same pulse width and a same voltage amplitude being applied thereto. The data value stored by the resistive-switching device is set to ‘0’ with a reset pulse being applied thereto, and meanwhile a data value stored by a higher-bit resistive-switching device is increased by ‘1’ with a set pulse being applied thereto. In this way, multiary addition operation is implemented.

Abstract: A neuron device includes a bottom electrode, a top electrode, and a layer of metal oxide variable resistance material sandwiched between the bottom electrode and the top electrode, in which the neuron device is switched to a normal state upon application of reset pulse, and is switched to an excitation state upon application of stimulus pulses. The neuron device has a comprehensive response to different amplitude, different width of a stimulus voltage pulse and different number of a sequence of stimulus pulses, and provides functionalities of a weighting section and a computing section. The neuron device has a simple structure, excellent scalability, quick speed, low operation voltage, and is compatible with the conventional silicon-based CMOS fabrication process, and thus suitable for mass production. The neuron device is capable of performing many biological functions and complex logic operations.

Abstract: A resistive switching memory device and a method for operating the same are disclosed. The device includes a plurality of resistive switching memory units arranged in a matrix, each of which includes a switching element and a resistive switching device, and the switching element being connected to a word line at its control terminal, to the resistive switching device at one terminal, and to a bit line at the other terminal; a word line decoder adapted to decode an input address signal to switch on the switching element in at least one of resistive switching memory units; and a driving circuit adapted to apply a voltage pulse whose front edge changes slowly across the resistive switching device by the bit line synchronously with the switching-on of the switching element.

Abstract: A multi-channel SPI interface memory controller disposed between a CPU and a multi-channel SPI interface memory is provided in the present invention. The multi-channel SPI interface memory controller comprises: a data path interface coupled to a bus of the CPU; a control path interface coupled to the bus of the CPU; a master controller coupled to the multi-channel SPI interface memory; a register bank disposed between the master controller and the control path interface, wherein the master controller is in signal coupling with the data path interface, and in signal coupling through the register bank with the control path interface. The inventive multi-channel SPI interface memory controller can support direct execution of a program on the SPI interface memory.

Abstract: The present disclosure provides a resistive-switching device capable of implementing multiary addition operation and a method for implementing multiary addition operation using the resistive-switching device. The resistive-switching device has a plurality of resistance values each corresponding to a respective data value stored by the resistive-switching device and ranging from a high resistance value to a low resistance value. The data value stored by the resistive-switching device is increased by ‘1’ successively with a series of set pulses having a same pulse width and a same voltage amplitude being applied thereto. The data value stored by the resistive-switching device is set to ‘0’ with a reset pulse being applied thereto, and meanwhile a data value stored by a higher-bit resistive-switching device is increased by ‘1’ with a set pulse being applied thereto. In this way, multiary addition operation is implemented.

Abstract: A neuron device includes a bottom electrode, a top electrode, and a layer of metal oxide variable resistance material sandwiched between the bottom electrode and the top electrode, in which the neuron device is switched to a normal state upon application of reset pulse, and is switched to an excitation state upon application of stimulus pulses. The neuron device has a comprehensive response to different amplitude, different width of a stimulus voltage pulse and different number of a sequence of stimulus pulses, and provides functionalities of a weighting section and a computing section. The neuron device has a simple structure, excellent scalability, quick speed, low operation voltage, and is compatible with the conventional silicon-based CMOS fabrication process, and thus suitable for mass production. The neuron device is capable of performing many biological functions and complex logic operations.

Abstract: A multi-channel SPI interface memory controller disposed between a CPU and a multi-channel SPI interface memory is provided in the present invention. The multi-channel SPI interface memory controller comprises: a data path interface coupled to a bus of the CPU; a control path interface coupled to the bus of the CPU; a master controller coupled to the multi-channel SPI interface memory; a register bank disposed between the master controller and the control path interface, wherein the master controller is in signal coupling with the data path interface, and in signal coupling through the register bank with the control path interface. The inventive multi-channel SPI interface memory controller can support direct execution of a program on the SPI interface memory.