Patents by Inventor Felix Zandman
Felix Zandman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8319598Abstract: A power resistor includes first and second opposite terminations, a resistive element formed from a plurality of resistive element segments between the first and second opposite terminations, at least one segmenting conductive strip separating two of the resistive element segments, and at least one open area between the first and second opposite terminations and separating at least two resistive element segments. Separation of the plurality of resistive element segments assists in spreading heat throughout the power resistor. The power resistor or other electronic component may be packaged by bonding to a heat sink tab with a thermally conductive and electrically insulative material.Type: GrantFiled: November 19, 2010Date of Patent: November 27, 2012Assignee: Vishay Dale Electronics, Inc.Inventors: Felix Zandman, Clark L. Smith, Todd L. Wyatt, Thomas L. Veik, Thomas L. Bertsch
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Publication number: 20120112874Abstract: On the track of a potentiometer a resistive path of thin film is deposited or a foil is bonded to a matched substrate and a parallel path is formed of discrete contact straps extending from the resistive path. The resistive path has a protecting coating and the wiper is moving on abrasion resistant contact straps. This design enables application of high precision and stability resistor technologies in the production of variable resistors destined for long service life. It enables also, in high precision applications, by maintaining the linearity of the output versus input function, a two-wire connection to the variable resistor used as a position sensor.Type: ApplicationFiled: February 17, 2009Publication date: May 10, 2012Applicant: VISHAY ISRAEL LTD.Inventors: Joseph Szwarc, Jean-Michel Lanot, Felix Zandman
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Patent number: 8161829Abstract: A methodology for selecting and properly placing foil strain gages on a transducer in a Wheatstone bridge, which provides a more consistent creep response, especially when the transducer temperature is changed. A transducer includes a counterforce subjected to a predetermined physical load that provides tension and compression strains (positive and negative, respectively). The transducer also includes a plurality of strain gage grids that are operatively attached to the counterforce in the tension and compression strain areas of the counterforce and generate electrical signals. The plurality of strain gages are electrically connected in a Wheatstone bridge circuit where their electrical signals due to creep are cancelled.Type: GrantFiled: July 28, 2010Date of Patent: April 24, 2012Assignee: Vishay Precision Group, Inc.Inventors: Felix Zandman, Robert B. Watson, Thomas P. Kieffer
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Publication number: 20110063071Abstract: A power resistor includes first and second opposite terminations, a resistive element formed from a plurality of resistive element segments between the first and second opposite terminations, at least one segmenting conductive strip separating two of the resistive element segments, and at least one open area between the first and second opposite terminations and separating at least two resistive element segments. Separation of the plurality of resistive element segments assists in spreading heat throughout the power resistor. The power resistor or other electronic component may be packaged by bonding to a heat sink tab with a thermally conductive and electrically insulative material.Type: ApplicationFiled: November 19, 2010Publication date: March 17, 2011Applicant: VISHAY DALE ELECTRONICS, INC.Inventors: FELIX ZANDMAN, CLARK L. SMITH, TODD L. WYATT, THOMAS L. VEIK, THOMAS L. BERTSCH
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Publication number: 20110023630Abstract: A methodology for selecting and properly placing foil strain gages on a transducer in a Wheatstone bridge, which provides a more consistent creep response, especially when the transducer temperature is changed. A transducer includes a counterforce subjected to a predetermined physical load that provides tension and compression strains (positive and negative, respectively). The transducer also includes a plurality of strain gage grids that are operatively attached to the counterforce in the tension and compression strain areas of the counterforce and generate electrical signals. The plurality of strain gages are electrically connected in a Wheatstone bridge circuit where their electrical signals due to creep are cancelled.Type: ApplicationFiled: July 28, 2010Publication date: February 3, 2011Applicant: VISHAY PRECISION GROUP, INC.Inventors: Felix Zandman, Robert B. Watson, Thomas P. Kieffer
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Patent number: 7843309Abstract: A resistor includes first and second opposite terminations, a resistive element formed from a plurality of resistive element segments between the first and second opposite terminations, at least one segmenting conductive strip separating two of the resistive element segments, and at least one open area between the first and second opposite terminations and separating at least two resistive element segments. Separation of the plurality of resistive element segments assists in spreading heat throughout the resistor. The resistor or other electronic component may be packaged by bonding to a heat sink tab with a thermally conductive and electrically insulative material. The resistive element may be a metal strip, a foil, or film material.Type: GrantFiled: September 27, 2007Date of Patent: November 30, 2010Assignee: Vishay Dale Electronics, Inc.Inventors: Felix Zandman, Clark L. Smith, Todd L. Wyatt, Thomas L. Veik, Thomas L. Bertsch
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Publication number: 20090278179Abstract: A semiconductor package has contacts on both sides of the dice on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice expose the metal plate without extending through the metal plate. A metal layer may be formed on the front side of the dice, covering the exposed portions of the metal plate and extending to side edges of the dice. The metal layer may cover connection pads on the front side of the dice. A second set of scribe lines are made coincident with the first set. Therefore, the metal layer remains on the side edges of the dice coupling the front and the back. As a result, the package is rugged and provides a low-resistance electrical connection between the back and front sides of the dice.Type: ApplicationFiled: July 20, 2009Publication date: November 12, 2009Applicant: VISHAY-SILICONIXInventors: Felix Zandman, Y. Mohammed Kasem, Yueh Se Ho
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Patent number: 7589396Abstract: A semiconductor package with contacts on both sides of the dice on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice expose the metal plate without extending through the metal plate. A metal layer may be formed on the front side of the dice, covering the exposed portions of the metal plate and extending to side edges of the dice. The metal layer may cover connection pads on the front side of the dice. A second set of scribe lines are made coincident with the first set. Therefore, the metal layer remains on the side edges of the dice coupling the front and the back. As a result, the package is rugged and provides a low-resistance electrical connection between the back and front sides of the dice.Type: GrantFiled: April 10, 2007Date of Patent: September 15, 2009Assignee: Vishay-SiliconixInventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
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Publication number: 20090085715Abstract: A resistor includes first and second opposite terminations, a resistive element formed from a plurality of resistive element segments between the first and second opposite terminations, at least one segmenting conductive strip separating two of the resistive element segments, and at least one open area between the first and second opposite terminations and separating at least two resistive element segments. Separation of the plurality of resistive element segments assists in spreading heat throughout the resistor. The resistor or other electronic component may be packaged by bonding to a heat sink tab with a thermally conductive and electrically insulative material. The resistive element may be a metal strip, a foil, or film material.Type: ApplicationFiled: September 27, 2007Publication date: April 2, 2009Applicant: VISHAY DALE ELECTRONICS, INC.Inventors: Felix Zandman, Clark L. Smith, Todd L. Wyatt, Thomas L. Veik, Thomas L. Bertsch
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Publication number: 20070235774Abstract: A semiconductor package with contacts on both sides of the dice on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice expose the metal plate without extending through the metal plate. A metal layer may be formed on the front side of the dice, covering the exposed portions of the metal plate and extending to side edges of the dice. The metal layer may cover connection pads on the front side of the dice. A second set of scribe lines are made coincident with the first set. Therefore, the metal layer remains on the side edges of the dice coupling the front and the back. As a result, the package is rugged and provides a low-resistance electrical connection between the back and front sides of the dice.Type: ApplicationFiled: April 11, 2007Publication date: October 11, 2007Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
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Patent number: 7211877Abstract: A semiconductor package by which contacts are made to both sides of the dice is manufactured on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice are saw cut to expose the metal plate but the cuts do not extend through the metal plate. A metal layer, which may include a number of sublayers, is formed on the front side of the dice, the metal covering the exposed portions of the metal plate and extending the side edges of the dice. Separate sections of the metal layer may also cover connection pads on the front side of the dice. A second set of saw cuts are made coincident with the first set of saw cuts, using a blade that is narrower than the blade used to make the first set of saw cuts. As a result, the metal layer remains on the side edges of the dice connecting the back and front sides of the dice (via the metal plate).Type: GrantFiled: March 15, 2005Date of Patent: May 1, 2007Assignee: Vishay-SiliconixInventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
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Patent number: 6876061Abstract: A semiconductor package by which contacts are made to both sides of the dice is manufactured on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice are saw cut to expose the metal plate but the cuts do not extend through the metal plate. A metal layer, which may include a number of sublayers, is formed on the front side of the dice, the metal covering the exposed portions of the metal plate and extending the side edges of the dice. Separate sections of the metal layer may also cover connection pads on the front side of the dice. A second set of saw cuts are made coincident with the first set of saw cuts, using a blade that is narrower than the blade used to make the first set of saw cuts. As a result, the metal layer remains on the side edges of the dice connecting the back and front sides of the dice (via the metal plate).Type: GrantFiled: May 28, 2002Date of Patent: April 5, 2005Assignee: Vishay Intertechnology, Inc.Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
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Patent number: 6562647Abstract: A semiconductor package by which contacts are made to both sides of the dice is manufactured on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice are saw cut to expose the metal plate but the cuts do not extend through the metal plate. A metal layer, which may include a number of sublayers, is formed on the front side of the dice, the metal covering the exposed portions of the metal plate and extending the side edges of the dice. Separate sections of the metal layer may also cover connection pads on the front side of the dice. A second set of saw cuts are made coincident with the first set of saw cuts, using a blade that is narrower than the blade used to make the first set of saw cuts. As a result, the metal layer remains on the side edges of the dice connecting the back and front sides of the dice (via the metal plate).Type: GrantFiled: April 26, 2001Date of Patent: May 13, 2003Assignee: Vishay Intertechnology, Inc.Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
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Publication number: 20020185710Abstract: A semiconductor package by which contacts are made to both sides of the dice is manufactured on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice are saw cut to expose the metal plate but the cuts do not extend through the metal plate. A metal layer, which may include a number of sublayers, is formed on the front side of the dice, the metal covering the exposed portions of the metal plate and extending the side edges of the dice. Separate sections of the metal layer may also cover connection pads on the front side of the dice. A second set of saw cuts are made coincident with the first set of saw cuts, using a blade that is narrower than the blade used to make the first set of saw cuts. As a result, the metal layer remains on the side edges of the dice connecting the back and front sides of the dice (via the metal plate).Type: ApplicationFiled: May 28, 2002Publication date: December 12, 2002Applicant: Vishay Intertechnology, Inc.Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
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Patent number: 6441475Abstract: This semiconductor surface mount package is relatively inexpensive to produce and has a footprint that is essentially the same size as the die. A conductive substrate is attached to the back side of a wafer and is in electrical contact with a terminal on the back side of each die in the wafer. A nonconductive overcoat is formed and patterned on the front side of the wafer, leaving a portion of the passivation layer and the connection pads for the dice exposed, each of the connection pads being coated with a solderable metal layer. The assembly is then sawed in perpendicular directions along the scribe lines between the dice, but the saw cuts do not extend all the way through the substrate, which remains intact at its back side. The parallel cuts in one direction are broken to produce die strips which are mounted, sandwich-like, in a stack, with one side of the strips exposed.Type: GrantFiled: December 8, 2000Date of Patent: August 27, 2002Assignee: Vishay Intertechnology, Inc.Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
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Patent number: 6316287Abstract: A package for a semiconductor device is formed by a process which includes forming a metal layer in contact with a connection pad on the front side of a semiconductor die while the die is still a part of a wafer. The metal layer extends into the scribe line between the die and an adjacent die. A nonconductive cap is attached to the front side of the wafer, and the wafer is ground from its back side to reduce its thickness. A cut is made from the back side of the wafer, preferably by sawing and etching, to expose the metal layer. A nonconductive layer is formed on the back side of the wafer and a second metal layer is deposited over the nonconductive layer, the second metal layer extending into the scribe line where it makes contact with the first metal layer through an opening in the nonconductive layer. Preferably, a solder post is formed on the second metal layer to allow the finished package to be mounted on a printed circuit board.Type: GrantFiled: September 13, 1999Date of Patent: November 13, 2001Assignee: Vishay Intertechnology, Inc.Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
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Publication number: 20010016369Abstract: A semiconductor package by which contacts are made to both sides of the dice is manufactured on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice are saw cut to expose the metal plate but the cuts do not extend through the metal plate. A metal layer, which may include a number of sublayers, is formed on the front side of the dice, the metal covering the exposed portions of the metal plate and extending the side edges of the dice. Separate sections of the metal layer may also cover connection pads on the front side of the dice. A second set of saw cuts are made coincident with the first set of saw cuts, using a blade that is narrower than the blade used to make the first set of saw cuts. As a result, the metal layer remains on the side edges of the dice connecting the back and front sides of the dice (via the metal plate).Type: ApplicationFiled: April 26, 2001Publication date: August 23, 2001Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
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Patent number: 6271060Abstract: This semiconductor surface mount package is relatively inexpensive to produce and has a footprint that is essentially the same size as the die. A conductive substrate is attached to the back side of a wafer and is in electrical contact with a terminal on the back side of each die in the wafer. A nonconductive overcoat is formed and patterned on the front side of the wafer, leaving a portion of the passivation layer and the connection pads for the dice exposed, each of the connection pads being coated with a solderable metal layer. The assembly is then sawed in perpendicular directions along the scribe lines between the dice, but the saw cuts do not extend all the way through the substrate, which remains intact at its back side. The parallel cuts in one direction are broken to produce die strips which are mounted, sandwich-like, in a stack, with one side of the strips exposed.Type: GrantFiled: September 13, 1999Date of Patent: August 7, 2001Assignee: Vishay Intertechnology, Inc.Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
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Publication number: 20010009298Abstract: A package for a semiconductor device is formed by a process which includes forming a metal layer in contact with a connection pad on the front side of a semiconductor die while the die is still a part of a wafer. The metal layer extends into the scribe line between the die and an adjacent die. A nonconductive cap is attached to the front side of the wafer, and the wafer is ground from its back side to reduce its thickness. A cut is made from the back side of the wafer, preferably by sawing and etching, to expose the metal layer. A nonconductive layer is formed on the back side of the wafer and a second metal layer is deposited over the nonconductive layer, the second metal layer extending into the scribe line where it makes contact with the first metal layer through an opening in the nonconductive layer. Preferably, a solder post is formed on the second metal layer to allow the finished package to be mounted on a printed circuit board.Type: ApplicationFiled: February 23, 2001Publication date: July 26, 2001Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
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Publication number: 20010000631Abstract: This semiconductor surface mount package is relatively inexpensive to produce and has a footprint that is essentially the same size as the die. A conductive substrate is attached to the back side of a wafer and is in electrical contact with a terminal on the back side of each die in the wafer. A nonconductive overcoat is formed and patterned on the front side of the wafer, leaving a portion of the passivation layer and the connection pads for the dice exposed, each of the connection pads being coated with a solderable metal layer. The assembly is then sawed in perpendicular directions along the scribe lines between the dice, but the saw cuts do not extend all the way through the substrate, which remains intact at its back side. The parallel cuts in one direction are broken to produce die strips which are mounted, sandwich-like, in a stack, with one side of the strips exposed.Type: ApplicationFiled: December 8, 2000Publication date: May 3, 2001Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho