Patents by Inventor Felix Zandman

Felix Zandman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8319598
    Abstract: A power resistor includes first and second opposite terminations, a resistive element formed from a plurality of resistive element segments between the first and second opposite terminations, at least one segmenting conductive strip separating two of the resistive element segments, and at least one open area between the first and second opposite terminations and separating at least two resistive element segments. Separation of the plurality of resistive element segments assists in spreading heat throughout the power resistor. The power resistor or other electronic component may be packaged by bonding to a heat sink tab with a thermally conductive and electrically insulative material.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: November 27, 2012
    Assignee: Vishay Dale Electronics, Inc.
    Inventors: Felix Zandman, Clark L. Smith, Todd L. Wyatt, Thomas L. Veik, Thomas L. Bertsch
  • Publication number: 20120112874
    Abstract: On the track of a potentiometer a resistive path of thin film is deposited or a foil is bonded to a matched substrate and a parallel path is formed of discrete contact straps extending from the resistive path. The resistive path has a protecting coating and the wiper is moving on abrasion resistant contact straps. This design enables application of high precision and stability resistor technologies in the production of variable resistors destined for long service life. It enables also, in high precision applications, by maintaining the linearity of the output versus input function, a two-wire connection to the variable resistor used as a position sensor.
    Type: Application
    Filed: February 17, 2009
    Publication date: May 10, 2012
    Applicant: VISHAY ISRAEL LTD.
    Inventors: Joseph Szwarc, Jean-Michel Lanot, Felix Zandman
  • Patent number: 8161829
    Abstract: A methodology for selecting and properly placing foil strain gages on a transducer in a Wheatstone bridge, which provides a more consistent creep response, especially when the transducer temperature is changed. A transducer includes a counterforce subjected to a predetermined physical load that provides tension and compression strains (positive and negative, respectively). The transducer also includes a plurality of strain gage grids that are operatively attached to the counterforce in the tension and compression strain areas of the counterforce and generate electrical signals. The plurality of strain gages are electrically connected in a Wheatstone bridge circuit where their electrical signals due to creep are cancelled.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: April 24, 2012
    Assignee: Vishay Precision Group, Inc.
    Inventors: Felix Zandman, Robert B. Watson, Thomas P. Kieffer
  • Publication number: 20110063071
    Abstract: A power resistor includes first and second opposite terminations, a resistive element formed from a plurality of resistive element segments between the first and second opposite terminations, at least one segmenting conductive strip separating two of the resistive element segments, and at least one open area between the first and second opposite terminations and separating at least two resistive element segments. Separation of the plurality of resistive element segments assists in spreading heat throughout the power resistor. The power resistor or other electronic component may be packaged by bonding to a heat sink tab with a thermally conductive and electrically insulative material.
    Type: Application
    Filed: November 19, 2010
    Publication date: March 17, 2011
    Applicant: VISHAY DALE ELECTRONICS, INC.
    Inventors: FELIX ZANDMAN, CLARK L. SMITH, TODD L. WYATT, THOMAS L. VEIK, THOMAS L. BERTSCH
  • Publication number: 20110023630
    Abstract: A methodology for selecting and properly placing foil strain gages on a transducer in a Wheatstone bridge, which provides a more consistent creep response, especially when the transducer temperature is changed. A transducer includes a counterforce subjected to a predetermined physical load that provides tension and compression strains (positive and negative, respectively). The transducer also includes a plurality of strain gage grids that are operatively attached to the counterforce in the tension and compression strain areas of the counterforce and generate electrical signals. The plurality of strain gages are electrically connected in a Wheatstone bridge circuit where their electrical signals due to creep are cancelled.
    Type: Application
    Filed: July 28, 2010
    Publication date: February 3, 2011
    Applicant: VISHAY PRECISION GROUP, INC.
    Inventors: Felix Zandman, Robert B. Watson, Thomas P. Kieffer
  • Patent number: 7843309
    Abstract: A resistor includes first and second opposite terminations, a resistive element formed from a plurality of resistive element segments between the first and second opposite terminations, at least one segmenting conductive strip separating two of the resistive element segments, and at least one open area between the first and second opposite terminations and separating at least two resistive element segments. Separation of the plurality of resistive element segments assists in spreading heat throughout the resistor. The resistor or other electronic component may be packaged by bonding to a heat sink tab with a thermally conductive and electrically insulative material. The resistive element may be a metal strip, a foil, or film material.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: November 30, 2010
    Assignee: Vishay Dale Electronics, Inc.
    Inventors: Felix Zandman, Clark L. Smith, Todd L. Wyatt, Thomas L. Veik, Thomas L. Bertsch
  • Publication number: 20090278179
    Abstract: A semiconductor package has contacts on both sides of the dice on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice expose the metal plate without extending through the metal plate. A metal layer may be formed on the front side of the dice, covering the exposed portions of the metal plate and extending to side edges of the dice. The metal layer may cover connection pads on the front side of the dice. A second set of scribe lines are made coincident with the first set. Therefore, the metal layer remains on the side edges of the dice coupling the front and the back. As a result, the package is rugged and provides a low-resistance electrical connection between the back and front sides of the dice.
    Type: Application
    Filed: July 20, 2009
    Publication date: November 12, 2009
    Applicant: VISHAY-SILICONIX
    Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh Se Ho
  • Patent number: 7589396
    Abstract: A semiconductor package with contacts on both sides of the dice on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice expose the metal plate without extending through the metal plate. A metal layer may be formed on the front side of the dice, covering the exposed portions of the metal plate and extending to side edges of the dice. The metal layer may cover connection pads on the front side of the dice. A second set of scribe lines are made coincident with the first set. Therefore, the metal layer remains on the side edges of the dice coupling the front and the back. As a result, the package is rugged and provides a low-resistance electrical connection between the back and front sides of the dice.
    Type: Grant
    Filed: April 10, 2007
    Date of Patent: September 15, 2009
    Assignee: Vishay-Siliconix
    Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
  • Publication number: 20090085715
    Abstract: A resistor includes first and second opposite terminations, a resistive element formed from a plurality of resistive element segments between the first and second opposite terminations, at least one segmenting conductive strip separating two of the resistive element segments, and at least one open area between the first and second opposite terminations and separating at least two resistive element segments. Separation of the plurality of resistive element segments assists in spreading heat throughout the resistor. The resistor or other electronic component may be packaged by bonding to a heat sink tab with a thermally conductive and electrically insulative material. The resistive element may be a metal strip, a foil, or film material.
    Type: Application
    Filed: September 27, 2007
    Publication date: April 2, 2009
    Applicant: VISHAY DALE ELECTRONICS, INC.
    Inventors: Felix Zandman, Clark L. Smith, Todd L. Wyatt, Thomas L. Veik, Thomas L. Bertsch
  • Publication number: 20070235774
    Abstract: A semiconductor package with contacts on both sides of the dice on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice expose the metal plate without extending through the metal plate. A metal layer may be formed on the front side of the dice, covering the exposed portions of the metal plate and extending to side edges of the dice. The metal layer may cover connection pads on the front side of the dice. A second set of scribe lines are made coincident with the first set. Therefore, the metal layer remains on the side edges of the dice coupling the front and the back. As a result, the package is rugged and provides a low-resistance electrical connection between the back and front sides of the dice.
    Type: Application
    Filed: April 11, 2007
    Publication date: October 11, 2007
    Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
  • Patent number: 7211877
    Abstract: A semiconductor package by which contacts are made to both sides of the dice is manufactured on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice are saw cut to expose the metal plate but the cuts do not extend through the metal plate. A metal layer, which may include a number of sublayers, is formed on the front side of the dice, the metal covering the exposed portions of the metal plate and extending the side edges of the dice. Separate sections of the metal layer may also cover connection pads on the front side of the dice. A second set of saw cuts are made coincident with the first set of saw cuts, using a blade that is narrower than the blade used to make the first set of saw cuts. As a result, the metal layer remains on the side edges of the dice connecting the back and front sides of the dice (via the metal plate).
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: May 1, 2007
    Assignee: Vishay-Siliconix
    Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
  • Patent number: 6876061
    Abstract: A semiconductor package by which contacts are made to both sides of the dice is manufactured on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice are saw cut to expose the metal plate but the cuts do not extend through the metal plate. A metal layer, which may include a number of sublayers, is formed on the front side of the dice, the metal covering the exposed portions of the metal plate and extending the side edges of the dice. Separate sections of the metal layer may also cover connection pads on the front side of the dice. A second set of saw cuts are made coincident with the first set of saw cuts, using a blade that is narrower than the blade used to make the first set of saw cuts. As a result, the metal layer remains on the side edges of the dice connecting the back and front sides of the dice (via the metal plate).
    Type: Grant
    Filed: May 28, 2002
    Date of Patent: April 5, 2005
    Assignee: Vishay Intertechnology, Inc.
    Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
  • Patent number: 6562647
    Abstract: A semiconductor package by which contacts are made to both sides of the dice is manufactured on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice are saw cut to expose the metal plate but the cuts do not extend through the metal plate. A metal layer, which may include a number of sublayers, is formed on the front side of the dice, the metal covering the exposed portions of the metal plate and extending the side edges of the dice. Separate sections of the metal layer may also cover connection pads on the front side of the dice. A second set of saw cuts are made coincident with the first set of saw cuts, using a blade that is narrower than the blade used to make the first set of saw cuts. As a result, the metal layer remains on the side edges of the dice connecting the back and front sides of the dice (via the metal plate).
    Type: Grant
    Filed: April 26, 2001
    Date of Patent: May 13, 2003
    Assignee: Vishay Intertechnology, Inc.
    Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
  • Publication number: 20020185710
    Abstract: A semiconductor package by which contacts are made to both sides of the dice is manufactured on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice are saw cut to expose the metal plate but the cuts do not extend through the metal plate. A metal layer, which may include a number of sublayers, is formed on the front side of the dice, the metal covering the exposed portions of the metal plate and extending the side edges of the dice. Separate sections of the metal layer may also cover connection pads on the front side of the dice. A second set of saw cuts are made coincident with the first set of saw cuts, using a blade that is narrower than the blade used to make the first set of saw cuts. As a result, the metal layer remains on the side edges of the dice connecting the back and front sides of the dice (via the metal plate).
    Type: Application
    Filed: May 28, 2002
    Publication date: December 12, 2002
    Applicant: Vishay Intertechnology, Inc.
    Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
  • Patent number: 6441475
    Abstract: This semiconductor surface mount package is relatively inexpensive to produce and has a footprint that is essentially the same size as the die. A conductive substrate is attached to the back side of a wafer and is in electrical contact with a terminal on the back side of each die in the wafer. A nonconductive overcoat is formed and patterned on the front side of the wafer, leaving a portion of the passivation layer and the connection pads for the dice exposed, each of the connection pads being coated with a solderable metal layer. The assembly is then sawed in perpendicular directions along the scribe lines between the dice, but the saw cuts do not extend all the way through the substrate, which remains intact at its back side. The parallel cuts in one direction are broken to produce die strips which are mounted, sandwich-like, in a stack, with one side of the strips exposed.
    Type: Grant
    Filed: December 8, 2000
    Date of Patent: August 27, 2002
    Assignee: Vishay Intertechnology, Inc.
    Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
  • Patent number: 6316287
    Abstract: A package for a semiconductor device is formed by a process which includes forming a metal layer in contact with a connection pad on the front side of a semiconductor die while the die is still a part of a wafer. The metal layer extends into the scribe line between the die and an adjacent die. A nonconductive cap is attached to the front side of the wafer, and the wafer is ground from its back side to reduce its thickness. A cut is made from the back side of the wafer, preferably by sawing and etching, to expose the metal layer. A nonconductive layer is formed on the back side of the wafer and a second metal layer is deposited over the nonconductive layer, the second metal layer extending into the scribe line where it makes contact with the first metal layer through an opening in the nonconductive layer. Preferably, a solder post is formed on the second metal layer to allow the finished package to be mounted on a printed circuit board.
    Type: Grant
    Filed: September 13, 1999
    Date of Patent: November 13, 2001
    Assignee: Vishay Intertechnology, Inc.
    Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
  • Publication number: 20010016369
    Abstract: A semiconductor package by which contacts are made to both sides of the dice is manufactured on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice are saw cut to expose the metal plate but the cuts do not extend through the metal plate. A metal layer, which may include a number of sublayers, is formed on the front side of the dice, the metal covering the exposed portions of the metal plate and extending the side edges of the dice. Separate sections of the metal layer may also cover connection pads on the front side of the dice. A second set of saw cuts are made coincident with the first set of saw cuts, using a blade that is narrower than the blade used to make the first set of saw cuts. As a result, the metal layer remains on the side edges of the dice connecting the back and front sides of the dice (via the metal plate).
    Type: Application
    Filed: April 26, 2001
    Publication date: August 23, 2001
    Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
  • Patent number: 6271060
    Abstract: This semiconductor surface mount package is relatively inexpensive to produce and has a footprint that is essentially the same size as the die. A conductive substrate is attached to the back side of a wafer and is in electrical contact with a terminal on the back side of each die in the wafer. A nonconductive overcoat is formed and patterned on the front side of the wafer, leaving a portion of the passivation layer and the connection pads for the dice exposed, each of the connection pads being coated with a solderable metal layer. The assembly is then sawed in perpendicular directions along the scribe lines between the dice, but the saw cuts do not extend all the way through the substrate, which remains intact at its back side. The parallel cuts in one direction are broken to produce die strips which are mounted, sandwich-like, in a stack, with one side of the strips exposed.
    Type: Grant
    Filed: September 13, 1999
    Date of Patent: August 7, 2001
    Assignee: Vishay Intertechnology, Inc.
    Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
  • Publication number: 20010009298
    Abstract: A package for a semiconductor device is formed by a process which includes forming a metal layer in contact with a connection pad on the front side of a semiconductor die while the die is still a part of a wafer. The metal layer extends into the scribe line between the die and an adjacent die. A nonconductive cap is attached to the front side of the wafer, and the wafer is ground from its back side to reduce its thickness. A cut is made from the back side of the wafer, preferably by sawing and etching, to expose the metal layer. A nonconductive layer is formed on the back side of the wafer and a second metal layer is deposited over the nonconductive layer, the second metal layer extending into the scribe line where it makes contact with the first metal layer through an opening in the nonconductive layer. Preferably, a solder post is formed on the second metal layer to allow the finished package to be mounted on a printed circuit board.
    Type: Application
    Filed: February 23, 2001
    Publication date: July 26, 2001
    Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
  • Publication number: 20010000631
    Abstract: This semiconductor surface mount package is relatively inexpensive to produce and has a footprint that is essentially the same size as the die. A conductive substrate is attached to the back side of a wafer and is in electrical contact with a terminal on the back side of each die in the wafer. A nonconductive overcoat is formed and patterned on the front side of the wafer, leaving a portion of the passivation layer and the connection pads for the dice exposed, each of the connection pads being coated with a solderable metal layer. The assembly is then sawed in perpendicular directions along the scribe lines between the dice, but the saw cuts do not extend all the way through the substrate, which remains intact at its back side. The parallel cuts in one direction are broken to produce die strips which are mounted, sandwich-like, in a stack, with one side of the strips exposed.
    Type: Application
    Filed: December 8, 2000
    Publication date: May 3, 2001
    Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho