Abstract: A surface inspection system for foil article is disclosed. The surface inspection system comprises a box having a top long narrow opening and a bottom long narrow opening, a bridge interface, a first light source, a second light source, a first modular camera device having a first camera, and a second modular camera device having a second camera. In which, the first light source, the second light source, the first modular camera device, and the second modular camera device all accommodated in the box, and are coupled to a control box through the bridge interface. Particularly, this surface inspection system is allowed to be integrated in an automatic production line of a foil article like electro-forming aluminum foil (also called electronic aluminum foil), so as to achieve an in-line inspection of the surface morphology of the electro-forming aluminum foil.

Abstract: A method includes forming a first gate dielectric, a second gate dielectric, and a third gate dielectric over a first semiconductor region, a second semiconductor region, and a third semiconductor region, respectively. The method further includes depositing a first lanthanum-containing layer overlapping the first gate dielectric, and depositing a second lanthanum-containing layer overlapping the second gate dielectric. The second lanthanum-containing layer is thinner than the first lanthanum-containing layer. An anneal process is then performed to drive lanthanum in the first lanthanum-containing layer and the second lanthanum-containing layer into the first gate dielectric and the second gate dielectric, respectively. During the anneal process, the third gate dielectric is free from lanthanum-containing layers thereon.

Abstract: A microfluidic chip for culturing and real-time monitoring of multicellular tissues and use method thereof. The chip comprises a glass substrate layer, and a PDMS microchannel layer located on the glass substrate layer, wherein the glass substrate layer comprises a glass substrate, and a plurality of microelectrodes thereon; the PDMS microchannel comprises a plurality of independent microfluidic channels; the microelectrodes on the glass substrate are in one-to-one correspondence with the microfluidic channels in the PDMS microchannel layer; and the microelectrodes are electrically connected to an external circuit. The use method comprises: cell capture, cell or tissue culture, electrical impedance spectroscopy detection, and tissue release.

Abstract: A coil module and a wireless power transmitting circuit using the same are disclosed. At least three sets of coils are configured to be connected in series and overlapped each other, which may, in one hand, increase the coupling coefficient between the power transmitting coil and the power receiving coil, and in the other hand, make the alternating magnetic field generated by the coil module more concentrated so as to reduce negative influences caused by the strayed magnetic field around the coil module.

Abstract: A cutting element includes a substrate and an ultrahard layer on an upper surface of the substrate, a top surface of the ultrahard layer having a ridge extending along a major dimension of the top surface from an edge of the top surface, where the ridge has a peak with at least two different roof radii of curvature, and at least two sidewalls sloping in opposite directions from the peak of the ridge at a roof angle, where a first roof angle of the ridge proximate the edge is smaller than a second roof angle in a central portion of the ridge around a longitudinal axis of the cutting element.

Abstract: A lightweight paddle capable of improving surface flatness includes a paddle body and a handle connected to the paddle body. The paddle body includes a substrate layer and two face plates. The substrate layer is formed with a groove. An elastic member is embedded in the groove. When the two face plates are glued to the substrate layer, the groove of the substrate layer provides a deformation space for the elastic member, which can make the outer surface of the elastic member flush with the surface of the substrate layer. The overall weight of the product can be reduced effectively, so the paddle is more lightweight.

Abstract: A camera assembly adaptable to a display device is provided. The camera assembly comprises a fixed base, a lifting component, an elastic element and a camera module. The fixed base is disposed in the display device and fixed with the display device. The lifting component is movably connected to the fixed base. The elastic element is connected with the lifting component and the fixed base respectively. The camera module is pivotally connected to the lifting component. The elastic element provides elastic force to drive the lifting component to raise the camera module so that the camera module is exposed from the display device, and the camera module pivots relative to the lifting component to tilt the display device.

Abstract: This application discloses an information exchange method and apparatus. In the method, a terminal device transmits attach request information to a core network device, receives attach accept information of the core network device, where the attach accept information includes a first integrity check code; the terminal device obtains a second integrity check code based on the attach accept information; and the terminal device obtains, if the first integrity check code is the same as the second integrity check code, a third integrity check code based on encrypted attach complete information, and transmits encrypted attach complete information to which the third integrity check code is added to the core network device. This reduces data exchange procedures, reduces an amount of data of exchanged information, and reduces a time consumed in an information exchange process performed between the terminal device and the core network device.

Abstract: A method for forming a semiconductor device includes forming a metal gate stack having a gate dielectric layer and a gate electrode disposed over the gate dielectric layer. The gate electrode includes a first metal layer and a second metal layer. The method further includes performing a plasma treatment to a top surface of the metal gate stack and forming a conductive layer over the treated top surface of the metal gate stack. A top portion of the conductive layer is formed above a top surface of the gate dielectric layer, and a bottom portion of the conductive layer penetrates into the first and the second metal layers of the gate electrode at different distances.

Abstract: A defect inspection system is disclosed, and comprises a linear light source, N number of cameras, a display device, a tag reader, and a modular electronic device, in which the linear light source, the cameras and the modular electronic device are used for conducting a defect inspection of an article. On the other hand, the display device, the tag reader and the modular electronic device are adopted for conducting in production of at least one labeled example. Therefore, the modular electronic device is allowed to apply a machine learning process to an image classifier under using a training dataset containing the labeled examples, thereby producing at least one new defect recognition model or updating the existing defect recognition model.

Abstract: The disclosure related to a resin composition for molding device for dental restoration comprising 10 to 50 parts by weight of an urethane acrylate oligomer with a functionality less than 4, 20 to 40 parts by weight of morpholino-group containing acrylate monomera morpholino-group containing acrylate monomer, 10 to 40 parts by weight of a polymerizable acrylate monomer composition and 0.5 to 5 parts by weight of a photoinitiator, wherein the polymerizable acrylate monomer composition comprises 40 to 60 parts by weight of an alicyclic acrylate monomer and 40 to 60 parts by weight of ether-bond containing aliphatic acrylate monomeran ether-bond containing aliphatic acrylate monomer. The shore hardness of the resin composition after being cured of the present invention is not less than 70D and the flexural strain thereof is not less than 0.15.

Abstract: Apparatus, methods and instructions for disinfecting air. The apparatus may include, and the methods may involve, a fixture. The fixture may include a germicidal light source. The fixture may include a fan. The fan may circulate air through a volume into which the germicidal light source propagates germicidal light. The light source may be configured to emit, upward from a horizontal plane, a beam that, absent reflection off an environmental object, does not cross the horizontal plane. The apparatus may include a shield that prevents light from the light source from crossing the horizontal plane. The sensor may face upward from the horizontal plane. The sensor may face downward from the horizontal plane.

Abstract: Apparatus, methods and instructions for disinfecting air. The apparatus may include, and the methods may involve, a fixture. The fixture may include a germicidal light source. The fixture may include a fan. The fan may circulate air through a volume into which the germicidal light source propagates germicidal light. The light source may be configured to emit, upward from a horizontal plane, a beam that, absent reflection off an environmental object, does not cross the horizontal plane. The apparatus may include a shield that prevents light from the light source from crossing the horizontal plane. The sensor may face upward from the horizontal plane. The sensor may face downward from the horizontal plane.

Abstract: The present disclosure provides a semiconductor device and a method of forming the same. The semiconductor device includes a first channel members being vertically stacked, a second channel members being vertically stacked, an n-type work function layer wrapping around each of the first channel members, a first p-type work function layer over the n-type work function layer and wrapping around each of the first channel members, a second p-type work function layer wrapping around each of the second channel members, a third p-type work function layer over the second p-type work function layer and wrapping around each of the second channel members, and a gate cap layer over a top surface of the first p-type work function layer and a top surface of the third p-type work function layer such that the gate cap layer electrically couples the first p-type work function layer and the third p-type work function layer.

Abstract: A semiconductor device includes a stack of semiconductor layers vertically arranged above a semiconductor base structure, a gate dielectric layer having portions each surrounding one of the semiconductor layers, and a gate electrode surrounding the gate dielectric layer. Each portion of the gate dielectric layer has a top section above the respective semiconductor layer and a bottom section below the semiconductor layer. The top section has a top thickness along a vertical direction perpendicular to a top surface of the semiconductor base structure; and the bottom section has a bottom thickness along the vertical direction. The top thickness is greater than the bottom thickness.

Abstract: An array substrate, a fabrication method of the array substrate and a mask, where a metal film is provided on a substrate, a first groove and a second groove are formed on the metal film, the bottom surface of the first groove is closer to the substrate compared to that of the second groove, a projection of the first groove on a plane parallel to the substrate is located within that of the second groove, thereby reducing a slope of a notch sidewall, avoiding the sliding of formed subsequent film layers off the first notch sidewall; the metal film may be covered by the subsequent film layers, improving the performance of the array substrate.

Abstract: A communication method and a communications apparatus are provided. The communication method includes: sending, by a terminal device, a first indication message, where the first indication message is used to indicate a first time type and/or a first time precision, or the first indication message is used to indicate an access network device to send time information to the terminal device; receiving, by the terminal device, the time information; and synchronizing, by the terminal device, a time of the terminal device based on the time information. Correspondingly, a communications apparatus is further provided. According to the embodiments of this application, the terminal device can obtain, based on requirements of different application scenarios, a time type and/or time precision preferred by the terminal device.

Abstract: A method includes providing a structure having a first channel member and a second channel member over a substrate. The first channel member is located in a first region of the structure and the second channel member is located in a second region of the structure. The method also includes forming a first oxide layer over the first channel member and a second oxide layer over the second channel member, forming a first dielectric layer over the first oxide layer and a second dielectric layer over the second oxide layer, and forming a capping layer over the second dielectric layer but not over the first dielectric layer. The method further includes performing an annealing process to increase a thickness of the second oxide layer under the capping layer.

Abstract: A device includes a semiconductor substrate, a fin structure on the semiconductor substrate, a gate structure on the fin structure, and a pair of source/drain features on both sides of the gate structure. The gate structure includes an interfacial layer on the fin structure, a gate dielectric layer on the interfacial layer, and a gate electrode layer of a conductive material on and directly contacting the gate dielectric layer. The gate dielectric layer includes nitrogen element.

Abstract: An n-type field effect transistor includes semiconductor channel members vertically stacked over a substrate, a gate dielectric layer wrapping around each of the semiconductor channel members, and a work function layer disposed over the gate dielectric layer. The work function layer wraps around each of the semiconductor channel members. The n-type field effect transistor also includes a WF isolation layer disposed over the WF layer and a gate metal fill layer disposed over the WF isolation layer. The WF isolation layer fills gaps between adjacent semiconductor channel members.