Abstract: A display panel and an electronic device. The display panel includes at least one first display substrate. The first display substrate includes a drive device layer, a first insulating layer, a first touch control layer, a light-emitting device binding layer, and a light-emitting device. The first touch control layer is provided with a number of first touch control electrodes. The first touch control electrode is electrically connected to a first touch control drive device through a first via hole penetrating the first insulating layer.

Abstract: The invention provides competitive inhibitors of farnesyl transferase, compositions comprising the competitive inhibitors of farnesyl transferase, and their use as antifungal agents and as agents for the prevention of the formation or growth of biofilms.

Abstract: In one embodiment, an emergency vehicle detection system can be provided in the ADV travelling on a road to detect the presence of an emergency vehicle in a surrounding environment of the ADV using both audio data and visual data. The emergency vehicle detection system can use a trained neutral network to independently generate a detection result from the audio data, and use another trained network to independently generate another detection result from the visual data. The emergency vehicle detection system can fuse the two detection results to determine the position and moving direction of the emergency vehicle. The ADV can take appropriate actions in response to the position and moving direction of the emergency vehicle.

Abstract: A flat panel detector and a method performed by the flat panel detector are provided. A plurality of pixel units are arranged in an array, each pixel unit includes pixels arranged in a K×K sub-array, and each pixel is configured to provide a photoelectric signal. K is an odd number greater than 1. A gate driving circuit is configured to turn on the pixel units row by row under, so as to cause K rows of pixels in each turned-on pixel unit to generate photoelectric signals. A readout circuit is configured to read photoelectric signals from K columns of pixels in each column of pixel units, and generate image data for each pixel unit according to the photoelectric signals. A control circuit is connected to the gate driving circuit and the readout circuit.

Abstract: A display panel and a display device are disclosed. The display panel includes a first substrate, a second substrate, and a liquid crystal layer disposed therebetween. The first substrate includes a first base and a planarization layer disposed on a side of the first substrate adjacent to the liquid crystal layer. A side of the planarization layer adjacent to the liquid crystal layer includes a textured structure, which includes at least one groove path. The first substrate further includes a bottom edge. An extending direction of the at least one groove path forms an included angle with the bottom edge, the included angle being greater than or equal to 45 degrees and less than or equal to 135 degrees. A liquid crystal material in the liquid crystal layer diffuses along the extending direction of the groove path through the groove path based on capillary phenomenon.

Abstract: Multiple voltage threshold integrated circuit structures with local layout effect tuning, and methods of fabricating multiple voltage threshold integrated circuit structures with local layout effect tuning, are described. For example, an integrated circuit structure includes a first fin structure or vertical arrangement of horizontal nanowires. A second fin structure or vertical arrangement of horizontal nanowires is laterally spaced apart from the first fin structure or vertical arrangement of horizontal nanowires. An N-type gate structure is over the first fin structure or vertical arrangement of horizontal nanowires. A P-type gate structure is over the second fin structure or vertical arrangement of horizontal nanowires, the P-type gate structure in contact with the N-type gate structure with a PN boundary between the P-type gate structure and the N-type gate structure.

Abstract: Trench contact structures with etch stop layers, and methods of fabricating trench contact structures with etch-stop layers, are described. In an example, an integrated circuit structure includes a fin structure. An epitaxial source or drain structure is on the fin structure. An isolation structure is laterally adjacent to sides of the fin structure. A dielectric layer is on at least a portion of a top surface of the isolation structure and partially surrounds the epitaxial source or drain structure and leaves an exposed portion of the epitaxial source or drain structure. A conductive trench contact structure is on the exposed portion of the epitaxial source or drain structure. The conductive trench contact structure does not extend into the isolation structure.

Abstract: Integrated circuit structures having internal spacers for 2D channel materials, and methods of fabricating integrated circuit structures having internal spacers for 2D channel materials, are described. For example, an integrated circuit structure includes a stack of two-dimensional (2D) material nanowires. A gate structure is vertically around the stack of 2D material nanowires. Internal gate spacers are between vertically adjacent ones of the stack of 2D material nanowires and laterally adjacent to the gate structure. The 2D material nanowires are recessed relative to the internal gate spacers. Conductive contact structures are at corresponding ends of the stack of 2D material nanowires, the conductive contact structures adjacent to the internal gate spacers and vertically overlapping with the internal gate spacers.

Abstract: A circuit simulation optimization method, device, computer device and storage medium, wherein the circuit simulation optimization method comprises: acquiring initial design parameters of a design circuit, and calculating an initial value of an S-parameter based on the initial design parameters of the design circuit; judging whether the design circuit is qualified according to design requirements according to the initial value of the S-parameter value and a preset S-parameter threshold; when the design circuit is not qualified according to the design requirements, calculating a derivative of an object function corresponding to the S-parameter at the initial design parameters; and searching for a point of a smallest possible value of the object function corresponding to the S-parameter in a preset interval of the initial design parameters according to the derivative.

Abstract: Integrated circuit structures having deep via bar width tuning are described. For example, an integrated circuit structure includes a plurality of gate lines extending over first and second semiconductor nanowire stack channel structures or fin structures. A plurality of trench contacts is intervening with the plurality of gate lines. A conductive structure is between the first and second semiconductor nanowire stack channel structures or fin structures, the conductive structure having a first width in a first region and a second width in a second region between the first and second semiconductor nanowire stack channel structures or fin structures, the second width different than the first width.

Abstract: This application is directed to controlling an electrical idle state of a retimer of a data communication channel. A receiving side of the retimer obtains an input signal including at least an exit command and a data sequence following the exit command. The exit command requests the retimer to exit a target energy saving state and transmit the data sequence. The retimer splits the input signal into two distinct signals including a control signal carrying the exit command and a data signal carrying the data signal. The retimer extends the exit command carried by the control signal, outputs the control signal carrying the extended exit command at an output of the retimer, and in accordance with a determination that the retimer has been equalized and locked, outputs the data signal carrying the data sequence at the output of the retimer.

Abstract: A device comprises a substrate comprising a plurality of build-up layers and a cavity. A bridge die is located within the cavity and a plurality of cavity side bumps are on one side of the bridge die. A plurality of interconnect pads with variable heights are on one of the build-up layers of the substrate coupled to the plurality of the cavity side bumps to bond the bridge die to the substrate.

Abstract: Methods of forming devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. A self-assembled monolayer (SAM) is formed on the bottom of the gap, and a barrier layer is formed on the SAM before selectively depositing a metal liner on the barrier layer. The SAM is removed after selectively depositing the metal liner on the barrier layer.

Abstract: Embodiments disclosed herein include apparatuses with glass core package substrates. In an embodiment, an apparatus comprises a substrate with a first surface and a second surface opposite from the first surface. A sidewall is between the first surface and the second surface, and the substrate comprises a glass layer. In an embodiment, a via is provided through the substrate between the first surface and the second surface, and the via is electrically conductive. In an embodiment, a layer in contact with the sidewall of the substrate surrounds a perimeter of the substrate.

Abstract: A full-fiber burner brick and a preparation method thereof, comprising mixing alumina crystal fiber and amorphous ceramic fiber with both of them being a combination of fibers of different lengths gradations, and moreover adding fine powder fillers of different particle size gradations and supplementing other additives. This enables the internal structure of the product more uniform, increases the bulk density of the product, and also benefits the suction filterability of fiber cotton blank, and is conducive to forming and improving the strength of the blank. The surface of the brick body is further provided with a coating, which can effectively protect the cotton fiber of the brick body fiber from harsh environments, improve its high temperature resistance, and help to extend the service life of the burner brick.

Abstract: A push-bending forming device for titanium alloy tubes is provided, which includes a die main body, a plurality of filling balls, a differential temperature assembly and a punch. The filling balls are configured to be filled in a tube blank, and are made of a metal material, with a heat-resistance temperature over 500° C. A diameter of the filling ball is less than an inner diameter of the tube blank. The punch includes a first pushing part and a second pushing part. A push-bending forming method using such device is also provided.

Abstract: A display panel includes a panel body, a polarizing layer, and a cover module. The panel body includes a functional area corresponding to an external camera. The polarizing layer is disposed on a light-emitting side of the panel body. The cover module is disposed on a side of the polarizing layer away from the panel body. A portion of the cover module corresponding to the functional area has a total in-plane phase difference of less than or equal to 100 nm or greater than or equal to 7500 nm.

Abstract: Disclosed are a method and a device for identifying full-section excavation parameters of large-section tunnel with broken surrounding rock, which is capable of solving the problem of inaccurate arrangement of blasting hole points in tunnel excavation engineering, including following steps: establishing a three-dimensional finite element model based on a blasting section design of a tunnel; performing a simulation with the three-dimensional finite element model based on blasting design parameters to obtain blasting quality parameters; selecting a group closest to a preset quality parameter from multiple groups of the blasting design parameters as target blasting design parameters, wherein the preset quality parameter is an acceptance grade standard of the tunnel; obtaining first thermal imaging information of a first hot spot of a surface to be blasted; calibrating actual hole spacing parameters based on the first thermal imaging information and the target blasting design parameters.

Abstract: Techniques are provided to form an integrated circuit having an airgap spacer between at least a transistor gate structure and an adjacent source or drain contact. In one such example, a FET (field effect transistor) includes a gate structure that extends around a fin or any number of nanowires (or nanoribbons or nanosheets, as the case may be) of semiconductor material. The semiconductor material may extend in a first direction between source and drain regions while the gate structure extends over the semiconductor material in a second direction. Airgaps are provided in the regions between the gate structures and the adjacent source/drain contacts. The airgaps have a low dielectric constant (e.g., around 1.0) to reduce the parasitic capacitance between the conductive structures.

Abstract: Techniques are provided herein to form an integrated circuit having dielectric material formed in cavities beneath source or drain regions. The cavities may be formed within subfin portions of semiconductor devices. In one such example, a FET (field effect transistor) includes a gate structure extending around a fin or any number of nanowires of semiconductor material. The semiconductor material may extend in a first direction between source and drain regions while the gate structure extends over the semiconductor material in a second direction substantially orthogonal to the first direction. A dielectric fill may be formed in a recess beneath the source or drain regions, or a dielectric liner may be formed on sidewalls of the recess, to prevent epitaxial growth of the source or drain regions from the subfins. Removal of the semiconductor subfin from the backside may then be performed without causing damage to the source or drain regions.