Patents by Inventor Feng Yuan Gan

Feng Yuan Gan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180130887
    Abstract: An electrode structure of a transistor, and a pixel structure and a display apparatus comprising the electrode structure of the transistor are disclosed. The electrode structure of the transistor comprises a first electrode and a second electrode. The first electrode has at least two first portions and at least one second portion. The first portions are substantially parallel with each other and each has a first width. The second portion has a second width, and connects the substantially parallel first portions to define a space with an opening. The first width is substantially greater than the second width.
    Type: Application
    Filed: January 4, 2018
    Publication date: May 10, 2018
    Inventors: Yu-Min Lin, Kuo-Lung Fang, Feng-Yuan Gan
  • Publication number: 20170125529
    Abstract: An electrode structure of a transistor, and a pixel structure and a display apparatus comprising the electrode structure of the transistor are disclosed. The electrode structure of the transistor comprises a first electrode and a second electrode. The first electrode has at least two first portions and at least one second portion. The first portions are substantially parallel with each other and each has a first width. The second portion has a second width, and connects the substantially parallel first portions to define a space with an opening. The first width is substantially greater than the second width.
    Type: Application
    Filed: November 23, 2016
    Publication date: May 4, 2017
    Inventors: Yu-Min Lin, Kuo-Lung Fang, Feng-Yuan Gan
  • Patent number: 9536963
    Abstract: An electrode structure of a transistor, and a pixel structure and a display apparatus comprising the electrode structure of the transistor are disclosed. The electrode structure of the transistor comprises a first electrode and a second electrode. The first electrode has at least two first portions and at least one second portion. The first portions are substantially parallel with each other and each has a first width. The second portion has a second width, and connects the substantially parallel first portions to define a space with an opening. The first width is substantially greater than the second width.
    Type: Grant
    Filed: March 7, 2007
    Date of Patent: January 3, 2017
    Assignee: AU OPTRONICS CORP.
    Inventors: Yu-Min Lin, Kuo-Lung Fang, Feng-Yuan Gan
  • Patent number: 8722448
    Abstract: A photo detector and related fabricating method are disclosed. The photo detector includes a substrate, a first patterned semiconductor layer, a dielectric layer, a patterned conductive layer, an inter-layer dielectric, a second patterned semiconductor layer, two first electrodes disposed on the inter-layer dielectric and two second electrodes disposed on portions of the second semiconductor layer. The first patterned semiconductor layer having a first doping region and a second doping region is disposed on a transistor region. The dielectric layer is disposed to cover the substrate and the first semiconductor layer. The patterned conductive layer is disposed on the dielectric layer. The inter-layer dielectric having at least two openings adapted to expose the first doping region and the second doping region is disposed to cover the dielectric layer. The second patterned semiconductor layer is disposed on a photosensitive region.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: May 13, 2014
    Assignee: AU Optronics Corp.
    Inventors: Yu-Min Lin, Hsin-Li Chen, Feng-Yuan Gan
  • Publication number: 20140051200
    Abstract: A photo detector and related fabricating method are disclosed. The photo detector includes a substrate, a first patterned semiconductor layer, a dielectric layer, a patterned conductive layer, an inter-layer dielectric, a second patterned semiconductor layer, two first electrodes disposed on the inter-layer dielectric and two second electrodes disposed on portions of the second semiconductor layer. The first patterned semiconductor layer having a first doping region and a second doping region is disposed on a transistor region. The dielectric layer is disposed to cover the substrate and the first semiconductor layer. The patterned conductive layer is disposed on the dielectric layer. The inter-layer dielectric having at least two openings adapted to expose the first doping region and the second doping region is disposed to cover the dielectric layer. The second patterned semiconductor layer is disposed on a photosensitive region.
    Type: Application
    Filed: October 30, 2013
    Publication date: February 20, 2014
    Applicant: AU Optronics Corp.
    Inventors: Yu-Min Lin, Hsin-Li Chen, Feng-Yuan Gan
  • Patent number: 8629959
    Abstract: An optical compensation film includes an optical film and a retardation film. The optical film provides a plate retardation in the direction of thickness (Rth), while the retardation film is disposed on the optical film. The retardation film includes first retarders and second retarders, wherein the first retarders are disposed on at least partial areas of the optical film and provide a first planar retardation (Ro1); the second retarders are disposed on partial areas of the optical film but outside the first retarders and provide a second planar retardation (Ro2) and the first planar retardation (Ro1) is different from the second planar retardation (Ro2). The above-mentioned optical compensation film is capable of compensating the displays for different display areas in a liquid crystal display panel. In addition, the present invention also provides a fabricating method of optical compensation film.
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: January 14, 2014
    Assignee: Au Optronics Corporation
    Inventors: Yue-Shih Jeng, Zeng-De Chen, Kuan-Yi Hsu, Chih-Ming Chang, Feng-Yuan Gan
  • Patent number: 8599181
    Abstract: A photo detector is disclosed. The photo detector includes a substrate, a first patterned semiconductor layer, a dielectric layer, a patterned conductive layer, an inter-layer dielectric, a second patterned semiconductor layer, two first electrodes disposed on the inter-layer dielectric and two second electrodes disposed on portions of the second semiconductor layer. The first patterned semiconductor layer having a first doping region and a second doping region is disposed on a transistor region. The dielectric layer is disposed to cover the substrate and the first semiconductor layer, the patterned conductive layer is disposed on the dielectric layer, and the inter-layer dielectric having at least two openings adapted to expose the first doping region and the second doping region is disposed to cover the dielectric layer. The second patterned semiconductor layer is disposed on a photosensitive region and the first electrodes are electrically connected to the first patterned semiconductor layer.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: December 3, 2013
    Assignee: AU Optronics Corp.
    Inventors: Yu-Min Lin, Hsin-Li Chen, Feng-Yuan Gan
  • Patent number: 8508698
    Abstract: A dual view display structure and a method for producing the same are provided. First, a display panel is provided. Then, a patterned barrier layer is formed on a transparent substrate. The transparent substrate with the patterned barrier layer is attached to the display panel. Because there is a gap between the display panel and the patterned barrier layer, a liquid transparent material is injected into the gap to form a transparent material layer to fill the gap. The invention can not only increase the viewing angles of the dual view display, but also increase the production yield.
    Type: Grant
    Filed: October 13, 2008
    Date of Patent: August 13, 2013
    Assignee: AU Optronics Corp.
    Inventors: Wei-Hung Kuo, Weng-Bing Chou, Tsung-Chin Cheng, Chih-Jen Hu, Feng-Yuan Gan
  • Patent number: 8378423
    Abstract: A dual-gate transistor includes a first gate formed on a substrate, a first dielectric layer covering the first gate and the substrate, a semiconductor layer formed on the first dielectric layer, first and second electrodes formed on the semiconductor layer and spaced with an interval in order to separate each other, a second dielectric layer covering the first and second electrodes, and a second gate formed on the second dielectric layer, in which at least one of the first and second gates is non-overlapped with the second electrode.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: February 19, 2013
    Assignee: AU Optronics Corp.
    Inventors: Chung-Yu Liang, Feng-Yuan Gan, Ting-Chang Chang
  • Publication number: 20120228618
    Abstract: A thin film transistor (TFT) structure is provided. The TFT comprises a gate, a first electrode, a second electrode, a dielectric layer, and a channel layer. By overlapping the area between the first electrode and the gate, the TFT structure acquires a parasitic capacitor that is unaffected by manufacture deviations. Therefore, the TFT needs no compensation capacitor, thereby, increasing the aperture ratio of the TFT.
    Type: Application
    Filed: April 18, 2012
    Publication date: September 13, 2012
    Applicant: AU OPTRONICS CORP.
    Inventors: Yu-Min Lin, Feng-Yuan Gan
  • Patent number: 8232978
    Abstract: An optical reflective touch panel and pixels and a system thereof are provided. Each pixel of the optical reflective touch panel includes a display circuit and a sensing circuit. The display circuit controls the display of the pixel. The sensing circuit is coupled to the display circuit for sensing a sensitization state of the pixel during a turned-on period and a turned-off period of a backlight module and outputting a digital signal to notify an optical reflective touch panel system that whether the pixel is touched or not.
    Type: Grant
    Filed: May 14, 2009
    Date of Patent: July 31, 2012
    Assignee: Au Optronics Corporation
    Inventors: Wen-Jen Chiang, An-Thung Cho, Chrong-Jung Lin, Chia-Tien Peng, Ya-Chin King, Kun-Chih Lin, Chih-Wei Chao, Chien-Sen Weng, Feng-Yuan Gan
  • Publication number: 20120126235
    Abstract: In one aspect of the invention, the method of forming a TFT array panel includes forming a patterned first conductive layer on a substrate, forming a gate insulating layer on the patterned first conductive layer and the substrate, forming a patterned semiconductor layer on the gate insulating layer, forming a patterned second conductive layer, forming a patterned passivation layer on the patterned second conductive layer and the substrate, and forming a patterned transparent conductive layer on the patterned passivation layer.
    Type: Application
    Filed: February 3, 2012
    Publication date: May 24, 2012
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Ching-Chieh Shih, Yeong-Shyang Lee, Tsung-Yi Hsu, Feng-Yuan Gan
  • Patent number: 8184226
    Abstract: A thin film transistor (TFT) structure is provided. The TFT comprises a gate, a first electrode, a second electrode, a dielectric layer, and a channel layer. By overlapping the area between the first electrode and the gate, the TFT structure acquires a parasitic capacitor that is unaffected by manufacture deviations. Therefore, the TFT needs no compensation capacitor, thereby, increasing the aperture ratio of the TFT.
    Type: Grant
    Filed: September 4, 2007
    Date of Patent: May 22, 2012
    Assignee: Au Optronics Corp.
    Inventors: Yu-Min Lin, Feng-Yuan Gan
  • Patent number: 8177989
    Abstract: A copper conducting wire structure is for use in the thin-film-transistor liquid crystal display (LCD) device. The copper conducting wire structure includes at least a buffer layer and a copper layer. A fabricating method of the copper conducting wire structure includes the following steps. At first, a glass substrate is provided. Next, the buffer layer is formed on the glass substrate. The buffer layer is comprised of a copper nitride. At last, the copper layer is formed on the buffer layer.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: May 15, 2012
    Assignee: AU Optronics Inc.
    Inventors: Feng-Yuan Gan, Han-Tu Lin, Kuo-Yuan Tu
  • Patent number: 8133773
    Abstract: In one aspect of the invention, the method of forming a TFT array panel includes forming a patterned first conductive layer on a substrate, forming a gate insulating layer on the patterned first conductive layer and the substrate, forming a patterned semiconductor layer on the gate insulating layer, forming a patterned second conductive layer, forming a patterned passivation layer on the patterned second conductive layer and the substrate, and forming a patterned transparent conductive layer on the patterned passivation layer.
    Type: Grant
    Filed: October 17, 2007
    Date of Patent: March 13, 2012
    Assignee: AU Optronics Corporation
    Inventors: Ching-Chieh Shih, Yeong-Shyang Lee, Tsung-Yi Hsu, Feng-Yuan Gan
  • Publication number: 20110316830
    Abstract: A photo detector is disclosed. The photo detector includes a substrate, a first patterned semiconductor layer, a dielectric layer, a patterned conductive layer, an inter-layer dielectric, a second patterned semiconductor layer, two first electrodes disposed on the inter-layer dielectric and two second electrodes disposed on portions of the second semiconductor layer. The first patterned semiconductor layer having a first doping region and a second doping region is disposed on a transistor region. The dielectric layer is disposed to cover the substrate and the first semiconductor layer, the patterned conductive layer is disposed on the dielectric layer, and the inter-layer dielectric having at least two openings adapted to expose the first doping region and the second doping region is disposed to cover the dielectric layer. The second patterned semiconductor layer is disposed on a photosensitive region and the first electrodes are electrically connected to the first patterned semiconductor layer.
    Type: Application
    Filed: September 7, 2011
    Publication date: December 29, 2011
    Inventors: Yu-Min Lin, Hsin-Li Chen, Feng-Yuan Gan
  • Patent number: 8054304
    Abstract: A photo detector is disclosed. The photo detector includes a substrate, a first patterned semiconductor layer with a first state, a dielectric layer, a patterned conductive layer, an inter-layer dielectric, a second patterned semiconductor layer with a second state, two first electrodes disposed on the inter-layer dielectric and two second electrodes disposed on portions of the second semiconductor layer. The first patterned semiconductor layer having a first doping region and a second doping region is disposed on a transistor region of the substrate. The dielectric layer is disposed to cover the substrate and the first semiconductor layer, the patterned conductive layer is disposed on the dielectric layer, and the inter-layer dielectric having at least two openings adapted to expose the first doping region and the second doping region is disposed to cover the dielectric layer.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: November 8, 2011
    Assignee: AU Optronics Corp.
    Inventors: Yu-Min Lin, Hsin-Li Chen, Feng-Yuan Gan
  • Publication number: 20110217483
    Abstract: An optical compensation film includes an optical film and a retardation film. The optical film provides a plate retardation in the direction of thickness (Rth), while the retardation film is disposed on the optical film. The retardation film includes first retarders and second retarders, wherein the first retarders are disposed on at least partial areas of the optical film and provide a first planar retardation (Ro1); the second retarders are disposed on partial areas of the optical film but outside the first retarders and provide a second planar retardation (Ro2) and the first planar retardation (Ro1) is different from the second planar retardation (Ro2). The above-mentioned optical compensation film is capable of compensating the displays for different display areas in a liquid crystal display panel. In addition, the present invention also provides a fabricating method of optical compensation film.
    Type: Application
    Filed: May 17, 2011
    Publication date: September 8, 2011
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Yue-Shih Jeng, Zeng-De Chen, Kuan-Yi Hsu, Chih-Ming Chang, Feng-Yuan Gan
  • Patent number: 7982268
    Abstract: A dual-gate transistor includes a first gate formed on a substrate, a first dielectric layer covering the first gate and the substrate, a semiconductor layer formed on the first dielectric layer, first and second electrodes formed on the semiconductor layer and spaced with an interval in order to separate each other, a second dielectric layer covering the first and second electrodes, and a second gate formed on the second dielectric layer, in which at least one of the first and second gates is non-overlapped with the second electrode.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: July 19, 2011
    Assignee: AU Optronics Corp.
    Inventors: Chung-Yu Liang, Feng-Yuan Gan, Ting-Chang Chang
  • Publication number: 20110168998
    Abstract: A dual-gate transistor includes a first gate formed on a substrate, a first dielectric layer covering the first gate and the substrate, a semiconductor layer formed on the first dielectric layer, first and second electrodes formed on the semiconductor layer and spaced with an interval in order to separate each other, a second dielectric layer covering the first and second electrodes, and a second gate formed on the second dielectric layer, in which at least one of the first and second gates is non-overlapped with the second electrode.
    Type: Application
    Filed: March 24, 2011
    Publication date: July 14, 2011
    Inventors: Chung-Yu Liang, Feng-Yuan Gan, Ting-Chang Chang