Patents by Inventor Feng Yuan Gan

Feng Yuan Gan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080220343
    Abstract: An ink composition for producing a color filter is provided. The ink composition comprises a colorant, a binder and plural solvents. A color filter production method using the above-mentioned ink composition is also provided. The ink composition is adhered to the designated light transmitting regions on the surface of a transparent substrate. Then, the ink composition adhered to the designated light transmitting regions is solidified.
    Type: Application
    Filed: February 14, 2008
    Publication date: September 11, 2008
    Applicant: AU Optronics Corporation
    Inventors: Chi-Sheng Chen, Lun Tsai, Wen-Bin Wu, Shen-Jye Shieh, Shu-Chin Lee, Feng-Yuan Gan
  • Publication number: 20080135843
    Abstract: A thin film transistor (TFT) structure is provided. The TFT comprises a gate, a first electrode, a second electrode, a dielectric layer, and a channel layer. By overlapping the area between the first electrode and the gate, the TFT structure acquires a parasitic capacitor that is unaffected by manufacture deviations. Therefore, the TFT needs no compensation capacitor, thereby, increasing the aperture ratio of the TFT.
    Type: Application
    Filed: September 4, 2007
    Publication date: June 12, 2008
    Applicant: AU OPTRONICS CORP.
    Inventors: Yu-Min Lin, Feng-Yuan Gan
  • Patent number: 7378303
    Abstract: A method for fabricating a thin film transistor is provided. A conductive layer is formed on a substrate. A patterned mask is formed on the conductive layer to cover a predetermined thin film transistor (TFT) area, and at least one portion of the conductive layer exposed by the patterned mask are removed. A laser is applied to form a laser hole in the patterned mask to expose a portion of the conductive layer and the laser hole substantially corresponds to a channel region of the predetermined TFT area. The exposed conductive layer is etched to form source and drain electrodes on opposite sides of the channel region.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: May 27, 2008
    Assignee: AU Optronics Corp.
    Inventors: Chih-Hung Shih, Ta-Wen Liao, Han-Tu Lin, Feng-Yuan Gan
  • Publication number: 20080067538
    Abstract: An electrode structure of a transistor, and a pixel structure and a display apparatus comprising the electrode structure of the transistor are disclosed. The electrode structure of the transistor comprises a first electrode and a second electrode. The first electrode has at least two first portions and at least one second portion. The first portions are substantially parallel with each other and each has a first width. The second portion has a second width, and connects the substantially parallel first portions to define a space with an opening. The first width is substantially greater than the second width.
    Type: Application
    Filed: March 7, 2007
    Publication date: March 20, 2008
    Applicant: AU OPTRONICS CORP.
    Inventors: Yu-Min Lin, Kuo-Lung Fang, Feng-Yuan Gan
  • Publication number: 20080006865
    Abstract: A thin film transistor array substrate structure. The array substrate structure includes a thin film transistor array substrate, an organic material layer formed thereon, and a plurality of black matrices and color filter patterns disposed on the organic material layer. The invention also provides a method of fabricating the thin film transistor array substrate.
    Type: Application
    Filed: September 24, 2007
    Publication date: January 10, 2008
    Applicant: AU OPTRONICS CORP.
    Inventors: Yu-Wei Liu, Hui-Fen Lin, Feng-Yuan Gan, Shu-Chin Lee, Yen-Heng Huang
  • Publication number: 20070290227
    Abstract: A dual-gate transistor includes a first gate formed on a substrate, a first dielectric layer covering the first gate and the substrate, a semiconductor layer formed on the first dielectric layer, first and second electrodes formed on the semiconductor layer and spaced with an interval in order to separate each other, a second dielectric layer covering the first and second electrodes, and a second gate formed on the second dielectric layer, in which at least one of the first and second gates is non-overlapped with the second electrode.
    Type: Application
    Filed: June 14, 2007
    Publication date: December 20, 2007
    Inventors: Chung-Yu Liang, Feng-Yuan Gan, Ting-Chang Chang
  • Publication number: 20070278178
    Abstract: A copper conducting wire structure is for use in the thin-film-transistor liquid crystal display (LCD) device. The copper conducting wire structure includes at least a buffer layer and a copper layer. A fabricating method of the copper conducting wire structure includes the following steps. At first, a glass substrate is provided. Next, the buffer layer is formed on the glass substrate. The buffer layer is comprised of a copper nitride. At last, the copper layer is formed on the buffer layer.
    Type: Application
    Filed: August 10, 2007
    Publication date: December 6, 2007
    Applicant: AU OPTRONICS CORP.
    Inventors: Feng-Yuan Gan, Han-Tu Lin, Kuo-Yuan Tu
  • Publication number: 20070275511
    Abstract: A method for fabricating a thin film transistor is provided. A conductive layer is formed on a substrate. A patterned mask is formed on the conductive layer to cover a predetermined thin film transistor (TFT) area, and at least one portion of the conductive layer exposed by the patterned mask are removed. A laser is applied to form a laser hole in the patterned mask to expose a portion of the conductive layer and the laser hole substantially corresponds to a channel region of the predetermined TFT area. The exposed conductive layer is etched to form source and drain electrodes on opposite sides of the channel region.
    Type: Application
    Filed: August 29, 2006
    Publication date: November 29, 2007
    Applicant: AU OPTRONICS CORP.
    Inventors: Chih-Hung Shih, Ta-Wen Liao, Han-Tu Lin, Feng-Yuan Gan
  • Publication number: 20070262312
    Abstract: A thin film transistor array substrate structure. The array substrate structure includes a thin film transistor array substrate, an organic material layer formed thereon, and a plurality of black matrices and color filter patterns disposed on the organic material layer. The invention also provides a method of fabricating the thin film transistor array substrate.
    Type: Application
    Filed: July 31, 2006
    Publication date: November 15, 2007
    Applicant: AU OPTRONICS CORP.
    Inventors: Yu-Wei Liu, Feng-Yuan Gan, Shu-Chin Lee, Yen-Heng Huang
  • Patent number: 7289183
    Abstract: A copper conducting wire structure is for use in the thin-film-transistor liquid crystal display (LCD) device. The copper conducting wire structure includes at least a buffer layer and a copper layer. A fabricating method of the copper conducting wire structure includes the following steps. At first, a glass substrate is provided. Next, the buffer layer is formed on the glass substrate. The buffer layer is comprised of a copper nitride. At last, the copper layer is formed on the buffer layer.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: October 30, 2007
    Assignee: AU Optronics Corp.
    Inventors: Feng-Yuan Gan, Han-Tu Lin, Kuo-Yuan Tu
  • Patent number: 7253041
    Abstract: A method of forming a thin film transistor comprising a deposition procedure of a microcrystal material layer and performing a plasma treatment procedure. The deposition procedure and the plasma treatment procedure are repeated. A buffer layer is thus formed on the gate electrode.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: August 7, 2007
    Assignee: AU Optronics Corp.
    Inventors: Feng-Yuan Gan, Han-Tu Lin
  • Patent number: 7157323
    Abstract: Fabrication methods for thin film transistors. A metal gate stack structure is formed on an insulating substrate. The substrate is performed using thermal annealing to create an oxide layer on the sidewalls of the metal gate stack structure. A gate insulating layer is formed on the substrate covering the metal gate stack structure. A semiconductor layer is formed on the gate insulating layer. A source/drain layer is formed on the semiconductor.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: January 2, 2007
    Assignee: Au Optronics Corp.
    Inventors: Feng-Yuan Gan, Han-Tu Lin
  • Publication number: 20060269729
    Abstract: A copper conducting wire structure is for use in the thin-film-transistor liquid crystal display (LCD) device. The copper conducting wire structure includes at least a buffer layer and a copper layer. A fabricating method of the copper conducting wire structure includes the following steps. At first, a glass substrate is provided. Next, the buffer layer is formed on the glass substrate. The buffer layer is comprised of a copper nitride. At last, the copper layer is formed on the buffer layer.
    Type: Application
    Filed: September 7, 2005
    Publication date: November 30, 2006
    Applicant: AU OPTRONICS CORP.
    Inventors: Feng-Yuan Gan, Han-Tu Lin, Kuo-Yuan Tu
  • Publication number: 20060124930
    Abstract: A thin film transistor is characterized by having an island-in structure having a semiconductor layer with a channel region, a bottom heavily-doped semiconductor layer, and a top heavily-doped semiconductor layer. The bottom heavily-doped semiconductor layer is positioned on two opposite sides of the surface of the semiconductor layer beyond the channel region. The top heavily-doped semiconductor layer, positioned on the bottom heavily-doped semiconductor layer, covers two opposite side walls of the bottom heavily-doped semiconductor layer and the semiconductor layer so that current leakage from the drain electrode to the source electrode is prevented.
    Type: Application
    Filed: April 27, 2005
    Publication date: June 15, 2006
    Inventors: Chi-Wen Chen, Ting-Chang Chang, Po-Tsun Liu, Feng-Yuan Gan
  • Publication number: 20060111244
    Abstract: A fabrication method of thin film transistor. A patterned gate is formed on an insulator substrate. A buffer layer is formed on the insulating substrate. The patterned gate is formed by plasma enhanced chemical vapor deposition (PECVD) using a mixture of silane, argon, nitrogen to serve as reactants at a temperature of approximately 20-200° C. A gate insulating layer is formed on the buffer layer. A semiconductor layer is formed on the gate insulating layer. A source/drain layer is formed on the semiconductor layer. The buffer layer protects the metal gate from damage during subsequent plasma enhanced chemical vapor deposition.
    Type: Application
    Filed: June 2, 2005
    Publication date: May 25, 2006
    Inventors: Feng-Yuan Gan, Han-Tu Lin
  • Publication number: 20060111243
    Abstract: Methods and apparatuses for fabricating thin film transistors. An apparatus comprises a first chamber and a second chamber. A substrate comprising a metal gate formed thereon is brought into the first chamber to form a passivation layer on the metal gate. The substrate is then transported to the second chamber to form a gate insulating layer and a semiconductor layer on the passivation layer. Accordingly, the second chamber experiences no metal contamination resulting from the metal gate.
    Type: Application
    Filed: June 2, 2005
    Publication date: May 25, 2006
    Inventors: Feng-Yuan Gan, Han-Tu Lin
  • Publication number: 20060110866
    Abstract: Thin film transistor fabrication methods. A gate electrode is formed on a substrate. The surface of metal gate is subjected to a hydrogen plasma treatment to remove a native oxide formed thereon. A nitride layer as a buffer layer is formed to cover the metal gate. A gate insulating layer is formed on the buffer layer. A semiconductor layer is formed on the gate insulating layer. A source/drain layer is formed on the semiconductor layer. The buffer layer prevents the metal gate from damage in subsequent plasma enhanced chemical vapor deposition processes.
    Type: Application
    Filed: June 2, 2005
    Publication date: May 25, 2006
    Inventors: Feng-Yuan Gan, Han-Tu Lin
  • Publication number: 20060110871
    Abstract: Fabrication methods for thin film transistors. A metal gate stack structure is formed on an insulating substrate. The substrate is performed using thermal annealing to create an oxide layer on the sidewalls of the metal gate stack structure. A gate insulating layer is formed on the substrate covering the metal gate stack structure. A semiconductor layer is formed on the gate insulating layer. A source/drain layer is formed on the semiconductor.
    Type: Application
    Filed: June 2, 2005
    Publication date: May 25, 2006
    Inventors: Feng-Yuan Gan, Han-Tu Lin
  • Publication number: 20060108585
    Abstract: Thin film transistors and fabrication methods thereof. A gate is formed overlying a portion of a substrate. A gate-insulating layer is formed overlying the gate. A vanadium oxide layer is formed between the gate and the substrate and/or the gate and the gate-insulating layer. A semiconductor layer is formed on a portion of the gate-insulating layer. A source and a drain are formed on a portion of the semiconductor layer.
    Type: Application
    Filed: June 2, 2005
    Publication date: May 25, 2006
    Inventors: Feng-Yuan Gan, Han-Tu Lin
  • Publication number: 20060110862
    Abstract: A method of forming a thin film transistor comprising a deposition procedure of a microcrystal material layer and performing a plasma treatment procedure. The deposition procedure and the plasma treatment procedure are repeated. A buffer layer is thus formed on the gate electrode.
    Type: Application
    Filed: June 2, 2005
    Publication date: May 25, 2006
    Inventors: Feng-Yuan Gan, Han-Tu Lin