Patents by Inventor Feng Zhou

Feng Zhou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210016095
    Abstract: Provided is an accurate, fast and long-term stable fused CRAP. The electrode includes a positioning anchor, a silicone catheter, a sensor compartment and a connecting wire. The method monitors physiological information such as blood PPG, blood oxygen saturation, temperature and impedance of blood in the right ventricular cavity, and monitors blood temperature information, which is also a slowly changing metabolic rate, to provide cross-comparison with blood oxygen saturation information, improving monitoring accuracy of blood oxygen saturation. The rapidly changing right ventricular apical impedance information is monitored to improve rapid response ability of CRAP. The LEDs driving current is dynamically adjusted by monitoring the internal temperature of the PPG sensor and the impedance change of the attached biological tissue, which indirectly reflects thickness change of the attached biological tissue, thereby delaying the failure time of the PPG sensor.
    Type: Application
    Filed: December 26, 2018
    Publication date: January 21, 2021
    Inventors: Xiang CHEN, Jin LI, Zhongbo BAI, Hua JIN, Quangui QU, Fenghu ZHOU, Feng YUN, Ke HAN
  • Patent number: 10897198
    Abstract: A voltage conversion apparatus includes a power supply circuit with a first switch, a voltage conversion circuit, and a protective circuit with a detection circuit. The first switch transmits a power to generate an input voltage. The voltage conversion circuit generates a first voltage. A second switch of the voltage conversion circuit receives the input voltage. A third switch of the voltage conversion circuit is coupled between the second switch and a ground terminal. The detection circuit generates a first control signal based on the first voltage, a second voltage that corresponds to the first voltage, and a reference voltage. When a voltage value of an error signal is less than the reference voltage, the detection circuit outputs the first control signal to turn off the first switch. The voltage value of the error signal corresponds to a voltage difference between the first voltage and the second voltage.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: January 19, 2021
    Inventors: Tao Chen, Xiao-Feng Zhou, Ching-Ji Liang
  • Patent number: 10895996
    Abstract: A data synchronization method, system and apparatus are provided. The method includes receiving a request including data to be uploaded, from a client, and responding to the request after data is successfully obtained from the client, and storing the obtained data. For data whose size is less than a threshold value, a synchronization request is sent to a standby server to request the standby server to store the data. Otherwise a second type work log, including information indicating that data that has not been synchronized, is generated and stored. Data whose size is greater than or equal to the threshold value is not synchronized immediately, but is recorded in the work log. In some cases, data whose size is less than the threshold value, but fails to be synchronized, is recorded in the work log. Synchronization of this data may be subsequently completed according to the work log, so that the synchronization of this data can avoid affecting synchronization of other data.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: January 19, 2021
    Inventors: Ling Zhou, Zheng Chen, Jun Ming Yan, Cheng Wu, Feng Bo Jiang, Li Zhang, Fang Zhou Chen
  • Patent number: 10889518
    Abstract: The present invention provides a use of an inorganic salt or acid capable of producing free phosphate or fluoride ion in reducing the hardness and/or alkalinity of a water system containing residual antiscalant. In the lab test, it is found that the addition of a suitable amount of sodium phosphate or sodium fluoride may induce alkalinity reduction as well as hardness reduction. The production efficiency can be enhanced since the scaling was relieved and heat exchange efficiency can be improved. Meanwhile, lower scaling stress also means lower antiscalant dosage and cost, and thus the total operation cost can be reduced.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: January 12, 2021
    Assignee: ECOLAB USA INC.
    Inventors: Yue Ming Zhou, Jian Kun Shen, Yin Yin Tong, Ling Feng Han
  • Patent number: 10889824
    Abstract: A method for genetic transformation of edible mushrooms is provided relating to the technical field of genetic transformation of Agaricus bisporus, enoki mushroom and shiitake. The disclosed method for genetic transformation of Agaricus bisporus includes: inoculating Agaricus bisporus liquid mycelia into a foxtail-millet-grain culture medium, and pre-culturing them at 20-25° C. until Agaricus bisporus mycelia grow on surfaces of foxtail millet grains. This method uses the foxtail millet grains as an attachment matrix, and during the pre-culturing and co-culturing, the culture substrate is shaken up every day. The method for genetic transformation of enoki mushroom or shiitake includes: inoculation of enoki mushroom mycelia or shiitake mycelia, activated culturing of agrobacterium, and agrobacterium infecting a foxtail millet grain-enoki mushroom mycelium matrix or a foxtail millet grain-shiitake mycelium matrix.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: January 12, 2021
    Inventors: Jianyu Liu, Xiaodong Shang, Chunyan Song, Qi Tan, Zhen Xu, Qiaozhen Li, Dan Zhang, Ruijuan Wang, Hailong Yu, Lujun Zhang, Meiyan Zhang, Hui Yang, Yu Li, Feng Zhou, Ning Jiang
  • Patent number: 10881681
    Abstract: CD73 (also known as ecto-5?-nucleotidase) inhibitor compounds are provided, as well as compositions and uses thereof for treating or preventing CD73-associated or related diseases, disorders and conditions, including cancer- and immune-related disorders. CD73 inhibitor compounds include compounds having the structure set forth in Formula I and pharmaceutically acceptable esters or salts thereof.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: January 5, 2021
    Inventors: Jiasheng Lu, Jiamin Gu, Dongdong Wu, Gang Chen, Chengyong Sun, Xiang Ji, Lin Wang, Feng Zhou, Xiuchun Zhang, Xianqi Kong
  • Publication number: 20200405869
    Abstract: Pharmaceutical compositions comprise a 1-ADP-heptose conjugate and may include an immunogen or an immune checkpoint inhibitor, and are used to promote an immune response.
    Type: Application
    Filed: September 15, 2020
    Publication date: December 31, 2020
    Applicant: National Institute of Biological Sciences, Beijing
    Inventors: Feng Shao, Ping Zhou, Yang She, Huabin He, Peng Li, Jingjin Ding, Wenqing Gao
  • Publication number: 20200410646
    Abstract: An apparatus for image processing includes a processor and a depth camera. The processor obtains a first two-dimensional image and focusing information of the first two-dimensional image, and obtains depth information of a part or all of a content captured in the first two-dimensional image via the depth camera. The processor determines a background area of the first two-dimensional image according to the focusing information. The processor also performs bokeh on the background area of the first two-dimensional image according to the depth information.
    Type: Application
    Filed: September 9, 2020
    Publication date: December 31, 2020
    Applicant: ArcSoft Corporation Limited
    Inventors: Jianhua Lin, Li Yu, Feng Zhou
  • Publication number: 20200411673
    Abstract: A simplified method for forming pairs of non-volatile memory cells using two polysilicon depositions. A first polysilicon layer is formed on and insulated from the semiconductor substrate in a first polysilicon deposition process. A pair of spaced apart insulation blocks are formed on the first polysilicon layer. Exposed portions of the first poly silicon layer are removed while maintaining a pair of polysilicon blocks of the first polysilicon layer each disposed under one of the pair of insulation blocks. A second polysilicon layer is formed over the substrate and the pair of insulation blocks in a second polysilicon deposition process. Portions of the second polysilicon layer are removed while maintaining a first polysilicon block (disposed between the pair of insulation blocks), a second polysilicon block (disposed adjacent an outer side of one insulation block), and a third polysilicon block (disposed adjacent an outer side of the other insulation block).
    Type: Application
    Filed: September 15, 2020
    Publication date: December 31, 2020
    Inventors: Feng Zhou, Xian Liu, Chien-Sheng Su, Nhan Do, Chunming Wang
  • Patent number: 10878143
    Abstract: A method for simulating participation patterns in a plurality of events from a pool of qualified participants includes selecting an event whose preference rank r is equal to a predetermined preference rank R(i,j) for an event of type j for individual i; sampling a random number Z that represents a number of events in which to participate when a number N(j) of available events of type j is greater than 0 and an expected participation rate P(i, j) of individual i for events of type j is greater than 0; selecting a random subset S with Z elements that indicates which Z events to participate in; and looping over k=1 to N(j) and setting a participation array M(i,j,k,l) to 1 iff k is contained in S, where participation array M(i,j,k,l) indicates whether or not individual i participates in a k-th event of type j in an l-th simulation.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: December 29, 2020
    Inventors: David Hoffman, Feng Li, Ta-Hsin Li, Nianjun Zhou
  • Publication number: 20200403655
    Abstract: Embodiments of a Generation Node-B (gNB) and methods of communication are disclosed herein. The gNB may be configured with logical nodes including a gNB central unit (gNB-CU) and a gNB distributed unit (gNB-DU). The gNB-CU 106 may determine a first precoding matrix and a second precoding matrix for a precoding of one or more data streams for transmission on a plurality of antennas coupled to the gNB-DU. The precoding may be in accordance with a split functionality between the gNB-CU and the gNB-DU that includes: precoding by the gNB-CU with the first precoding matrix, and precoding by the gNB-DU with the second precoding matrix.
    Type: Application
    Filed: September 3, 2020
    Publication date: December 24, 2020
    Inventors: Feng Zhou, Yushu Zhang, Xiaowen Zhang, Wenting Chang, Qian Li
  • Patent number: 10870918
    Abstract: A method of forming a carbonized composition includes providing an organic composition, forming a protective layer over the organic composition, increasing temperature to carbonize the organic composition and for a period of time to form the carbonized composition, and removing the protective layer from the carbonized composition.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: December 22, 2020
    Assignee: University of Pittsburgh—Of the Commonwealth System of Higher Education
    Inventors: Haitao Liu, Feng Zhou
  • Publication number: 20200395370
    Abstract: A method of forming a semiconductor device where memory cells and some logic devices are formed on bulk silicon while other logic devices are formed on a thin silicon layer over insulation over the bulk silicon of the same substrate. The memory cell stacks, select gate poly, and source regions for the memory devices are formed in the memory area before the logic devices are formed in the logic areas. The various oxide, nitride and poly layers used to form the gate stacks in the memory area are formed in the logic areas as well. Only after the memory cell stacks and select gate poly are formed, and the memory area protected by one or more protective layers, are the oxide, nitride and poly layers used to form the memory cell stacks removed from the logic areas, and the logic devices are then formed.
    Type: Application
    Filed: August 27, 2020
    Publication date: December 17, 2020
    Applicant: Silicon Storage Technology,Inc.
  • Patent number: 10868022
    Abstract: Flash memory devices and fabrication methods thereof are provided. An exemplary method includes providing discrete bit lines on a semiconductor substrate, a first dielectric layer on top surfaces of the bit lines, and a floating gate structure on the first dielectric layer, trenches being formed between adjacent bit lines and on the semiconductor substrate; forming a sacrificial layer with a top surface above the top surfaces of the bit lines in the trenches; forming a second dielectric layer on top and side surfaces of the floating gate structure and the top surface of the sacrificial layer; forming a control gate structure on the second dielectric layer; removing portions of the second dielectric layer, the floating gate structure and the first dielectric layer to expose a portion of the sacrificial layer; and removing the sacrificial layer from the adjacent bit lines and the semiconductor substrate, thereby forming air gaps.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: December 15, 2020
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Sheng Fen Chiu, Liang Chen, Chao Feng Zhou, Xiao Bo Li
  • Patent number: 10862249
    Abstract: An electrical connector is provided for a mating connector to be inserted thereto. The electrical connector includes an insulating body having a tongue, and multiple terminals. A middle grounding sheet is located between the terminals in upper and lower rows, and has at least one first through hole. Each of left and right sides of the middle grounding sheet has a latch slot and a notch. The insulating body has a first insulating post entering the first through hole and a second insulating post entering the notch. A dimension of the second insulating post is larger than a dimension of the first insulating post. A metal shell frames outside the insulating body to form an insertion space. A first clearance between a first protruding portion and a shielding casing of the mating connector is more than or equal to 0.001 mm and less than or equal to 0.0449 mm.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: December 8, 2020
    Assignee: LOTES CO., LTD
    Inventors: Ted Ju, Wu Feng, Ya Jun Zeng, Nan Fang He, Jun Fan, Jin Ke Hu, Guo Sheng Zhou, Chin Chi Lin
  • Patent number: 10849970
    Abstract: The present invention relates, in general, to HIV-1 and, in particular, to broadly neutralizing HIV-1 antibodies, and to HIV-1 immunogens and to methods of using such immunogens to induce the production of broadly neutralizing HIV-1 antibodies in a subject (e.g., a human).
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: December 1, 2020
    Assignees: Duke University, Triad National Security, LLC, The Trustees of The University of Pennsylvania, Trustees of Boston University, The Government of The United States of America as Represented by the Secretary of the Department of Health and Human Services, The Board of Trustees of the Leland Stanford Junior University
    Inventors: Barton F. Haynes, Hua-Xin Liao, Rebecca M. Lynch, Tongqing Zhou, Feng Gao, Scott Boyd, George M. Shaw, Beatrice H. Hahn, Thomas B. Kepler, Bette T. Korber, Peter Kwong, John R. Mascola
  • Publication number: 20200360353
    Abstract: The invention relates to modulators of Embryonic Ectoderm Development (EED) and/or Polycomb Repressive Complex 2 (PRC2) useful in the treatment of disorders and diseases associated with EEC and PRC2, being macrocyclic azolopyridine derivatives and compositions thereof of Formula I or a pharmaceutically acceptable salt, prodrug, solvate, hydrate, enantiomer, isomer, or tautomer thereof, wherein X1, X2, X3, A1, A2, Y, R1, R2, R3, and R4 are as described herein.
    Type: Application
    Filed: April 24, 2020
    Publication date: November 19, 2020
    Inventors: Ivan Viktorovich EFREMOV, Steven KAZMIRSKI, Qingyi LI, Lorin A. THOMPSON, III, Owen Brendan WALLACE, Shawn Donald JOHNSTONE, Feng ZHOU, Peter RAHL
  • Publication number: 20200356272
    Abstract: An apparatus and system, and methods thereof, include a data storage device and a controller. The data storage device includes a plurality of data storage zones. Each data storage zone includes a plurality of data blocks. The controller includes one or more processors and is operably coupled to the plurality of data storage zones. The controller is configured to determine data storage device workload over a sample time and select the data storage zone for write data to be written to such that a zone performance of the selected data storage zone corresponds to the data storage device workload.
    Type: Application
    Filed: May 7, 2019
    Publication date: November 12, 2020
    Inventors: WeiQing Zhou, Xiong Liu, Feng Shen, Kai Chen
  • Publication number: 20200345195
    Abstract: The present application discloses a processing station and a cleaning system. The cleaning system includes a processing station and a cleaning robot, the processing station for evacuating trash collected in the cleaning robot, and including a body formed with a sealing surface, a base located below the sealing surface and configured for supporting a trash cassette having an opening at a top, a suction mechanism and a filter, and an adjustment member connected the body with the base; the adjustment member urges the base to be vertically adjacent to the sealing surface to clamp the trash cassette between the base and the sealing surface, such that the opening edge of the trash cassette abuts against the sealing surface.
    Type: Application
    Filed: October 29, 2019
    Publication date: November 5, 2020
    Inventor: Feng ZHOU
  • Patent number: D905142
    Type: Grant
    Filed: September 1, 2019
    Date of Patent: December 15, 2020
    Inventor: Xiao Feng Zhou