Patents by Inventor Fenton Read McFeely

Fenton Read McFeely has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030190821
    Abstract: The present invention discloses a method for forming a layer of nitrogen and silicon containing material on a substrate by first providing a heated substrate and then flowing a gas which has silicon and nitrogen atoms but no carbon atoms in the same molecule over said heated substrate at a pressure of not higher than 500 Torr, such that a layer of nitrogen and silicon containing material is formed on the surface. The present invention is further directed to a composite structure that includes a substrate and a layer of material containing nitrogen and silicon but not carbon overlying the substrate for stopping chemical species from reaching the substrate. The present invention is further directed to a structure that includes a semiconducting substrate, a gate insulator on the substrate, a nitrogen-rich layer on top of the gate insulator, and a gate electrode on the nitrogen-rich layer, wherein the nitrogen-rich layer blocks diffusion of contaminating species from the gate electrode to the gate insulator.
    Type: Application
    Filed: May 2, 2003
    Publication date: October 9, 2003
    Applicant: International Business Machines Corporation
    Inventors: Douglas Andrew Buchanan, Matthew Warren Copel, Fenton Read McFeely, Patrick Ronald Varekamp, Mark Monroe Banaszak Holl, Kyle Erik Litz
  • Publication number: 20030186518
    Abstract: A process of passivating a metal-gated CMOS structure in which a metal-gated CMOS structure is passivated in an atmosphere of molecular hydrogen at a temperature of between about 250° C. and about 500° C. and a pressure of at least about 200 Torr. The present process provides a lower interface state density than obtainable by prior art passivation processes.
    Type: Application
    Filed: March 15, 2002
    Publication date: October 2, 2003
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Alessandro Cesare Callegari, Christopher P. D'emic, Hyungjun Kim, Fenton Read McFeely, Vijay Narayanan, John Jacob Yurkas
  • Patent number: 6566281
    Abstract: The present invention discloses a method for forming a layer of nitrogen and silicon containing material on a substrate by first providing a heated substrate and then flowing a gas which has silicon and nitrogen atoms but no carbon atoms in the same molecule over said heated substrate at a pressure of not higher than 500 Torr, such that a layer of nitrogen and silicon containing material is formed on the surface. The present invention is further directed to a composite structure that includes a substrate and a layer of material containing nitrogen and silicon but not carbon overlying the substrate for stopping chemical species from reaching the substrate. The present invention is further directed to a structure that includes a semiconducting substrate, a gate insulator on the substrate, a nitrogen-rich layer on top of the gate insulator, and a gate electrode on the nitrogen-rich layer, wherein the nitrogen-rich layer blocks diffusion of contaminating species from the gate electrode to the gate insulator.
    Type: Grant
    Filed: December 1, 1997
    Date of Patent: May 20, 2003
    Assignee: International Business Machines Corporation
    Inventors: Douglas Andrew Buchanan, Matthew Warren Copel, Fenton Read McFeely, Patrick Ronald Varekamp, Mark Monroe Banaszak Holl, Kyle Erik Litz
  • Publication number: 20030057507
    Abstract: A novel photodetector CMOS-compatible photodetector is disclosed in which photo-generation of carriers (electrons) is carried out in the metal of the electrodes, rather than as electron-hole pairs in the semiconductor on which the metal electrodes are deposited. The novel photo detector comprises a silicon or other semiconductor substrate material characterized by an electron energy bandgap, and a pair of metal electrodes disposed upon a surface of the silicon to define therebetween a border area of the surface. One of the two electrodes being exposed to the incident radiation and covering an area of said surface which is larger than the aforesaid border area, the aforesaid metal of the electrodes being characterized by a Fermi level which is within said electron energy bandgap.
    Type: Application
    Filed: September 26, 2001
    Publication date: March 27, 2003
    Applicant: International Business Machines Corporation
    Inventors: Ferenc M. Bozso, Fenton Read McFeely, John Jacob Yurkas
  • Publication number: 20020175418
    Abstract: The present invention is directed to an alpha-W layer which is employed in interconnect structures such as trench capacitors or damascene wiring levels as a diffusion barrier layer. The alpha-W layer is a single phased material that is formed by a low temperature/pressure chemical vapor deposition process using tungsten hexacarbonyl, W(CO)6, as the source material.
    Type: Application
    Filed: July 3, 2002
    Publication date: November 28, 2002
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephan Alan Cohen, Fenton Read McFeely, Cevdet Ismail Noyan, Kenneth Parker Rodbell, Robert Rosenberg, John Jacob Yurkas
  • Publication number: 20020146903
    Abstract: The present invention relates to a method and apparatus for ensuring uniform and reproducible heating of a deformation-tolerant substrate during low-pressure chemical vapor deposition (CVD) of a metal film on a surface of the substrate. The uniform and reproducible heating of the substrate is achieved in the present invention by positioning the substrate on a beveled surface of a chamfered ring which is located above the heating element in a CVD reactor chamber. The space between heating element, chamfered ring and bottom surface of the substrate define a cavity between the substrate and heating element that ensures that the substrate is heated by radiative means rather than direct contact.
    Type: Application
    Filed: April 10, 2001
    Publication date: October 10, 2002
    Applicant: International Business Machines Corporation
    Inventors: Peter S. Locke, Sandra Guy Malhotra, Fenton Read McFeely, Andrew Herbert Simon, John Jacob Yurkas
  • Patent number: 6444592
    Abstract: A method for integrating a high-k material into CMOS processing schemes is provided. The method includes forming an interfacial oxide, oxynitride and/or nitride layer on a device region of a semiconductor substrate, said interfacial layer having a thickness of less than 10 Å; and (b) forming a high-k dielectric material on said interfacial oxide, oxynitride and/or, nitride layer, said high-k dielectric having a dielectric constant, k, of greater than 8.
    Type: Grant
    Filed: June 20, 2000
    Date of Patent: September 3, 2002
    Assignee: International Business Machines Corporation
    Inventors: Arne W. Ballantine, Douglas A. Buchanan, Eduard A. Cartier, Kevin K. Chan, Matthew W. Copel, Christopher P. D'Emic, Evgeni P. Gousev, Fenton Read McFeely, Joseph S. Newbury, Harald F. Okorn-Schmidt, Patrick R. Varekamp, Theodore H. Zabel
  • Publication number: 20020092673
    Abstract: An interconnection structure is provided wherein comprises a substrate having a dielectric layer with a via opening therein; wherein the opening has a barrier layer; and electrodeposited copper.
    Type: Application
    Filed: January 17, 2001
    Publication date: July 18, 2002
    Applicant: International Business Machines Corporation
    Inventors: Panayotis C. Andricacos, Steven H. Boettcher, Fenton Read McFeely, Milan Paunovic
  • Patent number: 6416812
    Abstract: Copper is deposited onto a barrier layer such as tungsten from an electroless copper plating bath having a pH of at least 12.89 and a deposition rate of 50 nanometers/minute or less.
    Type: Grant
    Filed: June 29, 2000
    Date of Patent: July 9, 2002
    Assignee: International Business Machines Corporation
    Inventors: Panayotis Andricacos, Steven H. Boettcher, Fenton Read McFeely, Milan Paunovic
  • Publication number: 20020086529
    Abstract: An apparatus and method for forming high-purity, high-conductivity metal films deposited by chemical vapor deposition (CVD) on a surface of a substrate is provided. The apparatus includes a cooling system which is in thermal contact with a precursor dispenser such that cooling is sufficiently controlled to prevent unwanted chemical impurities, i.e., non-metallic precursor byproducts, from being introduced into the deposited metal film. The apparatus and method can be used with a wide variety of metallic precursors and under most CVD reaction conditions.
    Type: Application
    Filed: January 3, 2001
    Publication date: July 4, 2002
    Inventors: Fenton Read McFeely, John Jacob Yurkas
  • Patent number: 6380075
    Abstract: A method for forming an open-bottom liner for a conductor in an electronic structure and devices formed are disclosed. In the method, a pre-processed electronic substrate that has a dielectric layer on top is first provided. Via openings are then formed in a dielectric layer to expose an underlying conductive layer. The electronic substrate is then positioned in a cold-wall, low pressure chemical vapor deposition chamber, while the substrate is heated to a temperature of at least 350° C. A precursor gas is then flowed into the CVD chamber to a partial pressure of not higher than 10 mTorr, and metal is deposited from the precursor gas onto sidewalls of the via openings while bottoms of the via openings are substantially uncovered by the metal. The present invention method may be further enhanced by, optionally, modifications of a I-PVD technique or a seed layer deposition technique.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: April 30, 2002
    Assignee: International Business Machines Corporation
    Inventors: Cyril Cabral, Jr., Chao-Kun Hu, Sandra Guy Malhotra, Fenton Read McFeely, Stephen Mark Rossnagel, Andrew Herbert Simon
  • Patent number: 6211042
    Abstract: A method is disclosed for forming an epitaxial layer of a semiconductor material over a metal structure disposed upon a surface of a semiconductor substrate, the metal being characterized by a negative Gibbs free energy for the formation of a compound of the metal and the semiconductor material. The method comprises the steps of: a) placing the substrate in a reactor vessel having a base pressure in the ultra high vacuum range, b) bringing the substrate to an elevated temperature, and c) flowing, over said substrate, a halogen-free precursor gas of molecules comprising the semiconductor material. Typically, the metal structure characterized by feature dimensions of less than 2.0 microns. Preferably, the metal is tungsten, the semiconductor material is silicon and the gas comprises a silane of the form SinH(2n+2), where n is a positive integer.
    Type: Grant
    Filed: October 13, 1998
    Date of Patent: April 3, 2001
    Assignee: International Business Machines Corporation
    Inventors: Fenton Read McFeely, Ismail Cevdet Noyan, John Jacob Yurkas
  • Patent number: 6091122
    Abstract: A method of fabricating a mid-gap workfunction tungsten gate or W electrode directly onto a gate dielectric material for use in high speed/high density advanced MOS and CMOS devices is provided which utilizes low temperature/low pressure CVD of a tungsten carbonyl. MOS and CMOS devices containing one or more of the CVD W gates or W electrodes manufactured by the present invention are also provided herein.
    Type: Grant
    Filed: February 10, 1998
    Date of Patent: July 18, 2000
    Assignee: International Business Machines Corporation
    Inventors: Douglas Andrew Buchanan, Fenton Read McFeely, John Jacob Yurkas
  • Patent number: 6017401
    Abstract: A method of increasing conductivity of a refractory metal film disposed upon a substrate includes exposing the refractory metal film to an atmosphere comprising a silane of the form Si.sub.n H.sub.(2n+2), where n is a positive integer, while subjecting the refractory metal film to a temperature in excess of 700 degrees Celsius and to a base pressure not exceeding 10.sup.-8 torr for a time period which is chosen to be sufficiently long to increase the conductivity of the refractory metal film to a correspondingly sufficient degree.
    Type: Grant
    Filed: October 13, 1998
    Date of Patent: January 25, 2000
    Assignee: International Business Machines Corporation
    Inventors: Fenton Read McFeely, Ismail Cevdet Noyan, John Jacob Yurkas
  • Patent number: 5789312
    Abstract: A method of fabricating a mid-gap workfunction tungsten gate or W electrode directly onto a gate dielectric material for use in high speed/high density advanced MOS and CMOS devices is provided which utilizes low temperature/low pressure CVD of a tungsten carbonyl. MOS and CMOS devices containing one or more of the CVD W gates or W electrodes manufactured by the present invention are also provided herein.
    Type: Grant
    Filed: October 30, 1996
    Date of Patent: August 4, 1998
    Assignee: International Business Machines Corporation
    Inventors: Douglas Andrew Buchanan, Fenton Read McFeely, John Jacob Yurkas