Patents by Inventor Frédéric Roger

Frédéric Roger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8373487
    Abstract: Systems and methods are provided for power measurement of signals such that the power measurement is insensitive to PVT variations of the measurement systems. A power measurement system includes an analog squarer circuitry, an integrating ADC, and a controller. The squarer circuitry calculates the power of a signal whose power is to be measured while the integrating ADC integrates the calculated power over a runup interval to generate an integrated power. The squarer circuitry also calculates the power of a reference for the integrating ADC to de-integrate the integrated power over a rundown interval. The power measurements are independent of PVT variations of the analog squarer circuitry and integrating ADC. The controller digitally controls the runup interval and measures the rundown interval to provide digitized power measurements. The analog squarer circuitry have replica squarer circuits. Process dependent mismatches between the replica analog circuitry may be removed through a calibration process.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: February 12, 2013
    Assignee: Scintera Networks, Inc.
    Inventor: Frederic Roger
  • Patent number: 8331487
    Abstract: RF predistortion apparatus for making linear the output signal of non-linear components such as RF power amplifiers. The apparatus comprises an RF input line for carrying an RF signal connected to an envelope detector for finding the envelope of the RF signal, a power detector for finding the power of the RF signal and a quadrature modulator. The apparatus also comprises a coefficient vector input line for carrying an input signal that carries one or more coefficients to a digitally controlled analog subsystem (DCAS). The DCAS having circuitry for processing both the output of the envelope detector and the output of the power detector by selecting one or more coefficients from the coefficient vector input line for generating a weighted summation of the power of the RF signal and a weighted summation of the envelope voltage of the RF signal that are output to the quadrature modulator.
    Type: Grant
    Filed: November 3, 2010
    Date of Patent: December 11, 2012
    Assignee: Scintera Networks, Inc.
    Inventors: Qian Yu, Frédéric Roger, Adric Q. Broadwell, Olivier Charlon
  • Patent number: 8295394
    Abstract: A performance monitor for generating a digital error signal based upon an RF input signal and an amplified RF output signal is provided.
    Type: Grant
    Filed: October 23, 2008
    Date of Patent: October 23, 2012
    Assignee: Scintera Networks, Inc.
    Inventors: Adric Q. Broadwell, Armando C. Cova, Frederic Roger, Qian Yu
  • Publication number: 20120211842
    Abstract: A semiconductor body comprising a first connection for feeding an upper supply potential and a first and a second terminal cell, which are situated at a distance from each other. The semiconductor body further comprises an arrester structure, which is arranged between the first and second terminal cells in a p-doped substrate. The arrester structure comprises a first and a second p-channel field-effect transistor structure, each of which is set in a respective n-doped well substantially parallel to the first and second terminal cells, and a diode structure with a p-doped region set in a further n-doped well between the n-doped wells of the first and second p-channel field-effect transistor structures. The diode structure is designed to activate the first and second p-channel field-effect transistor structure as arrester elements during an electrostatic discharge in the semiconductor body.
    Type: Application
    Filed: February 28, 2012
    Publication date: August 23, 2012
    Applicant: austriamicrosystems AG
    Inventors: Wolfgang REINPRECHT, Frederic Roger
  • Publication number: 20120106600
    Abstract: RF predistortion apparatus for making linear the output signal of non-linear components such as RF power amplifiers. The apparatus comprises an RF input line for carrying an RF signal connected to an envelop detector for finding the envelop of the RF signal, a power detector for finding the power of the RF signal and a quadrature modulator. The apparatus also comprises a coefficient vector input line for carrying an input signal that carries one or more coefficients to a digitally controlled analog subsystem (DCAS). The DCAS having circuitry for processing both the output of the envelop detector and the output of the power detector by selecting one or more coefficients from the coefficient vector input line for generating a weighted summation of the power of the RF signal and a weighted summation of the envelop voltage of the RF signal that are output to the quadrature modulator.
    Type: Application
    Filed: November 3, 2010
    Publication date: May 3, 2012
    Inventors: Qian Yu, Frédéric Roger, Adric Q. Broadwell, Olivier Charlon
  • Patent number: 8010075
    Abstract: A high-order harmonics generator includes a plurality of high-pass filters to block out DC signals. In one embodiment, high-pass filters are coupled to the output signals from an envelope detector and a power detector. A high-pass filter can also be coupled to the output of a multiplier that multiplies the filtered envelope signal and the filtered power signal. Additional multipliers may also be used at outputs of multipliers in a cascaded chain of multipliers for higher harmonics generation.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: August 30, 2011
    Assignee: Scintera Networks, Inc.
    Inventor: Frederic Roger
  • Patent number: 7902901
    Abstract: An RF squarer circuit comprises a first RF multiplier and a first variable gain transimpedance amplifier (TIA). The first RF multiplier receives an RF input signal RFIN and provides a first output current. The first TIA receives the first output current as an input. The first TIA provides an output voltage VOUT.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: March 8, 2011
    Assignee: Scintera Networks, Inc.
    Inventor: Frederic Roger
  • Publication number: 20100156471
    Abstract: A cost function generator circuit includes memory terms each receiving one or more input signals, and each providing inphase and quadrature output current signals. The inphase and quadrature output currents of the memory terms are summed to provide combined inphase and quadrature output currents, respectively. Transimpedance amplifiers are provided to transform the combined inphase and quadrature output currents into an inphase output voltage and a quadrature output voltage.
    Type: Application
    Filed: December 19, 2008
    Publication date: June 24, 2010
    Inventor: Frederic Roger
  • Patent number: 6995700
    Abstract: A digital/analog converter apparatus (DAC) comprises, for the purpose of converting a digital input signal (D) into an analog output signal (A), a first unit (F1, F2), two digital/analog converters (DAC1, DAC2) and a second unit (K1, K2), which are connected successively in the stated order. From the digital input signal (D), digital intermediate signals (D1, D2) which are within the analog output signal (A) is obtained through linear combination.
    Type: Grant
    Filed: July 18, 2002
    Date of Patent: February 7, 2006
    Assignee: Infineon Technologies AG
    Inventors: Frédéric Roger, Ralf-Rainer Schledz
  • Patent number: 6967506
    Abstract: The invention pertains to a circuit arrangement (comparator) for the discrete-time comparison of input signals (ip, vrefp) and for making available a pair of complementary output levels (vdd, vss) which corresponds to the result of the comparison on a line pair (P, N), wherein said circuit arrangement comprises a reset circuit (12) for balancing the line potentials during a reset phase, an input circuit (14) for generating a potential difference on the line pair (P, N) in accordance with an input signal difference, a first bistable flip-flop (16) for amplifying the generated potential difference and a second bistable flip-flop (20) that is connected by means of a connecting circuit (18) and serves for additionally amplifying the generated potential difference to the desired complementary output levels.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: November 22, 2005
    Assignee: Xignal Technologies AG
    Inventor: Frederic Roger
  • Publication number: 20050062629
    Abstract: A digital/analog converter apparatus (DAC) comprises, for the purpose of converting a digital input signal (D) into an analog output signal (A), a first unit (F1, F2), two digital/analog converters (DAC1, DAC2) and a second unit (K1, K2), which are connected successively in the stated order. From the digital input signal (D), digital intermediate signals (D1, D2) which are within the analog output signal (A) is obtained through linear combination.
    Type: Application
    Filed: July 18, 2002
    Publication date: March 24, 2005
    Inventors: Frederic Roger, Ralf-Rainer Schledz
  • Patent number: 6617945
    Abstract: A filter or multicoupler has at least one resonator which can be electronically tuned by a tuning device, has at least one tuning element such as a tuning capacitor, a switching element for selectively connecting the tuning element electronically to the resonator, and a control device for the switching element. The resonator is a coaxial quarter-wave resonator with a central component having free surface perpendicular to the central axis for mounting of tuning devices.
    Type: Grant
    Filed: March 9, 2001
    Date of Patent: September 9, 2003
    Assignee: Tekelec Temex
    Inventors: Frederic Roger Lotz, Pierre Jean Monteil, Patrick Albert Georges Desrumaux, Gerard Ernest Emile Forterre
  • Publication number: 20030145266
    Abstract: The invention pertains to a circuit arrangement (comparator) for the discrete-time comparison of input signals (ip, vrefp) and for making available a pair of complementary output levels (vdd, vss) which corresponds to the result of the comparison on a line pair (P, N), wherein said circuit arrangement comprises a reset circuit (12) for balancing the line potentials during a reset phase, an input circuit (14) for generating a potential difference on the line pair (P, N) in accordance with an input signal difference, a first bistable flip-flop (16) for amplifying the generated potential difference and a second bistable flip-flop (20) that is connected by means of a connecting circuit (18) and serves for additionally amplifying the generated potential difference to the desired complementary output levels.
    Type: Application
    Filed: December 17, 2002
    Publication date: July 31, 2003
    Inventor: Frederic Roger
  • Publication number: 20020180564
    Abstract: The invention relates to an arrangement of the filter or multicoupler type.
    Type: Application
    Filed: March 9, 2001
    Publication date: December 5, 2002
    Inventors: Frederic Roger Lotz, Pierre Jean Monteil, Patrick Albert Georges Desrumaux, Gerard Ernest Emile Forterre