Abstract: A composite engineered wood material piece and its method of fabrication is described. The wood material piece comprises a top wood layer secured to a substrate layer by a binder. The substrate layer has a plurality of grooves formed therein from a bottom surface thereof to enhance the flexibility of the wood material piece. The grooves are spaced from one another by one or more predetermined spaced intervals and have one or more predetermined depth and width calculated to substantially eliminate the effects of telegraphy of the grooves on a top finished surface of the top wood layer.

Abstract: An optical semiconductor device includes, in a zone (5), a structure of photosensitive diodes including a matrix (6) of lower electrodes (7), an intermediate layer (9) made of a photosensitive material formed on the matrix of lower electrodes and at least one upper electrode (10a) formed on the intermediate layer, in which an electrical connection (3a) includes at least one electrical contact pad (7a) and at least one electrical connection pad (16a) are produced beneath the intermediate layer, at least one electrical connection via (14) is produced through the intermediate layer and connects the upper electrode to the electrical contact pad and at least one well (15a) is formed outside the zone (5) and passes through at least the intermediate layer (9) in order to expose the electrical connection pad (16a). Also provided is a process for fabricating such a device.

Abstract: In a photodiode formed by a region of a first type inside a region of a second type, of a semiconductor substrate, the region of the first type includes a first zone including a dopant of the first type having a first concentration and a first depth. The region of the first type also has a second zone adjacent to the first zone in the dopant of the first type has a second concentration higher than the first concentration and a second depth smaller than the first depth. A method for making such a diode is also disclosed.

Abstract: An image sensor including photosensitive cells including photodiodes and at least one additional circuit with a significant heat dissipation including transistors. The image sensor is made in monolithic form and includes a layer of a semiconductor material having first and second opposite surfaces and including, on the first surface side, first regions corresponding to the power terminals of the transistors, the lighting of the image sensor being intended to be performed on the second surface side; a stack of insulating layers covering the first surface; a thermally conductive reinforcement covering the stack on the side opposite to the layer; and thermally conductive vias connecting the layer to the reinforcement.

Abstract: A random access memory circuit includes a plurality of pixels, each having a light sensitive area and a light blocking layer arranged over at least each of the light sensitive areas. In an alternative embodiment, the circuit includes a plurality of memory elements for storing data. Each memory element may comprise a bit node formed between a photodiode, having a light arranged over the photodiode, and a switching element, where data may be stored. The circuit may also include a plurality of reading and writing circuits for reading and writing data to and from the memory cells.

Abstract: A photodetector including a photodiode formed in a semiconductor substrate and a waveguide element formed of a block of a high-index material extending above the photodiode in a thick layer of a dielectric superposed to the substrate, the thick layer being at least as a majority formed of silicon oxide and the block being formed of a polymer of the general formula R1R2R3SiOSiR1R2R3 where R1, R2, and R3 are any carbonaceous or metal substituents and where one of R1, R2, or R3 is a carbonaceous substituent having at least four carbon atoms and/or at least one oxygen atom.

Abstract: An image sensor including at least one photodiode and at least one transistor formed in and on a silicon substrate, the assembly of the photodiode and of the transistor being surrounded with a heavily-doped insulating wall, wherein the silicon substrate has a crystal orientation (110).

Abstract: A pixel having a MOS-type transistor formed in and above a semiconductor substrate of a first doping type, a buried semiconductor layer of a second doping type being placed in the substrate under the MOS transistor and separated therefrom by a substrate portion forming a well. The buried semiconductor layer comprises a thin portion forming a pinch area placed under the transistor channel area and a thick portion placed under all or part of the source/drain areas of the transistor.

Abstract: A method for forming, on a surface of a thinned-down semiconductor substrate, a contact connected to a metal track of an interconnect stack formed on the opposite surface of the thinned-down substrate, including the steps of: forming, on the side of a first surface of a substrate, an insulating region penetrating into the substrate and coated with a conductive region and with an insulating layer crossed by conductive vias, the vias connecting a metal track of the interconnect stack to the conductive region; gluing the external surface of the interconnect stack on a support and thinning down the substrate; etching the external surface of the thinned-down substrate and stopping on the insulating region; etching the insulating region and stopping on the conductive region; and filling the etched opening with a metal.

Abstract: An image sensor formed in a semiconductor stack of a lower region of a first conductivity type and of an upper region of a second conductivity type, including: a photodiode formed of a first portion of the stack; a read area formed of a second portion of the stack; a trench with insulated walls filled with a conductive material, the trench surrounding the photodiode and the read area and being interrupted, all along its height, on a portion facing the photodiode and the read area; and first connection mechanism associated with the conductive material of the trench and capable of being connected to a reference bias voltage.

Abstract: A cryosurgical probe that is operative to bring target nerve tissue to a temperature below about ?140° C. so as to reduce or eliminate regeneration of the nerve tissue by growing an ice ball. The probe comprises a thermally conductive body, a thermally insulating body and a temperature sensor. The thermally conductive body has a conductive portion adapted to contact the tissue and form an ice ball thereat during use. The thermally insulating body is adjacent to the conductive portion onto which the ice ball forms during use. The temperature sensor is positioned at a predetermined position on the thermally insulating body with respect to the conductive portion. The predetermined position corresponds to a predetermined size of the ice ball grown in the tissue when the sensor reads a predetermined temperature. The insulating body provides sufficient thermal insulation between the conductive body and the surrounding tissue so that the sensor detects freezing of.

Abstract: The photodiode comprises an upper pn junction (D1) formed between an upper layer and an intermediate layer supported by one portion of a semiconductor substrate. A lower junction is formed between the intermediate layer and the substrate portion. The forward bias voltage of the upper junction (D1) is lower than the forward bias voltage of the lower junction (D2). The charges are permitted to be stored in the photodiode until the said upper junction is forward-biased so as to favor (A1) the recombination of the carriers coming from the intermediate layer with the carriers of the upper layer.

Abstract: An optical semiconductor device includes, in a zone (5), a structure of photosensitive diodes including a matrix (6) of lower electrodes (7), an intermediate layer (9) made of a photosensitive material formed on the matrix of lower electrodes and at least one upper electrode (10a) formed on the intermediate layer, in which an electrical connection (3a) includes at least one electrical contact pad (7a) and at least one electrical connection pad (16a) are produced beneath the intermediate layer, at least one electrical connection via (14) is produced through the intermediate layer and connects the upper electrode to the electrical contact pad and at least one well (15a) is formed outside the zone (5) and passes through at least the intermediate layer (9) in order to expose the electrical connection pad (16a). Also provided is a process for fabricating such a device.

Abstract: The disclosure relates to an integrated circuit comprising at least one photosensitive cell. The cell includes a photosensitive element, an input face associated with the said photosensitive element, an optical filter situated in at least one optical path leading to the photosensitive element and an interconnection part situated between the photosensitive element and the input face. The optical filter is disposed between the photosensitive element and the surface of the interconnection part closest to the input face. In particular, the optical filter can be disposed within the interconnection part. The disclosure also proposes that the filter be formed using a glass comprising cerium sulphide or at least one metal oxide.

Abstract: An integrated circuit includes at least one photodiode associated with a transfer transistor. The photodiode is formed with an upper pn junction. The transfer transistor includes a lateral spacer located on a side facing the photodiode. An upper layer of the upper pn junction includes a lateral surface extension lying beneath the spacer. A lower layer of the upper pn junction forms a source/drain region for the transfer transistor. An edge of the lateral surface extension lying beneath the spacer and adjacent a gate of the transfer transistor contacts a substrate of the integrated circuit. An oxide layer insulating the gate from the underlying substrate does not overlie the lateral surface extension of the upper layer underneath of the lateral spacer.

Abstract: A microelectronic device may include a substrate, a plurality of components on the substrate, an insulating layer adjacent the substrate, and a plurality of metallic interconnection levels within the insulating layer and for the plurality of components. The plurality of metallic interconnection levels may include at least one given metallic level including a plurality of conductive lines of a first metallic material, and at least one other metallic level adjacent the at least one given metallic level. The at least one other metallic level may include at least one conductive zone of the first metallic material and coupled to at least one of the plurality of conductive lines of the at least one given metallic level, and at least one other conductive zone of a second metallic material and coupled to at least one other of the plurality of conductive lines of the at least one given metallic level.

Abstract: A pixel is formed in a semiconductor substrate of a first doping type, a first layer of the second doping type covering the substrate, a second layer of the first doping type covering the first layer. A MOS-type transistor is formed in the second layer and has a drain area and a source area of the second doping type. The pixel includes a first area of the second doping type, more heavily doped than the first layer, crossing the second layer and extending into the first layer and connected to the drain area. The pixel further includes a second area of the first doping type, more heavily doped than the second layer and bordering the source area.

Abstract: In a photodiode formed by a region of a first type inside a region of a second type, of a semiconductor substrate, the region of the first type includes a first zone including a dopant of the first type having a first concentration and a first depth. The region of the first type also has a second zone adjacent to the first zone in the dopant of the first type has a second concentration higher than the first concentration and a second depth smaller than the first depth. A method for making such a diode is also disclosed.

Abstract: A method of manufacturing a photodiode sensor and an associated charge transfer transistor includes forming an insulation region on a substrate, forming the diode on a first side of the insulation region with the diode being self-aligned on the insulation region, and replacing the insulation region by a gate of the charge transfer transistor. The invention has particular utility in the manufacture of CMOS or CCD image sensors.

Abstract: An image sensor including a P-type doped layer of a semiconductor material including first and second opposite surfaces; and at least one photodiode formed in the layer on the side of the first surface and intended to be lit through the second surface. The dopant concentration in the layer increases from the first surface to the second surface.