Abstract: An assembly includes a three-level voltage converter and a second voltage converter. The three-level voltage converter is electrically coupled to a battery to convert a battery supply voltage to an intermediate voltage. The second voltage converter is electrically coupled to the three-level voltage converter to convert the intermediate voltage to a processor-supply voltage to operate a processor. At least the second voltage converter and the processor are mounted on a processor-package substrate. The three-level voltage converter can be mounted on the processor-package substrate or on a circuit board on which the processor-package substrate is mounted.

Abstract: An assembly includes a three-level voltage converter and a second voltage converter. The three-level voltage converter is electrically coupled to a battery to convert a battery supply voltage to an intermediate voltage. The second voltage converter is electrically coupled to the three-level voltage converter to convert the intermediate voltage to a processor-supply voltage to operate a processor. At least the second voltage converter and the processor are mounted on a processor-package substrate. The three-level voltage converter can be mounted on the processor-package substrate or on a circuit board on which the processor-package substrate is mounted.

Abstract: Certain aspects of the present disclosure provide semiconductor variable capacitors. One example semiconductor variable capacitor generally includes a semiconductor region, a first insulator region disposed below the semiconductor region, a first non-insulative region disposed below the first insulator region, a second non-insulative region disposed adjacent to the semiconductor region, and a third non-insulative region disposed adjacent to the semiconductor region, wherein the semiconductor region is disposed between the second non-insulative region and the third non-insulative region. In certain aspects, the semiconductor variable capacitor may include a second insulator region disposed above the semiconductor region and a second semiconductor region disposed above the second insulator region.

Abstract: Certain aspects of the present disclosure provide semiconductor variable capacitors. One example semiconductor variable capacitor generally includes a semiconductor region, an insulative layer, and a first non-insulative region, the insulative layer being disposed between the semiconductor region and the first non-insulative region. In certain aspects, the semiconductor variable capacitor may also include a second non-insulative region disposed adjacent to the semiconductor region, and a third non-insulative region disposed adjacent to the semiconductor region, the second non-insulative region and the third non-insulative region having different doping types. In certain aspects, the semiconductor variable capacitor may also include an implant region disposed between the semiconductor region and the insulative layer. The implant region may be used to adjust the flat-band voltage of the semiconductor variable capacitor.

Abstract: A variable capacitor includes a mesa on a substrate. The mesa has multiple III-V semiconductor layers and includes a first side and a second side opposite the first side. The first side has a first sloped portion and a first horizontal portion. The second side has a second sloped portion and a second horizontal portion. A control terminal is on a third side of the mesa. A first terminal is on the first side of the mesa. The first terminal is disposed on the first horizontal portion and the first sloped portion. A second terminal is also on the substrate.

Abstract: Certain aspects of the present disclosure provide a semiconductor device. One example semiconductor device generally includes a semiconductor region, an insulative layer, a first terminal, and a first non-insulative region coupled to the first terminal, the insulative layer being disposed between the first non-insulative region and the semiconductor region. In certain aspects, the insulative layer is disposed adjacent to a first side of the semiconductor region. In certain aspects, the semiconductor device also includes a second terminal, and a first silicide layer coupled to the second terminal and disposed adjacent to a second side of the semiconductor region, the first side and the second side being opposite sides of the semiconductor region.

Abstract: Exemplary embodiments of the present disclosure are related to a wireless power resonator and method that includes a wireless power transmit element. The wireless power transmit element may include a substantially planar transmit antenna configured to generate a magnetic field and formed from a conductive trace including a plurality of distributed inductive elements along the conductive trace. The transmit element may further include a filter formed from selected ones of the plurality of distributed inductive elements of the planar transmit antenna and configured to generate at least one frequency response.

Abstract: Systems, methods and apparatus are disclosed for wireless power transfer using multiple receive coils. In one aspect a wireless power receiver is provided that is configured to receive wireless power from a wireless power transmit coil. The wireless power receiver includes a first receive coil having a first mutual coupling with the transmit coil. The wireless power receiver further includes a second receive coil having a second mutual coupling with the transmit coil. The wireless power receiver further includes a load coupled to at least one of the first receive coil and the second receive coil for receiving the wireless power.

Abstract: A variable capacitor includes a mesa on a substrate. The mesa has multiple III-V semiconductor layers and includes a first side and a second side opposite the first side. The first side has a first sloped portion and a first horizontal portion. The second side has a second sloped portion and a second horizontal portion. A control terminal is on a third side of the mesa. A first terminal is on the first side of the mesa. The first terminal is disposed on the first horizontal portion and the first sloped portion. A second terminal is also on the substrate.

Abstract: Certain aspects of the present disclosure provide a semiconductor device. One example semiconductor device generally includes a semiconductor region, an insulative layer, a first terminal, and a first non-insulative region coupled to the first terminal, the insulative layer being disposed between the first non-insulative region and the semiconductor region. In certain aspects, the insulative layer is disposed adjacent to a first side of the semiconductor region. In certain aspects, the semiconductor device also includes a second terminal, and a first silicide layer coupled to the second terminal and disposed adjacent to a second side of the semiconductor region, the first side and the second side being opposite sides of the semiconductor region.

Abstract: Certain aspects of the present disclosure provide semiconductor variable capacitors. One example semiconductor variable capacitor generally includes a semiconductor region, a first insulator region disposed below the semiconductor region, a first non-insulative region disposed below the first insulator region, a second non-insulative region disposed adjacent to the semiconductor region, and a third non-insulative region disposed adjacent to the semiconductor region, wherein the semiconductor region is disposed between the second non-insulative region and the third non-insulative region. In certain aspects, the semiconductor variable capacitor may include a second insulator region disposed above the semiconductor region and a second semiconductor region disposed above the second insulator region.

Abstract: In certain aspects, a variable capacitor comprises a well having a first side and a second side, an N+ diffusion abutted the well at the first side, a P+ diffusion abutted the well at the second side, and an insulator on the well. The variable capacitor further comprises a gate plate on the insulator having a first gate segment and a second gate segment, wherein the first gate segment and the second gate segment are configured to have different work functions.

Abstract: Certain aspects of the present disclosure provide a semiconductor device. One example semiconductor device generally includes a first semiconductor region; a first non-insulative region disposed adjacent to a first lateral side of the first semiconductor region; a second non-insulative region disposed adjacent to a second lateral side of the first semiconductor region, the second lateral side being opposite to the first lateral side; a second semiconductor region disposed adjacent to a third lateral side of the first semiconductor region, the second semiconductor region and the first semiconductor region having at least one of different doping types or different doping concentrations; an insulative layer adjacent to a top side of the first semiconductor region; and a third non-insulative region, the insulative layer being disposed between the third non-insulative region and the first semiconductor region.

Abstract: Certain aspects of the present disclosure provide a memory device. One example memory device generally includes a first semiconductor region having a first region, a second region, and a third region, the second region being between the first region and the third region and having a different doping type than the first region and the third region. In certain aspects, the memory device also includes a first non-insulative region, a first insulative region being disposed between the first non-insulative region and the first semiconductor region. In certain aspects, the memory device may include a second non-insulative region, and a second insulative region disposed between the second region and the second non-insulative region, wherein the first insulative region and the second insulative region are disposed adjacent to opposite sides of the second region.

Abstract: Certain aspects of the present disclosure generally relate to a semiconductor device and techniques for fabricating a semiconductor device. In certain aspects, the semiconductor device includes a fin, a first non-insulative region disposed adjacent to a first side of the fin, and a second non-insulative region disposed adjacent to a second side of the fin. In certain aspects, the first non-insulative region and the second non-insulative region are separated by a trench, at least a portion of the trench being filled with a dielectric material disposed around the fin.

Abstract: A method and system for providing wireless power transfer through a metal object is provided. In one aspect, an apparatus for wirelessly receiving power via a magnetic field is provided. The apparatus includes a metal cover including an inner portion and an outer portion. The outer portion is configured to form a loop around the inner portion of the metal cover. The outer portion is configured to inductively couple power via the magnetic field. The apparatus includes a receive circuit electrically coupled to the outer portion and configured to receive a current from the outer portion generated in response to the magnetic field. The receive circuit is configured to charge or power a load based on the current.

Abstract: Certain aspects of the present disclosure provide semiconductor variable capacitors. One example semiconductor variable capacitor generally includes a semiconductor region, an insulative layer, and a first non-insulative region, the insulative layer being disposed between the semiconductor region and the first non-insulative region. In certain aspects, the semiconductor variable capacitor may also include a second non-insulative region disposed adjacent to the semiconductor region, and a third non-insulative region disposed adjacent to the semiconductor region, the second non-insulative region and the third non-insulative region having different doping types. In certain aspects, the semiconductor variable capacitor may also include an implant region disposed between the semiconductor region and the insulative layer. The implant region may be used to adjust the flat-band voltage of the semiconductor variable capacitor.

Abstract: Certain aspects of the present disclosure generally relate to a semiconductor device and techniques for fabricating a semiconductor device. In certain aspects, the semiconductor device includes a fin, a first non-insulative region disposed adjacent to a first side of the fin, and a second non-insulative region disposed adjacent to a second side of the fin. In certain aspects, the first non-insulative region and the second non-insulative region are separated by a trench, at least a portion of the trench being filled with a dielectric material disposed around the fin.

Abstract: Certain aspects of the present disclosure generally relate to a semiconductor variable capacitor, and techniques for fabricating the same, implemented using a threshold voltage implant region. For example, the semiconductor variable capacitor generally includes a first non-insulative region disposed above a first semiconductor region, a second non-insulative region disposed above the first semiconductor region, and a threshold voltage (Vt) implant region interposed between the first non-insulative region and the first semiconductor region and disposed adjacent to the second non-insulative region. In certain aspects, the semiconductor variable capacitor also includes a control region disposed above the first semiconductor region such that a capacitance between the first non-insulative region and the second non-insulative region is configured to be adjusted by varying a control voltage applied to the control region.

Abstract: An electronic apparatus may include an electrically conductive body configured to magnetically couple to a first magnetic field. A first tuning element may be connected to the electrically conductive body. An electrically conductive coil may be wound about an opening defined by the electrically conductive body, and configured to magnetically couple to a second magnetic field.