Abstract: A method is provided for carrying out a trimming operation on an integrated circuit having a trimming circuit portion which includes memory elements and a modification circuit for modifying the state of the memory elements, at least a first input or supply pin, an output pin, and a second supply pin. According to the method, a single pin is enabled to receive trimming data by biasing the pin to outside its operating range. A clock signal is obtained from a division of the bias potential of the pin, and the logic value of the trimming data is obtained from a different division of the bias potential of the pin. Serial acquisition of the data is enabled in accordance with the clock signal, and the data is transferred to the modification circuit.

Abstract: A frequency translator is usable in a switching DC-DC converter of the type operating as a voltage regulator and as a battery charger. The frequency translator receives at inputs a division voltage (VFB) proportional to a present value of the output voltage (VOUT) of the DC-DC converter, a reference voltage (VREF) correlated to a nominal value of the output voltage (VOUT), and a limiting signal (VL) indicative of a normal operation or of current limitation operation of the DC-DC converter, and supplies at an output a bias current (IBIAS) which is supplied to an input of an oscillator supplying at an output a comparison signal (VC) presenting a periodic pattern with a frequency which is correlated to the bias current (IBIAS).

Abstract: A linear type of voltage regulator, having at least one input terminal adapted to receive a supply voltage and one output terminal adapted to deliver a regulated output voltage, includes a power transistor and a driver circuit for the transistor. The driver circuit includes an operational amplifier having an input differential stage biased by a bias current which varies proportionally with the variations of the regulated output voltage at the output terminal of the regulator.

Abstract: The present invention relates to semiconductor integrated transistors comprising a conduction section and a sense section for the current flowing through the conduction section both sections being located within a region. To ensure that sensing is accurate and takes into account that the surface of the power transistor reach in operation a non-uniform temperature, the conduction section and sense section are located in such a manner that, in operation, the temperature distributions of the two sections are substantially equal.

Abstract: A battery-charging electronic device comprises a current generator adapted to supply a charging current to a battery and a controlled current edge switch having a circuit for controlling the switching edges of current being flowed through a power transistor. The switching edge control circuit comprises a controlled edge variable voltage generator for generating a controlled edge voltage signal, a voltage/current converter for converting the voltage signal to a controlled edge current signal, and a driver circuit for the power transistor being input the controlled edge current signal to mirror, onto the power transistor, an output current which is proportional to the controlled edge current signal.

Abstract: A voltage regulator providing smooth variation of an absorbed current having a first capacitor parallel-connected to a load, which is in turn connected to a supply voltage; a transconductor coupled between the supply voltage and the load and whose output voltage supplies the load; a differential amplifier coupled between the output of the transconductor and the supply voltage, and further coupled to the input of the transconductor, a second capacitor coupled between the supply voltage and the input of the transconductor; and a pair of diodes coupled between the output of the transconductor and the first capacitor and configured to introduce a zero in the transfer function of the voltage regulator that is suitable to compensate for a pole generated by the first capacitor.

Abstract: An electronic device smoothes a charge current peak in RLC output stages of switching step-up regulators, which stages include an input terminal and an output terminal with an inductance and a parasitic resistance in series therebetween, the latter corresponding to the series parasitic resistance of the inductance, and a capacitor connected between the output terminal and a ground. The device comprises a parallel of a resistor and a controlled switch connected between the inductance and the output terminal of the stage upstream of the capacitor. Advantageously, the switch would only be open during the charge transient of the capacitor.

Abstract: A linear type of voltage regulator, having an input terminal adapted to receive a supply voltage thereon, and an output terminal adapted to deliver a regulated output voltage, includes a power transistor and a driving circuit therefor. The driving circuit includes an operational amplifier having a differential input stage biased by a bias current which varies proportionally with the output current of the regulator.

Abstract: A charge pump MOS voltage booster has reduced voltage drops and ripple. This voltage booster is advantageously used in two applications. The voltage has four MOS transistors instead of diodes in a classical voltage booster, which exhibit an undesired voltage drop. The voltage booster also has an oscillator with two outputs and two corresponding charge transfer capacitors. In this manner, the undesired voltage drops and ripple are reduced without complicating the circuitry structure.

Abstract: The present invention is aimed at providing a method and a circuit for protecting the output stage of a power actuator against voltage transients of the surge type. In particular, it provides protection against voltage surge transients of the kind described by International Standard IEC 801-5, for a power transistor contained in the output stage of the actuator.The method of this invention provides for:the utilization of the power transistor (PW) intrinsic diode (DP) for dumping the transient energy to one of the supply generator terminals during a positive transient; andthe utilization of the power transistor (PW) restoration feature to the on state for dumping the energy thereinto during a negative transient, while simultaneously inhibiting the current limiting function.

Abstract: A circuit for limitation of maximum current delivered by a power transistor comprises: a network for detection of the current delivered by the power transistor which generates a first electrical signal; a reference network for generating a reference current proportional to a resistor and self-limited, provided by means of a current generator circuit and a limiting circuit with current mirror; and an operational amplifier which compares the first electrical signal with the reference current and which tends to inhibit the power transistor if the current delivered exceeds a certain threshold value.

Abstract: A protection circuit for at least one power transistor which has at least one control terminal and two main conduction terminals defining a main conduction path includes a first detection means designed to generate a first electrical signal approximately proportional to current flowing in the main conduction path. Second detection means are designed to generate a second electrical signal approximately proportional to voltage across the main conduction path. Multiplying means receive at input the first and second signals and are designed to generate an electrical product signal substantially corresponding to the product of at least the latter. A generator generates an electrical reference signal, and operational amplifier means receive at input the product signal and the reference signal and are designed to generate an electrical difference signal substantially corresponding to their difference.

Abstract: The purpose of the present invention is to protect the final transistor of a power actuator from short circuits and overloads with a completely integrated circuitry solution which would not influence the output impedance of the actuator and would permit having a limitation current constant and independent of the value of the output terminal of the actuator.

Abstract: A method for detecting an open load includes the use of a driver having at least one main power transistor connected to the load and one auxiliary transistor connected in parallel with the main transistor between a first power supply voltage reference and a second voltage reference. The method compares a first voltage present on a terminal connected to the load of the main transistor with a second voltage present on a terminal of the auxiliary transistor. A circuit for detecting an open load performs the method.

Abstract: A circuit for generating a reference voltage and detecting a drop in a supply voltage, comprising at least one threshold comparator having an input terminal and an output terminal, and a voltage divider connected between a first supply voltage reference and a second voltage reference and connected to the input terminal of the comparator, further provides for the output terminal of said comparator to be connected to the input terminal through at least one feedback network comprising at least one current generator. The feedback network further comprises a buffer block having an input terminal connected to said comparator and a first output terminal connected to a switch which is connected between a circuit node of said voltage divider and the second voltage reference.

Abstract: A non-dissipative device for protecting an integrated circuit having multiple independent channels against overloading. The non-dissipative device includes an input terminal and an output terminal having an integrated switch connected therebetween which consists of an input portion, a logic gate with two inputs a control portion, and an output portion, all connected in series with one another. The device further includes a generating circuit for generating the on-times and off-times of the integrated switch, the generating circuit is connected between an output of the output portion and an input of the logic gate.

Abstract: An oscillating circuit including a capacitor, a charge circuitry and a control circuitry. The charge circuitry includes first and second current generators having respectively first and second current values that are opposite in direction and a switching circuit designed to couple alternately the generators to the capacitor. The control circuitry has a voltage input coupled to the capacitor and an output coupled to control inputs of the switching circuit and includes a comparator with hysteresis having a lower threshold and an upper threshold. The difference between the upper threshold and the lower threshold is chosen to be substantially proportional to the ratio of the product to the sum of the two current values such that the oscillation frequency and the duty cycle do not depend on the supply voltage, the temperature and the process.

Abstract: Power consumption by the driving circuitry of an output stage, employing a slew-rate controlling operational amplifier, is reduced by modulating the level of the current output by the operational amplifier in function of the working conditions of the output stage. Switching delay may also be effectively reduced. An auxiliary current generator forces an additional current through the conducting one of the pair of input transistors of the operational amplifier only during initial and final phases of a transition, essentially when the slew rate control loop ceases to be effective. The boosting of the bias current through the conducting input transistor is determined by the degree of unbalance of the differential input stage of the operational amplifier, without the use of dissipative sensing elements.

Abstract: A charge pump circuit includes a pair of series switching devices coupled between an output node of the circuit and an input node. A power stage drives a charge transfer capacitor which is coupled to an intermediate node between the series switching devices. The power stage has an input coupled to the input node of the circuit, The power stage further includes a bootstrap capacitor for maintaining a conductive state during an entire half of a cycle of a period of oscillation of a local oscillator. The series switching devices may be driven in phase opposition by either a CMOS invertor or a pair of comparators.

Abstract: A drive circuit for a field-effect transistor is disclosed, the field-effect transistor having a drain terminal connected to the positive pole of a voltage supply and a source terminal connected to a load. The drive circuit comprises a first transistor connected between the gate terminal of the field-effect transistor and the negative pole of the voltage supply for turning off the field-effect transistor. The first transistor is driven by an operational amplifier which has inverting and non-inverting teminals connected to the gate and source terminals of the field-effect transistor, respectively. Switches alternatively intercouple the field-effect transistor to either another voltage supply or the first transistor.