Patents by Inventor Francisco Javier Santos Rodriguez

Francisco Javier Santos Rodriguez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Forming a metal contact layer on silicon carbide and semiconductor device with metal contact structure
    Patent number: 10256097
    Abstract: A semiconductor device includes a silicon carbide semiconductor body and a metal contact structure. Interface particles including a silicide kernel and a carbon cover on a surface of the silicide kernel are formed directly between the silicon carbide semiconductor body and the metal contact structure. Between neighboring ones of the interface particles, the metal contact structure directly adjoins the silicon carbide semiconductor body.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: April 9, 2019
    Assignee: Infineon Technologies AG
    Inventors: Ravi Keshav Joshi, Romain Esteve, Roland Rupp, Francisco Javier Santos Rodriguez, Gerald Unegg
  • APPARATUS AND METHOD FOR CHEMICAL VAPOR DEPOSITION PROCESS FOR SEMICONDUCTOR SUBSTRATES
    Publication number: 20190078211
    Abstract: A CVD reactor, including a deposition chamber housing a first susceptor and a second susceptor, the first susceptor having a cavity for receiving a first substrate, the first substrate having a front surface and a back surface, the second susceptor having a cavity for receiving a second substrate, the second substrate having a front surface and a back surface, and the first susceptor and the second susceptor are disposed so that the front surface of the first substrate is opposite to the front surface of the second substrate thereby forming a portion of a gas flow channel.
    Type: Application
    Filed: September 11, 2017
    Publication date: March 14, 2019
    Inventors: Matthias Kuenle, Johannes Baumgartl, Manfred Engelhardt, Christian Illemann, Francisco Javier Santos Rodriguez, Olaf Storbeck
  • Semiconductor device including undulated profile of net doping in a drift zone
    Patent number: 10211325
    Abstract: A semiconductor device includes a semiconductor body having opposite first and second sides. The semiconductor device further includes a drift zone in the semiconductor body between the second side and a pn junction. A profile of net doping of the drift zone along at least 50% of a vertical extension of the drift zone between the first and second sides is undulated and includes doping peak values between 1×1013 cm?3 and 5×1014 cm?3. A device blocking voltage Vbr is defined by a breakdown voltage of the pn junction between the drift zone and a semiconductor region of opposite conductivity type that is electrically coupled to the first side of the semiconductor body.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: February 19, 2019
    Assignee: Infineon Technologies AG
    Inventors: Elmar Falck, Andreas Haertl, Manfred Pfaffenlehner, Francisco Javier Santos Rodriguez, Daniel Schloegl, Hans-Joachim Schulze, Andre Stegner, Johannes Georg Laven
  • Method of Manufacturing a Plurality of Glass Members, a Method of Manufacturing an Optical Member, and Array of Glass Members in a Glass Substrate
    Publication number: 20190023600
    Abstract: An array of glass members is arranged in a glass substrate includes a plurality of depressions formed in a first main surface of the glass substrate, and a plurality of openings formed in a second main surface of the glass substrate.
    Type: Application
    Filed: September 27, 2018
    Publication date: January 24, 2019
    Inventors: Andre Brockmeier, Alexander Breymesser, Carsten Von Koblinski, Francisco Javier Santos Rodriguez, Peter Zorn
  • Method for manufacturing an electronic device and method for operating an electronic device
    Patent number: 10170497
    Abstract: According to various embodiments, an electronic device may include a carrier including at least a first region and a second region being laterally adjacent to each other; an electrically insulating structure arranged in the first region of the carrier, wherein the second region of the carrier is free of the electrically insulating structure; a first electronic component arranged in the first region of the carrier over the electrically insulating structure; a second electronic component arranged in the second region of the carrier; wherein the electrically insulating structure includes one or more hollow chambers, wherein the sidewalls of the one or more hollow chambers are covered with an electrically insulating material.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: January 1, 2019
    Inventors: Thoralf Kautzsch, Alessia Scire, Steffen Bieselt, Franz Hirler, Anton Mauder, Wolfgang Scholz, Hans-Joachim Schulze, Francisco Javier Santos Rodriguez
  • Method for Thinning Substrates
    Publication number: 20180330981
    Abstract: According to various embodiments, a method includes: providing a substrate having a first side and a second side opposite the first side; forming a buried layer in and/or over the substrate by implanting a chemical element having a greater electronegativity than the substrate into the first side of the substrate by ion implantation; and thinning the substrate from the second side of the substrate, wherein the buried layer comprises a solid state compound having a greater resistance to the thinning than the substrate and wherein the thinning stops at the buried layer.
    Type: Application
    Filed: July 11, 2018
    Publication date: November 15, 2018
    Inventors: Roland Rupp, Hans-Joachim Schulze, Francisco Javier Santos Rodriguez, Iris Moder, Ingo Muri
  • Method of manufacturing a plurality of glass members, a method of manufacturing an optical member, and array of glass members in a glass substrate
    Patent number: 10112861
    Abstract: A method of manufacturing a plurality of glass members comprises bringing a first main surface of a glass substrate in contact with a first working surface of a first mold substrate, the first working surface being provided with a plurality of first protruding portions, and bringing a second main surface of the glass substrate in contact with a second working surface of a second mold substrate, the second working surface being provided with a plurality of second protruding portions. The method further comprises controlling a temperature of the glass substrate to a temperature above a glass-transition temperature to form the plurality of glass members, removing the first and the second mold substrates from the glass substrate, and separating adjacent ones of the plurality of glass members.
    Type: Grant
    Filed: July 30, 2015
    Date of Patent: October 30, 2018
    Assignee: Infineon Technologies AG
    Inventors: Andre Brockmeier, Alexander Breymesser, Carsten Von Koblinski, Francisco Javier Santos Rodriguez, Peter Zorn
  • Glass Piece and Methods of Manufacturing Glass Pieces and Semiconductor Devices with Glass Pieces
    Publication number: 20180265354
    Abstract: A semiconductor element is formed in a mesa portion of a semiconductor substrate. A cavity is formed in a working surface of the semiconductor substrate. The semiconductor substrate is brought in contact with a glass piece made of a glass material and having a protrusion. The glass piece and the semiconductor substrate are arranged such that the protrusion extends into the cavity. The glass piece is bonded to the semiconductor substrate. The glass piece is in-situ bonded to the semiconductor substrate by pressing the glass piece against the semiconductor substrate. During the pressing a temperature of the glass piece exceeds a glass transition temperature and the temperature and a force exerted on the glass piece are controlled to fluidify the glass material and after re-solidifying the protrusion completely fills the cavity.
    Type: Application
    Filed: May 16, 2018
    Publication date: September 20, 2018
    Inventors: Alexander Breymesser, Andre Brockmeier, Carsten von Koblinski, Francisco Javier Santos Rodriguez
  • WAFER ARRANGEMENT AND METHOD FOR PROCESSING A WAFER
    Publication number: 20180261487
    Abstract: A wafer arrangement in accordance with various embodiments may include: a wafer; and a wafer support ring, wherein the wafer and the wafer support ring are configured to be releasably coupled to one another so that the wafer support ring can be uncoupled from the wafer without causing damage to the wafer or the wafer support ring.
    Type: Application
    Filed: April 12, 2018
    Publication date: September 13, 2018
    Inventors: Francisco Javier SANTOS RODRIGUEZ, Gerald LACKNER, Josef UNTERWEGER
  • Method of manufacturing a semiconductor device having a vertical edge termination structure
    Patent number: 10049912
    Abstract: A method of manufacturing a semiconductor device includes forming a frame trench extending from a first surface into a base substrate, forming, in the frame trench, an edge termination structure comprising a glass structure, forming a conductive layer on the semiconductor substrate and the edge termination structure, and removing a portion of the conductive layer above the edge termination structure. A remnant portion of the conductive layer forms a conductive structure that covers a portion of the edge termination structure directly adjoining a sidewall of the frame trench.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: August 14, 2018
    Assignee: Infineon Technologies AG
    Inventors: Alexander Breymesser, Andre Brockmeier, Elmar Falck, Francisco Javier Santos Rodriguez, Holger Schulze
  • Method for thinning substrates
    Patent number: 10049914
    Abstract: According to various embodiments, a method may include: providing a substrate having a first side and a second side opposite the first side; forming a buried layer at least one of in or over the substrate by processing the first side of the substrate; thinning the substrate from the second side of the substrate, wherein the buried layer includes a solid state compound having a greater resistance to the thinning than the substrate and wherein the thinning stops at the buried layer.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: August 14, 2018
    Assignee: Infineon Technologies AG
    Inventors: Roland Rupp, Hans-Joachim Schulze, Francisco Javier Santos Rodriguez, Iris Moder, Ingo Muri
  • Method of Manufacturing Semiconductor Devices by Using Epitaxy and Semiconductor Devices with a Lateral Structure
    Publication number: 20180226471
    Abstract: Epitaxy troughs are formed in a semiconductor substrate, wherein a matrix section of the semiconductor substrate laterally separates the epitaxy troughs and comprises a first semiconductor material. Crystalline epitaxy regions of a second semiconductor material are formed in the epitaxy troughs, wherein the second semiconductor material differs from the first semiconductor material in at least one of porosity, impurity content or defect density. From the epitaxy regions at least main body portions of semiconductor bodies of the semiconductor devices are formed.
    Type: Application
    Filed: January 31, 2018
    Publication date: August 9, 2018
    Inventors: Frank Hille, Andre Brockmeier, Francisco Javier Santos Rodriguez, Daniel Schloegl, Hans-Joachim Schulze
  • Wafer Carrier, Method for Manufacturing the Same and Method for Carrying a Wafer
    Publication number: 20180197766
    Abstract: A wafer carrier comprises a first foil, a second foil, and a chamber between the first and the second foil. The first foil has a perforation and is used for carrying the wafer. The first and the second foil are connected to each other so as to form the chamber. The chamber is configured to be evacuated to form a vacuum in the chamber, the vacuum causes an underpressure at the perforation, the underpressure forms a carrying force to the wafer to be carried.
    Type: Application
    Filed: March 8, 2018
    Publication date: July 12, 2018
    Inventors: Francisco Javier Santos Rodriguez, Roland Rupp, Ronny Kern, Josef Unterweger
  • Method for forming a semiconductor device and a semiconductor device
    Patent number: 10020226
    Abstract: In certain embodiments, a semiconductor device includes a plurality of semiconductor chips. Each semiconductor chip comprises a semiconductor body having a first side and a second side opposite the first side, a graphite substrate bonded to the second side of the semiconductor body and comprising an opening leaving an area of the second side of the semiconductor body uncovered by the graphite substrate, and a back-side metallization arranged in the opening of the graphite substrate and electrically contacting the area of the second side. The semiconductor device further includes a plurality of separation trenches each separating one of the plurality of semiconductor chips from an adjacent one of the plurality of semiconductor chips.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: July 10, 2018
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Roland Rupp, Wolfgang Lehnert, Francisco Javier Santos Rodriguez, Hans-Joachim Schulze
  • Semiconductor device having a defined oxygen concentration
    Patent number: 10014400
    Abstract: A semiconductor device includes: a semiconductor substrate having a first side, a second side opposite the first side, and a thickness; at least one semiconductor component integrated in the semiconductor substrate; a first metallization at the first side of the semiconductor substrate; and a second metallization at the second side of the semiconductor substrate. The semiconductor substrate has an oxygen concentration along a thickness line of the semiconductor substrate which has a global maximum at a position of 20% to 80% of the thickness relative to the first side. The global maximum is at least 2-times larger than the oxygen concentrations at each of the first side and the second side of the semiconductor substrate.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: July 3, 2018
    Assignee: Infineon Technologies AG
    Inventors: Helmut Oefner, Nico Caspary, Mohammad Momeni, Reinhard Ploss, Francisco Javier Santos Rodriguez, Hans-Joachim Schulze
  • METHOD FOR MANUFACTURING AN ELECTRONIC DEVICE AND METHOD FOR OPERATING AN ELECTRONIC DEVICE
    Publication number: 20180175069
    Abstract: According to various embodiments, an electronic device may include a carrier including at least a first region and a second region being laterally adjacent to each other; an electrically insulating structure arranged in the first region of the carrier, wherein the second region of the carrier is free of the electrically insulating structure; a first electronic component arranged in the first region of the carrier over the electrically insulating structure; a second electronic component arranged in the second region of the carrier; wherein the electrically insulating structure includes one or more hollow chambers, wherein the sidewalls of the one or more hollow chambers are covered with an electrically insulating material.
    Type: Application
    Filed: February 20, 2018
    Publication date: June 21, 2018
    Inventors: Thoralf Kautzsch, Alessia Scire, Steffen Bieselt, Franz Hirler, Anton Mauder, Wolfgang Scholz, Hans-Joachim Schulze, Francisco Javier Santos Rodriguez
  • Forming a Metal Contact Layer on Silicon Carbide and Semiconductor Device with Metal Contact Structure
    Publication number: 20180174840
    Abstract: A semiconductor device includes a silicon carbide semiconductor body and a metal contact structure. Interface particles including a silicide kernel and a carbon cover on a surface of the silicide kernel are formed directly between the silicon carbide semiconductor body and the metal contact structure. Between neighboring ones of the interface particles, the metal contact structure directly adjoins the silicon carbide semiconductor body.
    Type: Application
    Filed: December 19, 2017
    Publication date: June 21, 2018
    Inventors: Ravi Keshav Joshi, Romain Esteve, Roland Rupp, Francisco Javier Santos Rodriguez, Gerald Unegg
  • Forming a contact layer on a semiconductor body
    Patent number: 10002930
    Abstract: Disclosed is a method. The method includes forming a metal layer on a first surface of a semiconductor body; irradiating the metal layer with particles to move metal atoms from the metal layer into the semiconductor body and form a metal atom containing region in the semiconductor body; and annealing the semiconductor body. The annealing includes heating at least the metal atom containing region to a temperature of less than 500° C.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: June 19, 2018
    Assignee: Infineon Technologies AG
    Inventors: Roland Rupp, Jens Peter Konrath, Francisco Javier Santos Rodriguez, Carsten Schaeffer, Hans-Joachim Schulze, Werner Schustereder, Guenther Wellenzohn
  • Method of manufacturing semiconductor device with glass pieces
    Patent number: 9981844
    Abstract: A source material, which is based on a glass, is arranged on a working surface of a mold substrate. The mold substrate is made of a single-crystalline material. A cavity is formed in the working surface. The source material is pressed against the mold substrate. During pressing a temperature of the source material and a force exerted on the source material are controlled to fluidify source material. The fluidified source material flows into the cavity. Re-solidified source material forms a glass piece with a protrusion extending into the cavity. After re-solidifying, the glass piece may be bonded to the mold substrate. On the glass piece, protrusions and cavities can be formed with slope angles less than 80 degrees, with different slope angles, with different depths and widths of 10 micrometers and more.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: May 29, 2018
    Assignee: Infineon Technologies AG
    Inventors: Alexander Breymesser, Andre Brockmeier, Carsten von Koblinski, Francisco Javier Santos Rodriguez
  • Semiconductor Wafers and Semiconductor Devices with Barrier Layer and Methods of Manufacturing
    Publication number: 20180138353
    Abstract: A semiconductor ingot is sliced to obtain a semiconductor slice with a front side surface and a rear side surface parallel to the front side surface. A passivation layer is formed directly on at least one of the front side surface and the rear side surface. A barrier layer including least one of silicon carbide, a ternary nitride, and a ternary carbide is formed on the rear side surface.
    Type: Application
    Filed: November 9, 2017
    Publication date: May 17, 2018
    Inventors: Francisco Javier Santos Rodriguez, Roland Rupp, Hans-Joachim Schulze