Patents by Inventor Francois Pagette
Francois Pagette has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7253096Abstract: A bipolar transistor with raised extrinsic base and selectable self-alignment between the extrinsic base and the emitter is disclosed. The fabrication method may include the formation of a predefined thickness of a first extrinsic base layer of polysilicon or silicon on an intrinsic base. A dielectric landing pad is then formed by lithography on the first extrinsic base layer. Next, a second extrinsic base layer of polysilicon or silicon is formed on top of the dielectric landing pad to finalize the raised extrinsic base total thickness. An emitter opening is formed using lithography and RIE, where the second extrinsic base layer is etched stopping on the dielectric landing pad. The degree of self-alignment between the emitter and the raised extrinsic base is achieved by selecting the first extrinsic base layer thickness, the dielectric landing pad width, and the spacer width.Type: GrantFiled: November 30, 2005Date of Patent: August 7, 2007Assignee: International Business Machines CorporationInventors: Marwan H. Khater, James S. Dunn, David L. Harame, Alvin J. Joseph, Qizhi Liu, Francois Pagette, Stephen A. St. Onge, Andreas D. Stricker
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Publication number: 20070145533Abstract: A bipolar transistor has a collector that is contacted directly beneath a base-collector junction by metallization to reduce collector resistance. A conventional reach-through and buried layer, as well as their associated resistance, are eliminated. The transistor is well isolated, nearly eliminating well-to-substrate capacitance and device-to-device leakage current. The structure provides for improved electrical performance, including improved fT, Fmax and drive current.Type: ApplicationFiled: February 22, 2007Publication date: June 28, 2007Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David AHLGREN, Gregory FREEMAN, Francois PAGETTE, Christopher SCHNABEL, Anna TOPOL
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Patent number: 7217988Abstract: A bipolar transistor has a collector that is contacted directly beneath a base-collector junction by metallization to reduce collector resistance. A conventional reach-through and buried layer, as well as their associated resistance, are eliminated. The transistor is well isolated, nearly eliminating well-to-substrate capacitance and device-to-device leakage current. The structure provides for improved electrical performance, including improved fT, Fmax and drive current.Type: GrantFiled: June 4, 2004Date of Patent: May 15, 2007Assignee: International Business Machines CorporationInventors: David C. Ahlgren, Gregory G. Freeman, Francois Pagette, Christopher M. Schnabel, Anna W. Topol
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Patent number: 7180157Abstract: A double-polysilicon, self-aligned bipolar transistor has a collector region formed in a doped semiconductor substrate, an intrinsic counterdoped base formed on the surface of the substrate and a doped intrinsic emitter formed in the surface of the intrinsic base. An etch stop insulator layer overlies the intrinsic base layer above the collector. A base contact layer of a conductive material overlies the etch stop dielectric layer and the intrinsic base layer. A dielectric layer overlies the base contact layer. A wide window extends through the insulator layer and the base contact layer down to the insulator layer. An island or a peninsula is formed in the wide window leaving at least one narrowed window within the wide window, with sidewall spacers in either the wide window or the narrowed window. The narrowed windows are filled with doped polysilicon forming an extrinsic emitter with the intrinsic emitter formed below the extrinsic emitter in the surface of the intrinsic base.Type: GrantFiled: November 1, 2004Date of Patent: February 20, 2007Assignee: International Business Machines CorporationInventors: Gregory G. Freeman, Marwan H. Khater, Francois Pagette, Andreas D. Stricker
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Patent number: 7087940Abstract: A bipolar transistor structure and method of making the bipolar transistor are provided. The bipolar transistor includes a collector region, an intrinsic base layer overlying the collector region, and an emitter overlying the intrinsic base layer. An opened etch stop layer includes a layer of dielectric material overlying the intrinsic base, the opened etch stop layer self-aligned to the emitter. The bipolar transistor further includes a raised extrinsic base self-aligned to the emitter, the raised extrinsic base overlying the intrinsic base layer.Type: GrantFiled: April 22, 2004Date of Patent: August 8, 2006Assignee: International Business Machines CorporationInventors: Marwan H. Khater, Francois Pagette
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Publication number: 20060097350Abstract: Disclosed is a method of forming a transistor in an integrated circuit structure that begins by forming a collector in a substrate and an intrinsic base above the collector. Then, the invention patterns an emitter pedestal for the lower portion of the emitter on the substrate above the intrinsic base. Before actually forming the emitter or associates spacer, the invention forms an extrinsic base in regions of the substrate not protected by the emitter pedestal. After this, the invention removes the emitter pedestal and eventually forms the emitter where the emitter pedestal was positioned.Type: ApplicationFiled: November 10, 2004Publication date: May 11, 2006Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Marwan Khater, Francois Pagette
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Publication number: 20060081934Abstract: A bipolar transistor with raised extrinsic base and selectable self-alignment between the extrinsic base and the emitter is disclosed. The fabrication method may include the formation of a predefined thickness of a first extrinsic base layer of polysilicon or silicon on an intrinsic base. A dielectric landing pad is then formed by lithography on the first extrinsic base layer. Next, a second extrinsic base layer of polysilicon or silicon is formed on top of the dielectric landing pad to finalize the raised extrinsic base total thickness. An emitter opening is formed using lithography and RIE, where the second extrinsic base layer is etched stopping on the dielectric landing pad. The degree of self-alignment between the emitter and the raised extrinsic base is achieved by selecting the first extrinsic base layer thickness, the dielectric landing pad width, and the spacer width.Type: ApplicationFiled: November 30, 2005Publication date: April 20, 2006Inventors: Marwan Khater, James Dunn, David Harame, Alvin Joseph, Qizhi Liu, Francois Pagette, Stephen Onge, Andreas Stricker
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Patent number: 7002221Abstract: A bipolar transistor with raised extrinsic base and selectable self-alignment between the extrinsic base and the emitter is disclosed. The fabrication method may include the formation of a predefined thickness of a first extrinsic base layer of polysilicon or silicon on an intrinsic base. A dielectric landing pad is then formed by lithography on the first extrinsic base layer. Next, a second extrinsic base layer of polysilicon or silicon is formed on top of the dielectric landing pad to finalize the raised extrinsic base total thickness. An emitter opening is formed using lithography and RIE, where the second extrinsic base layer is etched stopping on the dielectric landing pad. The degree of self-alignment between the emitter and the raised extrinsic base is achieved by selecting the first extrinsic base layer thickness, the dielectric landing pad width, and the spacer width.Type: GrantFiled: August 29, 2003Date of Patent: February 21, 2006Assignee: International Business Machines CorporationInventors: Marwan H. Khater, James S. Dunn, David L. Harame, Alvin J. Joseph, Qizhi Liu, Francois Pagette, Stephen A. St. Onge, Andreas D. Stricker
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Publication number: 20050269664Abstract: A bipolar transistor has a collector that is contacted directly beneath a base-collector junction by metallization to reduce collector resistance. A conventional reach-through and buried layer, as well as their associated resistance, are eliminated. The transistor is well isolated, nearly eliminating well-to-substrate capacitance and device-to-device leakage current. The structure provides for improved electrical performance, including improved fT, Fmax and drive current.Type: ApplicationFiled: June 4, 2004Publication date: December 8, 2005Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David Ahlgren, Gregory Freeman, Francois Pagette, Christopher Schnabel, Anna Topol
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Patent number: 6960820Abstract: A self-aligned bipolar transistor structure having a raised extrinsic base comprising an outer region and an inner region of different doping concentrations and methods of fabricating the transistor are disclosed. More specifically, the self-alignment of the extrinsic base to the emitter is accomplished by forming the extrinsic base in two regions. First, a first material of silicon or polysilicon having a first doping concentration is provided to form an outer extrinsic base region. Then a first opening is formed in the first material layer by lithography within which a dummy emitter pedestal is formed, which results in forming a trench between the sidewall of the first opening and the dummy pedestal. A second material of a second doping concentration is then provided inside the trench forming a distinct inner extrinsic base extension region to self-align the raised extrinsic base edge to the dummy pedestal edge.Type: GrantFiled: July 1, 2003Date of Patent: November 1, 2005Assignee: International Business Machines CorporationInventors: Gregory G. Freeman, Marwan H. Khater, Francois Pagette
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Publication number: 20050236645Abstract: A bipolar transistor structure and method of making the bipolar transistor are provided. The bipolar transistor includes a collector region, an intrinsic base layer overlying the collector region, and an emitter overlying the intrinsic base layer. An opened etch stop layer includes a layer of dielectric material overlying the intrinsic base, the opened etch stop layer self-aligned to the emitter. The bipolar transistor further includes a raised extrinsic base self-aligned to the emitter, the raised extrinsic base overlying the intrinsic base layer.Type: ApplicationFiled: April 22, 2004Publication date: October 27, 2005Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Marwan Khater, Francois Pagette
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Publication number: 20050233535Abstract: A self-aligned bipolar transistor structure having a raised extrinsic base comprising an outer region and an inner region of different doping concentrations and methods of fabricating the transistor are disclosed. More specifically, the self-alignment of the extrinsic base to the emitter is accomplished by forming the extrinsic base in two regions. First, a first material of silicon or polysilicon having a first doping concentration is provided to form an outer extrinsic base region. Then a first opening is formed in the first material layer by lithography within which a dummy emitter pedestal is formed, which results in forming a trench between the sidewall of the first opening and the dummy pedestal. A second material of a second doping concentration is then provided inside the trench forming a distinct inner extrinsic base extension region to self-align the raised extrinsic base edge to the dummy pedestal edge.Type: ApplicationFiled: June 13, 2005Publication date: October 20, 2005Inventors: Gregory G. Freeman, Marwan H. Khater, Francois Pagette
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Publication number: 20050082642Abstract: A double-polysilicon, self-aligned bipolar transistor has a collector region formed in a doped semiconductor substrate, an intrinsic counterdoped base formed on the surface of the substrate and a doped intrinsic emitter formed in the surface of the intrinsic base. An etch stop insulator layer overlies the intrinsic base layer above the collector. A base contact layer of a conductive material overlies the etch stop dielectric layer and the intrinsic base layer. A dielectric layer overlies the base contact layer. A wide window extends through the insulator layer and the base contact layer down to the insulator layer. An island or a peninsula is formed in the wide window leaving at least one narrowed window within the wide window, with sidewall spacers in either the wide window or the narrowed window. The narrowed windows are filled with doped polysilicon forming an extrinsic emitter with the intrinsic emitter formed below the extrinsic emitter in the surface of the intrinsic base.Type: ApplicationFiled: November 1, 2004Publication date: April 21, 2005Inventors: Gregory Freeman, Marwan Khater, Francois Pagette, Andreas Stricker
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Publication number: 20050048735Abstract: A bipolar transistor with raised extrinsic base and selectable self-alignment between the extrinsic base and the emitter is disclosed. The fabrication method may include the formation of a predefined thickness of a first extrinsic base layer of polysilicon or silicon on an intrinsic base. A dielectric landing pad is then formed by lithography on the first extrinsic base layer. Next, a second extrinsic base layer of polysilicon or silicon is formed on top of the dielectric landing pad to finalize the raised extrinsic base total thickness. An emitter opening is formed using lithography and RIE, where the second extrinsic base layer is etched stopping on the dielectric landing pad. The degree of self-alignment between the emitter and the raised extrinsic base is achieved by selecting the first extrinsic base layer thickness, the dielectric landing pad width, and the spacer width.Type: ApplicationFiled: August 29, 2003Publication date: March 3, 2005Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Marwan Khater, James Dunn, David Harame, Alvin Joseph, Qizhi Liu, Francois Pagette, Stephen St. Onge, Andreas Stricker
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Patent number: 6861186Abstract: An image of an integrated circuit chip and optical kerf and their mirror image are formed within a single optical field. When a substrate pattern using this process is flipped over or reversed, the processed pattern appears the same as on the first side, equal to its own mirror image. Prior to the backside lithography, a portion of the second side is removed to allow detection of alignment marks on the first side from the second side of the substrate. Once the alignment marks are detected, the lithography continues as though the substrate was not flipped over at all.Type: GrantFiled: September 25, 2003Date of Patent: March 1, 2005Assignee: International Business Machines CorporationInventors: Francois Pagette, Christopher M. Schnabel
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Patent number: 6858485Abstract: A double-polysilicon, self-aligned bipolar transistor has a collector region formed in a doped semiconductor substrate, an intrinsic counterdoped base formed on the surface of the substrate and a doped emitter formed in the surface of the intrinsic base. Form an etch stop dielectric layer over the intrinsic base layer above the collector. Form a base contact layer of a conductive material over the etch stop dielectric layer and the intrinsic base layer. Form a second dielectric layer over the base contact layer. Etch a wide window through the dielectric layer and the base contact layer stopping the etching of the window at the etch stop dielectric layer. Form an island or a peninsula narrowing the wide window leaving at least one narrowed window within the wide window. Form sidewall spacers in the either the wide window or the narrowed window. Fill the windows with doped polysilicon to form an extrinsic emitter. Form an emitter below the extrinsic emitter in the surface of the intrinsic base.Type: GrantFiled: May 7, 2003Date of Patent: February 22, 2005Assignee: International Business Machines CorporationInventors: Gregory G. Freeman, Marwan H. Khater, Francois Pagette, Andreas D. Stricker
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Publication number: 20050012180Abstract: A self-aligned bipolar transistor structure having a raised extrinsic base comprising an outer region and an inner region of different doping concentrations and methods of fabricating the transistor are disclosed. More specifically, the self-alignment of the extrinsic base to the emitter is accomplished by forming the extrinsic base in two regions. First, a first material of silicon or polysilicon having a first doping concentration is provided to form an outer extrinsic base region. Then a first opening is formed in the first material layer by lithography within which a dummy emitter pedestal is formed, which results in forming a trench between the sidewall of the first opening and the dummy pedestal. A second material of a second doping concentration is then provided inside the trench forming a distinct inner extrinsic base extension region to self-align the raised extrinsic base edge to the dummy pedestal edge.Type: ApplicationFiled: July 1, 2003Publication date: January 20, 2005Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Gregory Freeman, Marwan Khater, Francois Pagette
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Publication number: 20040222496Abstract: A double-polysilicon, self-aligned bipolar transistor has a collector region formed in a doped semiconductor substrate, an intrinsic counterdoped base formed on the surface of the substrate and a doped emitter formed in the surface of the intrinsic base. Form an etch stop dielectric layer over the intrinsic base layer above the collector. Form a base contact layer of a conductive material over the etch stop dielectric layer and the intrinsic base layer. Form a second dielectric layer over the base contact layer. Etch a wide window through the dielectric layer and the base contact layer stopping the etching of the window at the etch stop dielectric layer. Form an island or a peninsula narrowing the wide window leaving at least one narrowed window within the wide window. Form sidewall spacers in the either the wide window or the narrowed window. Fill the windows with doped polysilicon to form an extrinsic emitter. Form an emitter below the extrinsic emitter in the surface of the intrinsic base.Type: ApplicationFiled: May 7, 2003Publication date: November 11, 2004Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Gregory G. Freeman, Marwan H. Khater, Francois Pagette, Andreas D. Stricker