Abstract: A switched capacitor amplifier having an amplification unit adapted to amplify a differential signal; a first switched capacitor block including a first plurality of capacitors operable to sample a first differential input signal during a first sampling phase and to drive the amplification unit during a first drive phase; and a second switched capacitor block including a second plurality of capacitors operable to sample a second differential input signal during a second sampling phase and to drive the amplification unit during a second drive phase.

Abstract: A switched capacitor amplifier having an amplification unit adapted to amplify a differential signal; a first switched capacitor block including a first plurality of capacitors operable to sample a first differential input signal during a first sampling phase and to drive the amplification unit during a first drive phase; and a second switched capacitor block including a second plurality of capacitors operable to sample a second differential input signal during a second sampling phase and to drive the amplification unit during a second drive phase.

Abstract: An embodiment of an amplifier circuit comprising a succession of amplification stages having at least a first amplification stage receiving a first signal and a second amplification stage downstream of the first amplification stage; a stage of unity gain capable of receiving the first signal and of providing a second signal corresponding to the low-impedance copy of the first signal; and a third amplification stage having its input connected to the output of the stage of unity gain by a capacitor and having its output connected to the output of the second amplification stage.

Abstract: An embodiment of an amplifier circuit comprising a succession of amplification stages having at least a first amplification stage receiving a first signal and a second amplification stage downstream of the first amplification stage; a stage of unity gain capable of receiving the first signal and of providing a second signal corresponding to the low-impedance copy of the first signal; and a third amplification stage having its input connected to the output of the stage of unity gain by a capacitor and having its output connected to the output of the second amplification stage.

Abstract: A method and device are disclosed for receiving digital television signals by a frequency tuner. The power of the signal is measured after an analog/digital conversion in the frequency tuner, and the gain thereof is controlled on the basis of this power measurement according to a predetermined control law. The power of the analog signal, tapped between an input amplifier stage and a first frequency transposition stage, or immediately after the first frequency transposition stage, is also measured. The measured power is compared with a predetermined power threshold so as to obtain first binary information, and the gain control law is set on the basis of the value of the first binary information.

Abstract: An amplifier circuit comprising an amplification chain having a differential output stage; a common mode correction block acting on the input of the output stage as a function of a common mode voltage at the output of said stage and introducing a phase shift between its input and its output for frequencies close to the cut-off frequency of the circuit; and, in parallel with the correction block, a means introducing no phase shift between its input and its output and having at frequencies greater than or equal to the circuit cut-off frequency an output impedance much smaller than the output impedance of the correction block.

Abstract: A circuit for correcting the offset of an amplification and filtering chain having a predetermined gain and cut-off frequency depending on the value of at least one capacitor, comprising: a correction means for subtracting from the chain input a correction signal depending on the value of a programmable digital word; a digital automaton for, in a setting phase, searching, then memorizing one of two consecutive values of the digital word between which the output signal of the chain switches sign, the input signal being canceled during a setting phase; and comprising a means for, during the setting phase, reducing the value of said at least one capacitor with respect to its normal operating value.

Abstract: An input stage for a video receiver includes a variable gain amplifier, an analog-to-digital converter for sampling a video signal and a digital processing unit for processing digital samples of the video signal. An analog regulating circuit sets an input potential at an input of the variable gain amplifier. A differential architecture is used for the variable gain amplifier and the digital analog converter. A conversion circuit between an input coupling capacitor and the variable gain amplifier allows generating the video signal on two channels in antiphase, which are centered on the common mode voltage. Such differential architecture allows reducing the amplitude of analog signals, which is particularly advantageous in the case of a low voltage supply delivering a few volts. In addition, linearity of the video signal processing is enhanced.

Abstract: A variable-gain amplifier with a differential input and differential output, including an attenuator block, receiving an input voltage and providing, on several outputs, voltages, each of which is equal to the attenuated input voltage; differential transconductor elements, each having a first input connected to a respective output of the attenuator block, and generating first and second positive currents and first and second negative currents; a current source assembly adapted to controlling the transconductance of each differential transconductor element according to an analog control signal; and an output block converting first and second input currents into a differential output voltage and providing a second input of each differential transconductor element with a feedback voltage depending on the output voltage.

Abstract: A device for controlling a voltage-controlled switch from a digital signal, comprising: a first means for providing the digital signal to the output terminal of the switch; a second means for biasing the switch control terminal to a level greater than the threshold voltage of the switch and smaller than the sum of said threshold voltage and of the maximum voltage of the digital signal; and a third means for adding or subtracting to said level said maximum voltage of the digital signal respectively at the rising and falling edges of the logic inverse of the digital signal.

Abstract: The method includes an adjustment phase in which a filtering device is operated as an oscillator, the frequency of oscillation of the filtering device is determined, and the characteristics of the filtering device are corrected with respect to the determined oscillation frequency and to a pre-established relation between the frequency of oscillation and the theoretical cutoff frequency, in such a way as to confer upon the filtering device a cutoff frequency equal to the theoretical cutoff frequency to within a tolerance. After the adjustment phase, a working phase takes place in which the filtering device carries out its filtering function.

Abstract: An amplifier circuit comprising an amplification chain having a differential output stage; a common mode correction block acting on the input of the output stage as a function of a common mode voltage at the output of said stage and introducing a phase shift between its input and its output for frequencies dose to the cut-off frequency of the circuit; and, in parallel with the correction block, a means introducing no phase shift between its input and its output and having at frequencies greater than or equal to the circuit cut-off frequency an output impedance much smaller than the output impedance of the correction block.

Abstract: A controllable assembly of current sources includes several first output terminals, with a first transistor associated with each first output terminal, the current on each first output terminal depending on the current flowing through the first transistor, and a circuit configured, in response to a predetermined variation of a control voltage, to successively progressively turn on, then progressively turn off, each first transistor. The first transistors are MOS transistors, and each first output terminal is associated with a current mirror formed of MOS transistors, the current mirror providing to the first output terminal a current depending on the current flowing through the first transistor.

Abstract: A circuit for correcting the offset of an amplification and filtering chain having a predetermined gain and cut-off frequency depending on the value of at least one capacitor, comprising: a correction means for subtracting from the chain input a correction signal depending on the value of a programmable digital word; a digital automaton for, in a setting phase, searching, then memorizing one of two consecutive values of the digital word between which the output signal of the chain switches sign, the input signal being canceled during a setting phase; and comprising a means for, during the setting phase, reducing the value of said at least one capacitor with respect to its normal operating value.

Abstract: A mirroring circuit operating at high frequencies is provided. The mirroring circuit includes a first branch having a first transistor in series with a first resistor, a second branch having a second transistor in series with a second resistor, and a servo circuit for controlling current flowing in the first branch and the second branch. The servo circuit includes a third transistor configured as a diode, a source of the third transistor coupled to a source of the first transistor, a fourth transistor configured as a shift lever, a source of the fourth transistor coupled to ground via a third resistor, a fifth transistor configured as a diode, a source of the fifth transistor coupled to a source of the second transistor, and a sixth transistor configured as a shift lever, a source of the sixth transistor coupled to ground via the third resistor.

Abstract: A variable-gain amplifier with a differential input and differential output, including an attenuator block, receiving an input voltage and providing, on several outputs, voltages, each of which is equal to the attenuated input voltage; differential transconductor elements, each having a first input connected to a respective output of the attenuator block, and generating first and second positive currents and first and second negative currents; a current source assembly adapted to controlling the transconductance of each differential transconductor element according to an analog control signal; and an output block converting first and second input currents into a differential output voltage and providing a second input of each differential transconductor element with a feedback voltage depending on the output voltage.

Abstract: A wideband differential amplifier includes a first differential stage connected to a Miller stage allowing an open-loop gain increase. The Miller stage includes a current source and a resistive-capacitive network causing a feedback into the current source. The feedback includes a portion of a Miller stage output signal having a high frequency range to move a bias point of the current source within the high frequency range. Thus, a gain of the Miller stage significantly increases towards the bias point.

Abstract: The method includes an adjustment phase in which a filtering device is operated as an oscillator, the frequency of oscillation of the filtering device is determined, and the characteristics of the filtering device are corrected with respect to the determined oscillation frequency and to a pre-established relation between the frequency of oscillation and the theoretical cutoff frequency, in such a way as to confer upon the filtering device a cutoff frequency equal to the theoretical cutoff frequency to within a tolerance. After the adjustment phase, a working phase takes place in which the filtering device carries out its filtering function.

Abstract: A controllable assembly of current sources including several first output terminals, a first transistor associated with each first output terminal, the current on each first output terminal depending on the current flowing through the first transistor, and a control means provided for, as a response to a predetermined variation of a control voltage, successively progressively turning on, then progressively turning off, each first transistor, in which the first transistors are MOS transistors, and in which each first output terminal is associated with a current mirror formed of MOS transistors, the current mirror providing to the first output terminal a current depending on the current flowing through the first transistor.

Abstract: A method and device are disclosed for receiving digital television signals by a frequency tuner. The power of the signal is measured after an analog/digital conversion in the frequency tuner, and the gain thereof is controlled on the basis of this power measurement according to a predetermined control law. The power of the analog signal, tapped between an input amplifier stage and a first frequency transposition stage, or immediately after the first frequency transposition stage, is also measured. The measured power is compared with a predetermined power threshold so as to obtain first binary information, and the gain control law is set on the basis of the value of the first binary information.