Patents by Inventor Francois Van Zanten

Francois Van Zanten has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030094999
    Abstract: A mirroring circuit operating at high frequencies is provided. The mirroring circuit includes a first branch having a first transistor in series with a first resistor, a second branch having a second transistor in series with a second resistor, and a servo circuit for controlling current flowing in the first branch and the second branch. The servo circuit includes a third transistor configured as a diode, a source of the third transistor coupled to a source of the first transistor, a fourth transistor configured as a shift lever, a source of the fourth transistor coupled to ground via a third resistor, a fifth transistor configured as a diode, a source of the fifth transistor coupled to a source of the second transistor, and a sixth transistor configured as a shift lever, a source of the sixth transistor coupled to ground via the third resistor.
    Type: Application
    Filed: November 18, 2002
    Publication date: May 22, 2003
    Applicant: STMICROELECTRONICS S.A.
    Inventors: Francois Van Zanten, Marc Sabut, Raymond Ribas
  • Publication number: 20030095209
    Abstract: An input stage for a video receiver includes a variable gain amplifier, an analog-to-digital converter for sampling a video signal and a digital processing unit for processing digital samples of the video signal. An analog regulating circuit sets an input potential at an input of the variable gain amplifier. A differential architecture is used for the variable gain amplifier and the digital analog converter. A conversion circuit between an input coupling capacitor and the variable gain amplifier allows generating the video signal on two channels in antiphase, which are centered on the common mode voltage. Such differential architecture allows reducing the amplitude of analog signals, which is particularly advantageous in the case of a low voltage supply delivering a few volts. In addition, linearity of the video signal processing is enhanced.
    Type: Application
    Filed: November 18, 2002
    Publication date: May 22, 2003
    Applicant: STMICROELECTRONICS S.A.
    Inventors: Francois Van Zanten, Marc Sabut, Raymond Ribas
  • Publication number: 20020167356
    Abstract: A wideband differential amplifier includes a first differential stage connected to a Miller stage allowing an open-loop gain increase. The Miller stage includes a current source and a resistive-capacitive network causing a feedback into the current source. The feedback includes a portion of a Miller stage output signal having a high frequency range to move a bias point of the current source within the high frequency range. Thus, a gain of the Miller stage significantly increases towards the bias point.
    Type: Application
    Filed: May 13, 2002
    Publication date: November 14, 2002
    Applicant: STMicroelectronics S.A.
    Inventors: Claude Renous, Francois Van-Zanten
  • Patent number: 6470084
    Abstract: A telephone line current amplifier comprises a current amplifying device comprising a first, second and third amplifier connected in cascade. The current from the third amplifier forms the output current of the current amplifying device. The current from the first amplifier subtracts from the current provided by the third amplifier, and the current from the second amplifier operates as a rectifier and outputs its current onto a power supply terminal. The power supply terminal is decoupled from ground via a capacitor. Another embodiment of the telephone line current amplifier comprises only two amplifiers if less severe distortion ratios are imposed.
    Type: Grant
    Filed: September 22, 1998
    Date of Patent: October 22, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: François Van Zanten
  • Patent number: 6169446
    Abstract: The present invention relates to a circuit including at least one analog processing cell having a time constant determined by a capacitor and a resistor. A calibration circuit comprises a bridge formed of a switched-capacitance resistor and of a resistor adjustable by means of a digital control signal; and a feedback loop to adjust the digital control signal so that the voltage at the midpoint of the bridge is equal to a predetermined fraction of the voltage applied across the bridge. The resistor of the processing cell is also adjustable by the digital control signal.
    Type: Grant
    Filed: February 17, 1999
    Date of Patent: January 2, 2001
    Assignee: STMicroelectronics S.A.
    Inventors: Serge Ramet, François Van Zanten
  • Patent number: 6002295
    Abstract: The present invention relates to a voltage regulator, including at least two input terminals for receiving, each, an independent supply voltage, and including a means for automatically selecting the highest supply voltage from among the voltages present at the input terminals, and a means for insulating the supply terminal associated with the lowest voltage from the rest of the circuit, these means introducing a very low voltage drop between the input terminal at the highest voltage and an output terminal of the regulator.
    Type: Grant
    Filed: October 21, 1997
    Date of Patent: December 14, 1999
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Marc Gens, Francois Van Zanten
  • Patent number: 4564855
    Abstract: A structure associating a high current NPN transistor with a PNP control transistor also able to withstand relatively high currents in an integrated circuit structure. This structure comprises an N.sup.+ type substrate overlaid by a P type epitaxied layer and a second N type epitaxied layer. The PNP transistor is disposed in the center of a region defined by two successive peripheral isolating walls. The NPN transistor is disposed in the annular zone. In this zone, the N.sup.+ substrate and the N layer are connected together by a buried N.sup.+ type layer locally short-circuiting the P type layer along a ring, thus isolating the central part of this layer at the level of the PNP transistor.
    Type: Grant
    Filed: March 8, 1983
    Date of Patent: January 14, 1986
    Assignee: Thomson CSF
    Inventor: Francois Van Zanten
  • Patent number: 4466011
    Abstract: In a bipolar integrated circuit, wherein the elementary components are formed in islands of an N-type epitaxial layer surrounded by P-type isolation walls, a protection against leakage currents is obtained by surrounding an island susceptible to receive negative voltage surges with an annular island. The isolation wall between the considered island and the annular island is connected to the potential of the most negative supply source and the isolation wall external to the annular island is connected thereto.
    Type: Grant
    Filed: May 13, 1981
    Date of Patent: August 14, 1984
    Assignee: Thomson-CSF
    Inventor: Francois Van Zanten
  • Patent number: 4410856
    Abstract: A frequency demodulator circuit having an automatic gain control. The circuit will find particular use in SECAM color television receivers. The demodulator has two inputs; one receives alternately the reference frequency (during a sampling interval) and the frequency to be demodulated (between the sampling intervals). The other input receives a voltage for correcting the slope of the demodulator. The correcting signal is updated during each sampling and is provided by a feedback loop from the output of the demodulator, a reference frequency, and a reference voltage.
    Type: Grant
    Filed: December 17, 1980
    Date of Patent: October 18, 1983
    Assignee: Thomson - CSF
    Inventor: Francois van Zanten