Abstract: In some embodiments, silicon-filled openings are formed having no or a low occurrence of voids in the silicon fill, while maintaining a smooth exposed silicon surface. In some embodiments, an opening in a substrate may be filled with silicon, such as amorphous silicon. The deposited silicon may have interior voids. This deposited silicon is then exposed to a silicon mobility inhibitor, such as an oxygen-containing species and/or a semiconductor dopant. The deposited silicon fill is subsequently annealed. After the anneal, the voids may be reduced in size and, in some embodiments, this reduction in size may occur to such an extent that the voids are eliminated.

Abstract: In some embodiments, silicon-filled openings are formed having no or a low occurrence of voids in the silicon fill, while maintaining a smooth exposed silicon surface. In some embodiments, an opening in a substrate may be filled with silicon, such as amorphous silicon. The deposited silicon may have interior voids. This deposited silicon is then exposed to a silicon mobility inhibitor, such as an oxygen-containing species and/or a semiconductor dopant. The deposited silicon fill is subsequently annealed. After the anneal, the voids may be reduced in size and, in some embodiments, this reduction in size may occur to such an extent that the voids are eliminated.

Abstract: An exemplary embodiment of the present invention provides a method of depositing of a film on semiconductor wafers. In a first step, a film thickness of 3 um or less is deposited on wafers accommodated in a wafer boat in a vertical furnace at a deposition temperature of the furnace while a deposition gas is flowing. During the first step, the temperature may be held substantially constant. In a second step, a temperature deviation or variation of at least 50° C. from the deposition temperature of the first step is applied and the furnace temperature is returned to the deposition temperature of the first step while the flow of the deposition gas is stopped. The first and second steps are repeated until a desired final film thickness is deposited.

Abstract: An exemplary embodiment of the present invention provides a method of depositing of a film on semiconductor wafers. In a first step, a film thickness of 3 um or less is deposited on wafers accommodated in a wafer boat in a vertical furnace at a deposition temperature of the furnace while a deposition gas is flowing. During the first step, the temperature may be held substantially constant. In a second step, a temperature deviation or variation of at least 50° C. from the deposition temperature of the first step is applied and the furnace temperature is returned to the deposition temperature of the first step while the flow of the deposition gas is stopped. The first and second steps are repeated until a desired final film thickness is deposited.

Abstract: A method for processing solar cells comprising: providing a vertical furnace to receive an array of mutually spaced circular semiconductor wafers for integrated circuit processing; composing a process chamber loading configuration for solar cell substrates, wherein a size of the solar cell substrates that extends along a first surface to be processed is smaller than a corresponding size of the circular semiconductor wafers, such that multiple arrays of mutually spaced solar cell substrates can be accommodated in the process chamber, loading the solar cell substrates into the process chamber; subjecting the solar cell substrates to a process in the process chamber.

Abstract: A method for processing solar cells comprising: providing a vertical furnace to receive an array of mutually spaced circular semiconductor wafers for integrated circuit processing; composing a process chamber loading configuration for solar cell substrates, wherein a size of the solar cell substrates that extends along a first surface to be processed is smaller than a corresponding size of the circular semiconductor wafers, such that multiple arrays of mutually spaced solar cell substrates can be accommodated in the process chamber, loading the solar cell substrates into the process chamber; subjecting the solar cell substrates to a process in the process chamber.

Abstract: A method for processing solar cells comprising: providing a vertical furnace to receive an array of mutually spaced circular semiconductor wafers for integrated circuit processing; composing a process chamber loading configuration for solar cell substrates, wherein a size of the solar cell substrates that extends along a first surface to be processed is smaller than a corresponding size of the circular semiconductor wafers, such that multiple arrays of mutually spaced solar cell substrates can be accommodated in the process chamber, loading the solar cell substrates into the process chamber; subjecting the solar cell substrates to a process in the process chamber.

Abstract: Substrates in a reaction chamber are sequentially exposed to at least three gas atmospheres: a first atmosphere of a first purge gas, a second atmosphere of a process gas and a third atmosphere of a second purge gas. The gases are introduced into the reaction chamber from one end of the chamber and exit from the opposite end. Successive gases entering the chamber are selected so that a stable interface with the immediately preceding gas can be maintained. For example, when the gases are fed into the chamber at the chamber's top end and are exhausted at the bottom end, the gases are chosen with successively lower molecular weights. In effect, each gas atmosphere stays on top of and pushes the previous gas atmosphere out of the chamber from the top down. Advantageously, the gases can be more effectively and completely removed from the chamber.

Abstract: Substrates in a reaction chamber are sequentially exposed to at least three gas atmospheres: a first atmosphere of a first purge gas, a second atmosphere of a process gas and a third atmosphere of a second purge gas. The gases are introduced into the reaction chamber from one end of the chamber and exit from the opposite end. Successive gases entering the chamber are selected so that a stable interface with the immediately preceding gas can be maintained. For example, when the gases are fed into the chamber at the chamber's top end and are exhausted at the bottom end, the gases are chosen with successively lower molecular weights. In effect, each gas atmosphere stays on top of and pushes the previous gas atmosphere out of the chamber from the top down. Advantageously, the gases can be more effectively and completely removed from the chamber.

Abstract: A semiconductor wafer is processed while being supported without mechanical contact. Instead, the wafer is supported by gas streams emanating from a large number of passages in side sections positioned very close to the upper and lower surface of the wafer. The gas heated by the side sections and the heated side sections themselves quickly heat the wafer to a desired temperature. Process gas directed to the “device side” of the wafer can be kept at a temperature that will not cause deposition on that side section, but yet the desired wafer temperature can be obtained by heating non-process gas from the other side section to the desired temperature. A plurality of passages around the periphery of the wafer on the non-processed side can be employed to provide purge gas flow that prevents process gas from reaching the non-processed side of the wafer and the adjacent area of that side section.

Abstract: Substrates in a reaction chamber are sequentially exposed to at least three gas atmospheres: a first atmosphere of a first purge gas, a second atmosphere of a process gas and a third atmosphere of a second purge gas. The gases are introduced into the reaction chamber from one end of the chamber and exit from the opposite end. Successive gases entering the chamber are selected so that a stable interface with the immediately preceding gas can be maintained. For example, when the gases are fed into the chamber at the chamber's top end and are exhausted at the bottom end, the gases are chosen with successively lower molecular weights. In effect, each gas atmosphere stays on top of and pushes the previous gas atmosphere out of the chamber from the top down. Advantageously, the gases can be more effectively and completely removed from the chamber.

Abstract: A semiconductor processing reactor comprises a reaction chamber with a gas exhaust and a mechanical seal at one end of the chamber. The seal seals off the chamber from the ambient environment and is purged with gas to prevent diffusion of ambient gases into the reaction chamber. Because the purge gas can diffuse through the seal into the reaction chamber, the purge gas is chosen based upon the process gas and the location of the seal and exhaust so that the molecular weight of the purge gas causes the purge gas, by the force of gravity or buoyancy, to remain in the portion of the reaction chamber containing the seal and the gas exhaust. Advantageously, keeping the purge gas at the same end of the chamber as the gas exhaust minimizes dilution of the process gas with the purge gas, thereby preventing the purge gas from detrimentally effecting process results.

Abstract: A hybrid cascade Model-Based Predictive control (MBPC) and conventional control system for thermal processing equipment of semiconductor substrates, and more in particular for vertical thermal reactors is described. In one embodiment, the conventional control system is based on a PID controller. In one embodiment, the MBPC algorithm is based on both multiple linear dynamic mathematical models and non-linear static mathematical models, which are derived from the closed-loop modeling control data by using the closed-loop identification method. In order to achieve effective dynamic linear models, the desired temperature control range is divided into several temperature sub-ranges. For each temperature sub-range, and for each heating zone, a corresponding dynamic model is identified. During temperature ramp up/down, the control system is provided with a fuzzy control logic and inference engine that switches the dynamic models automatically according to the actual temperature.

Abstract: Substrates in a reaction chamber are sequentially exposed to at least three gas atmospheres: a first atmosphere of a first purge gas, a second atmosphere of a process gas and a third atmosphere of a second purge gas. The gases are introduced into the reaction chamber from one end of the chamber and exit from the opposite end. Successive gases entering the chamber are selected so that a stable interface with the immediately preceding gas can be maintained. For example, when the gases are fed into the chamber at the chamber's top end and are exhausted at the bottom end, the gases are chosen with successively lower molecular weights. In effect, each gas atmosphere stays on top of and pushes the previous gas atmosphere out of the chamber from the top down. Advantageously, the gases can be more effectively and completely removed from the chamber.

Abstract: A semiconductor processing reactor comprises a reaction chamber with a gas exhaust and a mechanical seal at one end of the chamber. The seal seals off the chamber from the ambient environment and is purged with gas to prevent diffusion of ambient gases into the reaction chamber. Because the purge gas can diffuse through the seal into the reaction chamber, the purge gas is chosen based upon the process gas and the location of the seal and exhaust so that the molecular weight of the purge gas causes the purge gas, by the force of gravity or buoyancy, to remain in the portion of the reaction chamber containing the seal and the gas exhaust. Advantageously, keeping the purge gas at the same end of the chamber as the gas exhaust minimizes dilution of the process gas with the purge gas, thereby preventing the purge gas from detrimentally effecting process results.

Abstract: A pedestal for use in a high temperature vertical furnace for the processing of semiconductor wafers provides a closure and heat insulation for the lower end of the furnace and is a wafer boat support. The pedestal, comprising quartz-enveloped insulation material, supports a wafer boat at a boat support level and is provided with an upper section disposed above the boat support level. The upper section comprises enveloped insulating material. The envelope of the upper section is also formed of quartz and the insulating material in the upper section has a lower thermal conductance than the insulating material in a lower quartz enveloped section.

Abstract: A semiconductor wafer is processed while being supported without mechanical contact. Instead, the wafer is supported by gas streams emanating from a large number of passages in side sections positioned very close to the upper and lower surface of the wafer. The gas heated by the side sections and the heated side sections themselves quickly heat the wafer to a desired temperature. Process gas directed to the “device side” of the wafer can be kept at a temperature that will not cause deposition on that side section, but yet the desired wafer temperature can be obtained by heating non-process gas from the other side section to the desired temperature. A plurality of passages around the periphery of the wafer on the non-processed side can be employed to provide purge gas flow that prevents process gas from reaching the non-processed side of the wafer and the adjacent area of that side section.

Abstract: A support sleeve for supporting a high temperature process tube comprises one or more circumferential channels, each channel connected to either a feed for gas or a vacuum exhaust. One circumferential channel opens to the top surface of the sleeve, on which the process tube is supported to provide a gas/vacuum seal between the process tube and support sleeve. Another circumferential channel is connected to a gas feed and provided with gas injection holes, evenly distributed along the support sleeve perimeter to provide a cylindrically symmetrical injection of process gas into the process tube. Another circumferential channel is connected to an exhaust for gas and provided with gas exhaust holes, evenly distributed along the circumference of the support sleeve, to provide a cylindrically symmetric exhaust of process gases from the process tube.

Abstract: A hybrid cascade Model-Based Predictive control (MBPC) and conventional control system for thermal processing equipment of semiconductor substrates, and more in particular for vertical thermal reactors is described. In one embodiment, the conventional control system is based on a PID controller. In one embodiment, the MBPC algorithm is based on both multiple linear dynamic mathematical models and non-linear static mathematical models, which are derived from the closed-loop modeling control data by using the closed-loop identification method. In order to achieve effective dynamic linear models, the desired temperature control range is divided into several temperature sub-ranges. For each temperature sub-range, and for each heating zone, a corresponding dynamic model is identified. During temperature ramp up/down, the control system is provided with a fuzzy control logic and inference engine that switches the dynamic models automatically according to the actual temperature.

Abstract: A pedestal for use in a high temperature vertical furnace for the processing of semiconductor wafers provides a closure and heat insulation for the lower end of the furnace and is a wafer boat support. The pedestal, comprising quartz-enveloped insulation material, supports a wafer boat at a boat support level and is provided with an upper section disposed above the boat support level. The upper section comprises enveloped insulating material. The envelope of the upper section is also formed of quartz and the insulating material in the upper section has a lower thermal conductance than the insulating material in a lower quartz enveloped section.