Patents by Inventor Frank J. Juskey

Frank J. Juskey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5336931
    Abstract: A flow formed encapsulated integrated circuit package (100) includes a printed circuit substrate (160) having upper and lower opposed surfaces and one or more anchor holes (150). The one or more anchor holes (150) have an upper aperture in the upper surface and a lower aperture in the lower surface. One or more integrated circuit die (130) are electrically and mechanically attached to the upper surface of the substrate (160). In addition, a solder resist mask (190) is attached to the lower surface of the substrate which covers the aperture of the one or more anchor holes (150). Flow formed material (110) is formed around the integrated circuit die (130) so as to encapsulate the one or more integrated circuits (150), the flow formed material (110) covering at a least a portion of the upper surface of the printed circuit substrate (160) and extending substantially into the anchor hole (150).
    Type: Grant
    Filed: September 3, 1993
    Date of Patent: August 9, 1994
    Assignee: Motorola, Inc.
    Inventors: Frank J. Juskey, Douglas W. Hendricks
  • Patent number: 5313365
    Abstract: An encapsulated electronic package (10) is made by bonding one or more semiconductor devices or integrated circuits (16) to a printed circuit board with an adhesive (14), and covering with a glob top encapsulant (15). The printed circuit board has a metal circuit pattern (12) on one side, and, optionally, solder pads (27) on the second side. The glob top encapsulant covers the integrated circuit, portions of the metal circuit pattern, and portions of the printed circuit board surface. The printed circuit board, the adhesive, and the encapsulant are all made from the same type of resin. In the preferred embodiment of the invention, the resin used to make the printed circuit board, the adhesive, and the encapsulant is an organosilicon polymer comprised substantially of alternating polycyclic hydrocarbon residues and cyclic polysiloxane or siloxysilane residues linked through carbon-silicon bonds.
    Type: Grant
    Filed: June 30, 1992
    Date of Patent: May 17, 1994
    Assignee: Motorola, Inc.
    Inventors: Robert W. Pennisi, Glenn E. Gold, Frank J. Juskey, Glenn F. Urbish
  • Patent number: 5296046
    Abstract: A fluxing composition for soldering metals together, contains a carrier solvent, an oxide removing agent, and a nitrogen liberating compound. The oxide removing agent sublimes at or below the temperature at which the metals are soldered together. The nitrogen liberating compound sublimes or decomposes at below the temperature at which the metals are soldered together in order to provide a blanket of inert gas over the metals being soldered. The oxide removing agent is 2-amino-isophthalic acid, 5-amino-isophthalic acid, isophthalic acid, ammonium fluoborate, or ammonium salicylate. The compound that liberates nitrogen upon heating is 1,2-benz-3,4-anthraquinone, 1,2-benz-9,10-anthraquinone, 5,6-chrysoquinone, 6,12-chrysoquinone, 2,3-benzanthraquinone, 2-amino-isophthalic acid, 5-amino-isophthalic acid, or 5-isoquinoline carboxylonitrile. Electronic components are soldered to a circuit board by applying the fluxing composition to the circuit board.
    Type: Grant
    Filed: August 16, 1993
    Date of Patent: March 22, 1994
    Assignee: Motorola, Inc.
    Inventors: Frank J. Juskey, Douglas W. Hendricks
  • Patent number: 5296738
    Abstract: An integrated circuit package (10) comprises a semiconductor die (14) having a top surface and a bottom surface, and a substrate (16) for receiving the semiconductor die. The substrate should have an aperture(s) (18) below the semiconductor die for providing moisture relief during temperature excursions. An adhesive (20) applied to the substrate allows for mounting the semiconductor die to the substrate. Then, the semiconductor die is wirebonded to the substrate. Finally, an encapsulant (12) for sealing the top surface of the semiconductor die is formed over the semiconductor die and portions of the substrate.
    Type: Grant
    Filed: August 10, 1992
    Date of Patent: March 22, 1994
    Assignee: Motorola, Inc.
    Inventors: Bruce J. Freyman, Frank J. Juskey, Barry M. Miles
  • Patent number: 5264061
    Abstract: A three-dimensional printed circuit assembly is formed by first making a substrate (20). A substrate (20) is first formed from a photoactive polymer (14) that is capable of altering its physical state when exposed to a radiant beam (30). At this point, the substrate is only partially cured. A conductive circuit pattern (50) is then formed on the partially cured substrate. The substrate is then molded to create a three-dimensional structure, and then further cured to cause the photoactive polymer to harden.
    Type: Grant
    Filed: October 22, 1992
    Date of Patent: November 23, 1993
    Assignee: Motorola, Inc.
    Inventors: Frank J. Juskey, Anthony B. Suppelsa, Dale W. Dorinski
  • Patent number: 5232758
    Abstract: A non-hardening, solvent removable hydrophobic conformal coating is provided for electronic devices, such as printed circuit boards. The coating material comprises a metal alkyl benzyl sulfonate, together with a carrier and a solvent. The metal alkyl benzyl sulfonate may include compounds such as calcium eicosanylbenzyl sulfonate. The carrier may be any oxidized hydrocarbon, such as lauryl ethanoxylate, for example, and the solvent may be any low boiling aliphatic hydrocarbon. Though the coating is impervious to water, it may be readily and selectively removed using a small quantity of a non-polar organic solvent, such as mineral spirits or terpenes. Thus, although the electronic device is protected from corrosion, electromigration and physical harm by the coating, the coating may be easily, quickly and selectively removed in the event a component needs replacement, repair or adjustment.
    Type: Grant
    Filed: September 4, 1990
    Date of Patent: August 3, 1993
    Assignee: Motorola, Inc.
    Inventors: Frank J. Juskey, Anthony B. Suppelsa, Kenneth M. Wasko
  • Patent number: 5220489
    Abstract: An electronic package, comprising a circuit carrying substrate (30) and a semiconductor device (35). The substrate (30) has two opposing surfaces, the first or bottom surface having a plurality of solder pads (31) and the second or top surface having a circuitry pattern defined on it. A semiconductor device (35) is attached to the top surface of the circuit carrying substrate (30). A molded body (33) is formed completely around the semiconductor device (35) in order to encapsulate it, the molded body also substantially covering the top surface of the circuit carrying substrate (30). A layer of metal deposited directly on the molded body and the top surface of the circuit carrying substrate is delineated into another conductive circuitry pattern (38), with part of the pattern (36) connected to the circuitry pattern on the circuit carrying substrate. An electronic component (32) is mounted on the molded body (33) and electrically connected to the conductive circuitry pattern (38).
    Type: Grant
    Filed: October 11, 1991
    Date of Patent: June 15, 1993
    Assignee: Motorola, Inc.
    Inventors: Joaquin Barreto, Juan O. Alfonso, Frank J. Juskey
  • Patent number: 5218759
    Abstract: A method of making a pad array chip carrier package is disclosed. A semiconductor device (10) is bonded to a ceramic substrate (12). The semiconductor device may be attached to the substrate by wirebonding, tab bonding or flip chip bonding. The bonded assembly (16) is then attached to a flexible temporary support substrate (18) by means of an adhesive (19). The entire assembly is then placed into a mold cavity (20 and 22) and registered against the temporary support substrate (18). Plastic material (30) is molded about the semiconductor device and associated wirebonds in order to encapsulate the device. After removal from the mold, the encapsulated assembly is removed from the temporary support substrate (18) by peeling the temporary support substrate (18) from the circuit substrate.
    Type: Grant
    Filed: March 18, 1991
    Date of Patent: June 15, 1993
    Assignee: Motorola, Inc.
    Inventors: Frank J. Juskey, Lonnie L. Bernardoni, Bruce J. Freyman, Anthony B. Suppelsa
  • Patent number: 5177669
    Abstract: An integrated circuit package (10) is formed to reveal the active circuitry (15) on the die surface. An integrated circuit die (12) is mounted on a die mounting portion (32) of a metal lead frame (30) in such a manner that the die is supported on the lead frame by the perimeter portion of the die. The active circuitry (15) on the die is connected to the various metal frame leads (33) by wire bonds (18) between the bond pads on the die and the metal lead frame. Plastic molding material (50) is then molded to encapsulate the wire bond pads (17), the perimeter of the integrated circuit die (16), the wire bonds (18), a portion of the leads (33), the perimeter portion of the back of the die (22), and the lead frame die mounting portion (32). The plastic material is formed so as to expose the active circuitry on the face of the die and a central portion on the back of the die.
    Type: Grant
    Filed: March 2, 1992
    Date of Patent: January 5, 1993
    Assignee: Motorola, Inc.
    Inventors: Frank J. Juskey, Anthony B. Suppelsa, Linda K. Berrian
  • Patent number: 5166772
    Abstract: A shielded semiconductor package and a method for manufacturing the package is provided. The shielded semiconductor package comprises a substrate (10) having a metallization pattern (12, 13), with one portion of the metallization pattern being a circuit ground (13). A semiconductor device (16) is electrically interconnected (17) to the metallization pattern (12). A perforated metal shield or screen (18) covers the semiconductor device (16) and is electrically and mechanically attached to the metallization circuit ground (13) in order to shield the semiconductor device (16) from radio frequency energy. A resin material (14) is transfer molded about the semiconductor device, the electrical interconnections, and the metal screen to form the completed package.
    Type: Grant
    Filed: February 22, 1991
    Date of Patent: November 24, 1992
    Assignee: Motorola, Inc.
    Inventors: Keith D. Soldner, Frank J. Juskey, Bruce J. Freyman, Barry M. Miles
  • Patent number: 5153385
    Abstract: A transfer molded pad array chip carrier is formed by mounting and wirebonding a semiconductor device (12) on a printed circuit board (10). The bottom side of the printed circuit board may have an array of solderable surfaces (24). A polymer coating (18) is applied over the semiconductor device (12), the wirebonds (16), and the top side of the printed circuit board (10) and cured. The coating (18) is then sputter etched in a partial vacuum to enhance the adhesion of the transfer molding compound (20) to the printed circuit board (10). The semiconductor device is encapsulated by a transfer molding process. The polymer coating (18) also provides a barrier to alpha particle emission, improves the moisture resistance of the completed package and reduces stress at the surface of the device.
    Type: Grant
    Filed: March 18, 1991
    Date of Patent: October 6, 1992
    Assignee: Motorola, Inc.
    Inventors: Frank J. Juskey, Lonnie L. Bernardoni, Thomas J. Swirbel, Barry M. Miles
  • Patent number: 5132778
    Abstract: Briefly, according to the invention, a transfer molding compound is made from an epoxide resin, a cyanate ester, and a catalyst. The molding compound is used to encapsulate semiconductor devices to fabricate individual packages or to encapsulate devices mounted directly on a circuit carrying substrate.
    Type: Grant
    Filed: September 17, 1990
    Date of Patent: July 21, 1992
    Assignee: Motorola, Inc.
    Inventors: Frank J. Juskey, Robert W. Pennisi, Marc V. Papageorge
  • Patent number: 5077633
    Abstract: A die pad (108) with a punched hole providing a throughway (110) is affixed upon the chip carrier base 100. Such throughway permits the electronic interconnection of the die backside (112) to a conductive runner (104) by electrically conductive material (110) set between the die backside (112) and the conductive runner (104).
    Type: Grant
    Filed: May 1, 1989
    Date of Patent: December 31, 1991
    Assignee: Motorola Inc.
    Inventors: Bruce J. Freyman, Barry M. Miles, Frank J. Juskey
  • Patent number: 5075820
    Abstract: A circuit component 100 or (200) comprising typically of a hollow body 101 (201) and a plurality of solderable terminations (102 and 103 (202 and 203) is being disclosed. Internal to said circuit component 100 (200) is a plurality of electrodes 104 and 106 (204 and 206). A filling point 108 (208) is provided so as to fill the volume of said circiut component (100 (200 ) with a specific compound 114 (214) having a desired electrical characteristics including dielectric constant. A method for manufacturing said circuit component 100 (200) is disclosed.
    Type: Grant
    Filed: August 6, 1990
    Date of Patent: December 24, 1991
    Assignee: Motorola, Inc.
    Inventors: Frank J. Juskey, Anthony J. Suppelsa, Anthony B. Suppelsa
  • Patent number: 5065122
    Abstract: A multilayer substrate having an integral transmission line structure 300 is disclosed. The transmission line structure 300 is formed by metallizing a fluroplastic substrate on the inner surface 112 and outer surface 114 in order to form a transmission line. The metallized inner surface forms a conductive runner 106, while the outer metallized surface 114 forms a ground plane, with the fluroplastic substrate being the dielectric. The transmission line structure 300 is then encapsulated by two substrate layers (402, 404).
    Type: Grant
    Filed: September 4, 1990
    Date of Patent: November 12, 1991
    Assignee: Motorola, Inc.
    Inventors: Frank J. Juskey, Anthony B. Suppelsa, Jill L. Flaugher
  • Patent number: 5019673
    Abstract: A flip-chip package for integrated circuits is provided by over-molding an integrated circuit assembly which includes a flip-chip mounted to a very thin chip carrier. The flip-chip includes an array of bumped pads which fill an array of matching conductive through holes on the chip carrier and securely couple thereto. The chip carrier includes an array of bumped contacts on its back surface which correspond to the bumped pads of the flip-chip. The transfer over molding of the integrated circuit assembly provides a layer of epoxy around the exposed surfaces of the flip-chip providing an environmentally protected and removable integrated circuit package.
    Type: Grant
    Filed: August 22, 1990
    Date of Patent: May 28, 1991
    Assignee: Motorola, Inc.
    Inventors: Frank J. Juskey, Barry M. Miles, Marc V. Papageorge
  • Patent number: 4940181
    Abstract: A pad grid array comprises an array of cavities (12) formed in a circuit carrying substrate (10) that are metallized (18, 20, and 22) to provide electrical conductivity. The metallized cavities are preferably hemispherical in shape and approximately the size of the solder bumps (30) coupled to a solder bumped chip carrier (28) that will be mounted thereon. Flux (26) is applied to each of the metallized cavities before positioning the solder bumped chip (28) carrier over the pad grid array. Proper mounting can be detected by tactile sensing in either human or robotic assemblers when the solder bumps "drop" into the metallized cavities.
    Type: Grant
    Filed: April 6, 1989
    Date of Patent: July 10, 1990
    Assignee: Motorola, Inc.
    Inventors: Frank J. Juskey, Jr., Barry M. Miles, Anthony B. Suppelsa