Patents by Inventor Frank Scott
Frank Scott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7832812Abstract: An apparatus and method for securing a wheel to an axle that is particularly useful when the axle has fractured. The apparatus connects to the axle, for example at the axle flange, and also connects to the wheel hub assembly. A stabilizer contacts the axle conferring extra strength and stability to the apparatus, for example by extending inside of the hollow fractured axle. A reinforcement member can optionally be used to more firmly secure the apparatus to the axle. Methods for using the apparatus are also provided.Type: GrantFiled: December 9, 2008Date of Patent: November 16, 2010Inventor: John Frank Scott
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Patent number: 7819124Abstract: Some embodiments of a tobacco article may include tobacco disposed in a porous matrix. The tobacco article may provide tobacco, tobacco constituents, or both tobacco and tobacco constituents to the consumer's mouth in the form of particles, liquid, or vapor so as to provide tobacco satisfaction to the consumer. In some circumstances, the tobacco may be integrally molded with a plastic material so that at least a portion of the tobacco is disposed in pores of the matrix.Type: GrantFiled: January 23, 2007Date of Patent: October 26, 2010Assignee: U.S. Smokeless Tobacco CompanyInventors: James Arthur Strickland, Frank Scott Atchley
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Patent number: 7798319Abstract: Some embodiments of a tobacco product package device can be used to enhance freshness and other characteristics of tobacco products or other products contained therein. Certain features can improve product freshness both during shelf life and during consumer use.Type: GrantFiled: March 11, 2008Date of Patent: September 21, 2010Assignee: U.S. Smokeless Tobacco CompanyInventors: David Karl Bried, James Arthur Strickland, Mark T. Nielsen, Frank Scott Atchley, Lamar Eugene Walters, II, Gregory A. Pace
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Method of forming source and drain regions utilizing dual capping layers and split thermal processes
Patent number: 7785970Abstract: Source and drain regions are formed in a first-type semiconductor device. Then, a high tensile stress capping layer is formed over the source and drain regions. A thermal process is then performed to re-crystallize the source and drain regions and to introduce tensile strain into the source and drain regions of the first-type semiconductor device. Afterwards, source and drain regions are formed in a second-type semiconductor device. Then, a high compressive stress capping layer is formed over the source and drain regions of the second-type semiconductor device. A thermal process is performed to re-crystallize the source and drain regions and to introduce compressive strain into the source and drain regions of the second-type semiconductor device.Type: GrantFiled: August 20, 2007Date of Patent: August 31, 2010Assignee: Texas Instruments IncorporatedInventors: Frank Scott Johnson, Shaofeng Yu -
Patent number: 7763540Abstract: A method for fabricating a semiconductor device includes forming a silicided gate utilizing a CMP stack. The CMP stack includes a first liner formed over the underlying semiconductor device and a first dielectric layer formed over the first liner layer. The first dielectric layer is formed to approximately the height of the gate. A second liner layer is formed over the first dielectric layer. Since the first dielectric layer is formed to approximately the height of the gate, the second liner over the moat regions is at approximately the height of the first liner over the gate. A CMP process is performed to expose the first liner over the top of the gate. Since the first dielectric layer is formed to the height of the gate, a portion of the second liner remains over the moat regions after the CMP process. Afterwards, the gate is exposed and a silicidation is performed to create a silicided gate.Type: GrantFiled: April 27, 2007Date of Patent: July 27, 2010Assignee: Texas Instruments IncorporatedInventors: Frank Scott Johnson, Freidoon Mehrad
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Publication number: 20100170522Abstract: A smokeless tobacco product includes a plurality of orally disintegrable granules. Each granule has a core and at least one layer surrounding the core. The at least one layer includes tobacco particles and a binder. Also disclosed are methods of making tobacco granules that comprise a core and at least one layer having tobacco particles and a binder.Type: ApplicationFiled: December 18, 2009Publication date: July 8, 2010Applicant: U.S. SMOKELESS TOBACCO COMPANYInventors: Yan Helen Sun, Frank Scott Atchley
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Publication number: 20100163062Abstract: Tobacco articles having tobacco disposed in a porous matrix. The tobacco articles can provide tobacco to an adult consumer in the form of particles, liquid, or vapor so as to furnish tobacco satisfaction to the consumer. The tobacco can be integrally molded with a plastic material so that at least a portion of the tobacco is disposed in pores of the matrix.Type: ApplicationFiled: December 30, 2009Publication date: July 1, 2010Applicant: U.S. SMOKELESS TOBACCO COMPANYInventors: Frank Scott Atchley, James Arthur Strickland, James M. Rossman
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Patent number: 7687339Abstract: Methods for fabricating a FinFET structure are provided. One method comprises forming a hard mask layer on a gate-forming material layer having a first portion and a second portion. A plurality of mandrels are fabricated on the hard mask layer and overlying the first portion and the second portion of the gate-forming material layer. A sidewall spacer material layer is deposited overlying the plurality of mandrels. The sidewall spacer material layer overlying the first portion of the gate-forming material layer is partially etched. Sidewall spacers are fabricated from the sidewall spacer material layer, the sidewall spacers being adjacent sidewalls of the plurality of mandrels. The plurality of mandrels are removed, the hard mask layer is etched using the sidewall spacers as an etch mask, and the gate-forming material layer is etched using the etched hard mask layer as an etch mask.Type: GrantFiled: February 4, 2009Date of Patent: March 30, 2010Assignee: Advanced Micro Devices, Inc.Inventors: Richard Schultz, Frank Scott Johnson
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Publication number: 20090286375Abstract: A method of forming sidewall spacers for a gate in a semiconductor device includes re-oxidizing/annealing silicon of the substrate and silicon of the gate after formation of the gate. The substrate is re-oxidized by performing an anneal in an inert atmosphere or ambient. The substrate may be re-oxidized/annealing after depositing an oxide layer covering the substrate and gate. Additionally, the substrate may be re-oxidized/annealing after forming the gate without depositing the oxide layer.Type: ApplicationFiled: May 19, 2008Publication date: November 19, 2009Inventors: Mahalingam Nandakumar, Said Ghneim, Frank Scott Johnson
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Publication number: 20090266119Abstract: A locking clamp device is provided with first and second clamping members. The first clamping member includes a base member with a first clamping surface and a locking member movable with respect to the base member between a securing position and a releasing position. The second clamping member is slidably engaged with the first clamping member and selectively movable to a plurality of clamping positions. The second clamping member includes a second clamping surface opposite the first clamping surface. The lockout device further includes a means for preventing movement of the locking member from the securing position to the releasing position. The locking member is configured to secure the second clamping member in one of the plurality of clamping positions when the locking member is in the securing position.Type: ApplicationFiled: April 28, 2008Publication date: October 29, 2009Applicant: MASTER LOCK COMPANY LLCInventors: Michael BROJANAC, Mark JOHNSON, Frank SCOTT, John WEBER
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Patent number: 7581420Abstract: A lockout device is provided for an instrument having a body and an actuating member extending from the body for operating the instrument. The lockout device includes a bottom member, a cover member, and a flexible member. The bottom member is adapted to be positioned over the body and includes a first holding portion and an aperture for receiving the actuating member. The cover member is connectable to the bottom member for movement between a closed position and an open position, and includes a covering portion for covering the actuating member in the closed position, and a second holding portion adapted to abut the first holding portion in the closed position. The flexible member has a first end connected to one of the bottom member and the cover member. The bottom member and cover member are adapted to receive a cinching portion of the flexible member between the first and second holding portions.Type: GrantFiled: June 13, 2006Date of Patent: September 1, 2009Assignee: Master Lock Company LLCInventors: Rebecca Manthe, Frank Scott, Michael Brojanac, Scott Czarnecki
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Patent number: 7581423Abstract: A protective cover for a keyway disposed on an end surface of a lock is provided. A housing is adapted to be assembled over the lock end surface. The housing includes an opening that surrounds the keyway. At least one door is disposed in the housing opening. The door includes an edge for aligning with the keyway in a key insertion position. When a key is pressed against the door, the door moves away from the keyway, providing a key opening in the housing opening for insertion of the key into the keyway. At least one door biasing member engages the door and biases the edge of the door toward the keyway. The door is mounted on a pivot member disposed in the housing opening such that the pivot member and door pivot within the opening when the key is inserted into the keyway and turned in the lock. At least one pivot biasing member engages the pivot member to hold the edge of the door in alignment with the keyway when the keyway is in the key insertion position.Type: GrantFiled: May 2, 2006Date of Patent: September 1, 2009Assignee: Master Lock Company LLCInventors: Mike Brojanac, Gary Burmesch, Frank Scott
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Patent number: 7556229Abstract: A clamp for securing an item includes a locking rod, first and second clamping members, and a retainer. The locking rod includes an elongated body and a locking member connected to a first end of the elongated body. The locking member is movable between a clamping position and a release position. The first clamping member includes a first opening for receiving a second end of the locking rod body therethrough. The second clamping member is adapted to align with the first clamping member to receive the item therebetween. The retainer is connected to the second clamping member and includes a second opening for receiving the second end of the locking rod body and an interlocking feature for engaging a corresponding interlocking feature on the locking rod body when the locking rod body is in a first rotational position.Type: GrantFiled: June 19, 2006Date of Patent: July 7, 2009Assignee: Master Lock Company LLCInventors: Joe Elliott, Frank Scott
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Publication number: 20090166629Abstract: A method of forming an integrated circuit having an NMOS transistor and a PMOS transistor is disclosed. The method includes performing pre-gate processing in a NMOS region and a PMOS region over and/or in a semiconductor body, and depositing a polysilicon layer over the semiconductor body in both the NMOS and PMOS regions. The method further includes performing a first type implant into the polysilicon layer in one of the NMOS region and PMOS region, and performing an amorphizing implant into the polysilicon layer in both the NMOS and PMOS regions, thereby converting the polysilicon layer into an amorphous silicon layer. The method further includes patterning the amorphous silicon layer to form gate electrodes, wherein a gate electrode resides in both the NMOS and PMOS regions.Type: ApplicationFiled: September 30, 2008Publication date: July 2, 2009Applicant: Texas Instruments IncorporatedInventors: Freidoon Mehrad, Jinhan Choi, Frank Scott Johnson
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Publication number: 20090126746Abstract: Some embodiments of a tobacco article may include tobacco disposed in a porous matrix. The tobacco article may provide tobacco, tobacco constituents, or both tobacco and tobacco constituents to the consumer's mouth in the form of particles, liquid, or vapor so as to provide tobacco satisfaction to the consumer. In some circumstances, the tobacco may be integrally molded with a plastic material so that at least a portion of the tobacco is disposed in pores of the matrix.Type: ApplicationFiled: January 23, 2009Publication date: May 21, 2009Inventors: James Arthur Strickland, Frank Scott Atchley
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Publication number: 20090125865Abstract: The present disclosure is directed a method for preparing photomask patterns. The method comprises receiving drawn pattern data for a design database. The drawn pattern data describes first device features and second device features, the second device features being associated with design specifications for providing a desired connectivity of the first device features to the second device features. At least a first plurality of the first device features have drawn patterns that will not result in sufficient coverage to effect the desired connectivity. Photomask patterns are formed for the first device features, wherein the photomask patterns for the first plurality of the first device features will result in the desired coverage. Integrated circuit devices formed using the principles of the present disclosure are also taught.Type: ApplicationFiled: November 14, 2007Publication date: May 14, 2009Inventors: Thomas J. Aton, Carl A. Vickery, Frank Scott Johnson, James Walter Blatchford, Benjamen Michael Rathsack, Benjamin McKee
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Publication number: 20090053865Abstract: Source and drain regions are formed in a first-type semiconductor device. Then, a high tensile stress capping layer is formed over the source and drain regions. A thermal process is then performed to re-crystallize the source and drain regions and to introduce tensile strain into the source and drain regions of the first-type semiconductor device. Afterwards, source and drain regions are formed in a second-type semiconductor device. Then, a high compressive stress capping layer is formed over the source and drain regions of the second-type semiconductor device. A thermal process is performed to re-crystallize the source and drain regions and to introduce compressive strain into the source and drain regions of the second-type semiconductor device.Type: ApplicationFiled: August 20, 2007Publication date: February 26, 2009Inventors: Frank Scott Johnson, Shaofeng Yu
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Publication number: 20080268631Abstract: A method for fabricating a semiconductor device includes forming a silicided gate utilizing a CMP stack. The CMP stack includes a first liner formed over the underlying semiconductor device and a first dielectric layer formed over the first liner layer. The first dielectric layer is formed to approximately the height of the gate. A second liner layer is formed over the first dielectric layer. Since the first dielectric layer is formed to approximately the height of the gate, the second liner over the moat regions is at approximately the height of the first liner over the gate. A CMP process is performed to expose the first liner over the top of the gate. Since the first dielectric layer is formed to the height of the gate, a portion of the second liner remains over the moat regions after the CMP process. Afterwards, the gate is exposed and a silicidation is performed to create a silicided gate.Type: ApplicationFiled: April 27, 2007Publication date: October 30, 2008Inventors: Frank Scott Johnson, Freidoon Mehrad
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Publication number: 20080206973Abstract: An improved method of forming a fully silicided (FUSI) gate in both NMOS and PMOS transistors of the same MOS device is disclosed. In one example, the method comprises forming oxide and nitride etch-stop layers over a top portion of the gates of the NMOS and PMOS transistors, forming a blocking layer over the etch-stop layer, planarizing the blocking layer down to the etch-stop layer over the gates, and removing a portion of the etch-stop layer overlying the gates. The method further includes implanting a preamorphizing species into the exposed gates to amorphize the gates, thereby permitting uniform silicide formation thereafter at substantially the same rates in the NMOS and PMOS transistors. The method may further comprise removing any remaining oxide or blocking layers, forming the gate silicide over the gates to form the FUSI gates, and forming source/drain silicide in moat areas of the NMOS and PMOS transistors.Type: ApplicationFiled: February 26, 2007Publication date: August 28, 2008Inventors: Frank Scott Johnson, Freidoon Mehrad, Jiong-Ping Lu
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Publication number: 20080000278Abstract: A lanyard includes a tether that can be connected to a catch to secure a lock mechanism to a surface located in proximity to a lock receiving interface that is configured to receive the lock mechanism. The lock mechanism is thus maintained near the lock receiving interface when the lock mechanism is not received in the lock receiving interface.Type: ApplicationFiled: June 6, 2007Publication date: January 3, 2008Applicant: MASTER LOCK COMPANY LLCInventors: Michael BROJANAC, Joe ELLIOT, Dwayne LARSEN, Frank SCOTT