Patents by Inventor Frederic-Xavier Gaillard

Frederic-Xavier Gaillard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240011068
    Abstract: Fluid transfer membrane (84) including a porous wall (82) of n-doped silicon including pores (54) extending entirely across its thickness, each pore having a diameter of less than or equal to 400 nm and an aspect ratio of greater than or equal to 20.
    Type: Application
    Filed: July 6, 2023
    Publication date: January 11, 2024
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Frederic-Xavier GAILLARD, Yoko OTSUKA
  • Publication number: 20230175034
    Abstract: Methods for characterizing micro-organisms may include (a) depositing micro-organisms on a porous medium with a first and a second surface and pores extending from the first surface to the second surface; (b) arranging the porous medium on the surface of a nutrient medium contained in a chamber, the second surface being arranged in contact with the nutrient medium; (c) moving the porous medium in relation to the chamber; (d) positioning the porous medium between an infrared light source and an image sensor, the light source being configured to emit an incident light wave in an emission wavelength; (e) illuminating micro-organisms retained on the porous medium, using the light source and acquiring an image using the image sensor, the image allowing an observation of at least one colony of micro-organisms; and (f) characterizing the colony of microorganisms from the image acquired in the illuminating (e).
    Type: Application
    Filed: April 1, 2021
    Publication date: June 8, 2023
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Pierre MARCOUX, Victor BIARDEAU, Mathieu DUPOY, Frederic-Xavier GAILLARD, Joel LE GALUDEC
  • Patent number: 11049724
    Abstract: A method for producing at least one pattern in a substrate is provided, including providing a substrate having a front face surmounted by at least one masking layer carrying at least one mask pattern, carrying out an ion implantation of the substrate so as to form at least one first zone having a resistivity ?1 less than a resistivity ?2 of at least one second non-modified zone, after the ion implantation step, immersing the substrate in an electrolyte, and removing the at least one first zone selectively at the at least one second zone, the removing including at least an application of an electrochemistry step to the substrate to cause a porosification of the at least one first zone selectively at the at least one second zone.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: June 29, 2021
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Lamia Nouri, Frederic-Xavier Gaillard, Stefan Landis, Nicolas Posseme
  • Patent number: 10854494
    Abstract: Method for producing an interface for assembling temporarily a microelectronic support and a handle, comprising at least the formation of a first layer comprising at least one material capable of releasing at least one chemical species under the action of a physical-chemical treatment, the formation of a second layer comprising at least one material capable of receiving the at least one chemical species so as to cause its embrittlement, and the embrittlement of the interface by application of a heat treatment, such that the at least one species is released from the first layer and reacts with all or part of the material of the second layer.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: December 1, 2020
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Jean Charbonnier, Frederic-Xavier Gaillard
  • Patent number: 10563319
    Abstract: A process for making at least one porous area (ZP) of a microelectronic structure in at least one part of an conducting active layer (6), the active layer (6) forming a front face of a stack, the stack comprising a back face (2) of conducting material and an insulating layer (4) interposed between the active layer (6) and the back face (2), said process comprising the steps of: a) making at least one contact pad (14) between the back face (2) and the active layer (6) through the insulation layer (2), b) placing the stack into an electrochemical bath, c) applying an electrical current between the back face (2) and the active layer (6) through the contact pad (14) causing porosification of an area (ZP) of the active layer (6) in the vicinity of the contact pad (14), d) forming the microelectronic structure.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: February 18, 2020
    Assignee: COMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Eric Ollier, Frederic-Xavier Gaillard, Carine Marcoux
  • Publication number: 20190006221
    Abstract: Method for producing an interface for assembling temporarily a microelectronic support and a handle, comprising at least: the formation of a first layer comprising at least one material capable of releasing at least one chemical species under the action of a physical-chemical treatment, the formation of a second layer comprising at least one material capable of receiving the at least one chemical species so as to cause its embrittlement, the embrittlement of the interface by application of a heat treatment, such that the at least one species is released from the first layer and reacts with all or part of the material of the second layer.
    Type: Application
    Filed: July 2, 2018
    Publication date: January 3, 2019
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Jean CHARBONNIER, Frederic-Xavier GAILLARD
  • Patent number: 9997395
    Abstract: This method includes the following steps: a) providing a first structure successively including a substrate, an electronic device and a dielectric layer; b) providing a second structure successively including a substrate, an active layer, an intermediate layer, a first semiconducting layer and a porous second semiconducting layer; c) bonding the first and second structures by direct bonding between the dielectric layer and the porous second semiconducting layer; d) removing the substrate of the second structure so as to expose the active layer; e) adding dopants to the first semiconducting layer or to the active layer; f) irradiating the first semiconducting layer by a pulse laser so as to thermally activate the corresponding dopants.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: June 12, 2018
    Assignee: COMMISSARIAT À L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Claire Fenouillet-Beranger, Frédéric-Xavier Gaillard, Benoit Mathieu, Fabrice Nemouchi
  • Publication number: 20170352583
    Abstract: This method includes the following steps: a) providing a first structure successively including a substrate, an electronic device and a dielectric layer; b) providing a second structure successively including a substrate, an active layer, an intermediate layer, a first semiconducting layer and a porous second semiconducting layer; c) bonding the first and second structures by direct bonding between the dielectric layer and the porous second semiconducting layer; d) removing the substrate of the second structure so as to expose the active layer; e) adding dopants to the first semiconducting layer or to the active layer; f) irradiating the first semiconducting layer by a pulse laser so as to thermally activate the corresponding dopants.
    Type: Application
    Filed: June 7, 2017
    Publication date: December 7, 2017
    Applicant: COMMISSARIAT À L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Claire FENOUILLET-BERANGER, Frédéric-Xavier GAILLARD, Benoit MATHIEU, Fabrice NEMOUCHI
  • Patent number: 9379024
    Abstract: A method for manufacturing a microelectronic device is provided, including forming a first semiconductor material layer on a first region of a top surface of a substrate; and forming a second semiconductor material layer on a second region of the top surface of the substrate distinct from the first region, forming a first metallic layer above the first layer; forming a first contact layer of a first intermetallic compound or solid solution; forming a first sacrificial layer in an upper portion of the first contact layer; forming a second sacrificial layer in an upper portion of the second layer; removing all of the second sacrificial layer so as to expose a residual portion of the second layer; partially removing the first sacrificial layer; forming a second metallic layer above said residual portion; and forming a second contact layer of a second intermetallic compound or solid solution.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: June 28, 2016
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Claire Fournier, Frederic-Xavier Gaillard, Fabrice Nemouchi
  • Patent number: 9236540
    Abstract: The light-emitting diode includes first and second layers of semiconductor material, having opposite conductivity types, an active light-emitting area located between the first and second layers of semiconductor material, an electrode arranged on the first layer of semiconductor material and a photonic crystal formed in the first layer of semiconductor material. The photonic crystal and the electrode are separated by a distance optimized to simultaneously promote the electric injection and minimize the light absorption in the LED.
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: January 12, 2016
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Vincent Reboud, Stefan Landis, Frederic-Xavier Gaillard
  • Publication number: 20150329986
    Abstract: A process for making at least one porous area (ZP) of a microelectronic structure in at least one part of an conducting active layer (6), the active layer (6) forming a front face of a stack, the stack comprising a back face (2) of conducting material and an insulating layer (4) interposed between the active layer (6) and the back face (2), said process comprising the steps of: a) making at least one contact pad (14) between the back face (2) and the active layer (6) through the insulation layer (2), b) placing the stack into an electrochemical bath, c) applying an electrical current between the back face (2) and the active layer (6) through the contact pad (14) causing porosification of an area (ZP) of the active layer (6) in the vicinity of the contact pad (14), d) forming the microelectronic structure.
    Type: Application
    Filed: October 15, 2014
    Publication date: November 19, 2015
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Eric OLLIER, Frederic-Xavier Gaillard, Carine Marcoux
  • Patent number: 9096427
    Abstract: Method for making at least one first suspended part of a microelectronic or nanoelectronic structure from a monolithic part of a first substrate, the method comprising the following steps: make a first etching with a first given depth in the monolithic substrate to define the suspended part, deposit a protective layer on at least the side edges of the first etching, make a second etching with a second depth in the first etching, make a physicochemical treatment of at least part of the zone located under the suspended structure so as to modify it, and release the suspended part by removal of the physicochemically treated part.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: August 4, 2015
    Assignee: Commissariat à l'énergie atomique et aux énergies alternatives
    Inventors: Sofiane Ben Mbarek, Sophie Giroud, Frederic-Xavier Gaillard
  • Publication number: 20150194349
    Abstract: The invention relates to a method for manufacturing a microelectronic device comprising, on the base of a substrate: a formation of a first layer of a first semiconductor material on a first region of a top surface of the substrate; a formation of a second layer of a second semiconductor material, on a second region, distinct from the first region, of the top surface of the substrate; it comprises, after the formation of a second layer: a formation of a first metallic layer above the first layer; a formation of a first contact layer of a first intermetallic compound or solid solution comprising at least one portion of the first layer and at least one portion of the first metallic layer; a formation of a first sacrificial layer by oxidation, over a thickness e1, of an upper portion of the first contact layer, and the formation of a second sacrificial layer by oxidation, over a thickness e2, of an upper portion of the second layer; removal of the whole of the second sacrificial layer so as to expose a residu
    Type: Application
    Filed: January 7, 2015
    Publication date: July 9, 2015
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Claire FOURNIER, Frederic-Xavier GAILLARD, Fabrice NEMOUCHI
  • Publication number: 20150129538
    Abstract: A method for production of a capacitive sensor including a carrier whereupon electrodes separated from each other by a porous material rest, the porous material being made by porosifying trenches formed in a carrier.
    Type: Application
    Filed: May 13, 2013
    Publication date: May 14, 2015
    Inventors: Hubert Grange, Jean-Sebastien Danel, Frédéric-Xavier Gaillard
  • Publication number: 20150069443
    Abstract: The light-emitting diode includes first and second layers of semiconductor material, having opposite conductivity types, an active light-emitting area located between the first and second layers of semiconductor material, an electrode arranged on the first layer of semiconductor material and a photonic crystal formed in the first layer of semiconductor material. The photonic crystal and the electrode are separated by a distance optimized to simultaneously promote the electric injection and minimize the light absorption in the LED.
    Type: Application
    Filed: September 9, 2014
    Publication date: March 12, 2015
    Inventors: Vincent REBOUD, Stefan LANDIS, Frederic-Xavier GAILLARD
  • Publication number: 20140357006
    Abstract: Method for making at least one first suspended part of a microelectronic or nanoelectronic structure from a monolithic part of a first substrate, the method comprising the following steps: make a first etching with a first given depth in the monolithic substrate to define the suspended part, deposit a protective layer on at least the side edges of the first etching, make a second etching with a second depth in the first etching, make a physicochemical treatment of at least part of the zone located under the suspended structure so as to modify it, and release the suspended part by removal of the physicochemically treated part.
    Type: Application
    Filed: May 23, 2014
    Publication date: December 4, 2014
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Sofiane BEN MBAREK, Sophie Giroud, Frederic-Xavier Gaillard
  • Patent number: 8617908
    Abstract: A method for producing a substrate, the method including: forming a porous zone in an inner layer of the substrate; progressively thinning a thickness of the substrate towards the inner layer including the porous zone; completing the progressively thinning by polishing; and controlled stopping of the polishing by detecting the porous zone during the polishing, the detecting including measuring at least one measurable physical parameter admitting a significant variation during a transition between two layers.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: December 31, 2013
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Frederic-Xavier Gaillard, Fabrice Nemouchi
  • Patent number: 8545932
    Abstract: A porous silicon zone is metallized by performing in situ reduction of metallic ions dissolved in an aqueous solution and fixing of the metallic particles obtained on said zone in a single step. This step consists in particular in bringing the solution containing the metallic ions into contact with the zone to be metallized, the surface whereof has previously been functionalized to enable in situ reduction of the metallic ions and fixing of the metallic particles. Functionalization of the porous silicon zone is achieved by grafting two particular and distinct types of chemical functions. The first function used is a chelating chemical function for the metallic ions and/or for the metal corresponding to the metallic ions, whereas the second function is a reducing chemical function for the metallic ions. Such a metallization can be used for producing an electrically conducting porous diffusion layer of a fuel cell.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: October 1, 2013
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Frederic-Xavier Gaillard, Olivier Raccurt
  • Patent number: 8470689
    Abstract: The method for forming a multilayer structure on a substrate comprises providing a stack successively comprising an electron hole blocking layer, a first layer made from N-doped semiconductor material having a dopant concentration greater than or equal to 1018 atoms/cm3 or P-doped semiconductor material, and a second layer made from semiconductor material of different nature. A lateral electric contact pad is made between the first layer and the substrate, and the material of the first layer is subjected to anodic treatment in an electrolyte.
    Type: Grant
    Filed: November 10, 2011
    Date of Patent: June 25, 2013
    Assignees: Commissariat a l'Energie Atomique et aux Energies Alternatives, STMicroelectronics (Crolles 2) SAS
    Inventors: Sébastien Desplobain, Frederic-Xavier Gaillard, Yves Morand, Fabrice Nemouchi
  • Patent number: 8324073
    Abstract: A method for producing an electro-mechanical microsystem including movable mechanical parts, said method including a phase of releasing at least one movable mechanical part, wherein the releasing phase includes the following steps: formation of at least one porous zone in a first wafer of a semiconductor material; formation of at least a pattern of a material that makes at least one movable mechanical part on a front face of the first wafer and at least a partial encapsulation of the pattern in a sacrificial layer; release of the movable mechanical part through a rear face of the first wafer throughout the porous zone, using a solvent of the sacrificial layer.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: December 4, 2012
    Assignee: Comissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Frederic-Xavier Gaillard, Fabrice Nemouchi