Abstract: A communication apparatus includes a radio frequency circuit that operates on a radio frequency signal and a digital processing circuit coupled to the radio frequency circuit. The digital processing circuit includes a first timing circuit that provides timed signals to control timing of system operations during an active mode of operation of the digital processing circuit, and a second timing circuit that provides timing signals to control timing of system operations during an active mode of operation of the radio frequency circuit. In one particular embodiment, at least a portion of the first timing circuit is disabled when the radio frequency circuit is active (receiving and/or transmitting).

Abstract: A wireless communication apparatus includes a processor core and a security unit. The processor core may receive digital content encrypted with a first encryption key and may store the encrypted digital content within a memory unit of the wireless communication apparatus. The processor core may also receive a second encryption key encrypted with a third encryption key and may store the encrypted second encryption key within the memory unit. The security unit may decrypt the second encryption key using a fourth encryption key that was stored within a programmable memory unit such as a one-time programmable memory, for example. The wireless communication apparatus further includes an encryption/decryption unit that may decrypt the digital content into clear text digital content using the second encryption key. The clear text digital content may be stored with another memory unit such as a random access memory (RAM), for example.

Abstract: A wireless communication apparatus includes a processor core that is coupled to a security unit and to a memory. The security unit is further coupled to a programmable memory unit such as a one-time programmable memory, for example. During programming of the wireless communication apparatus a signature may be generated, using a first encryption key, and stored within the memory. The signature may be based upon at least a portion of received information that is used to control operation of the wireless communication apparatus. The security unit may be configured to decrypt the signature using a second encryption key that may be stored within the programmable memory unit. The security unit may also compare a result of decrypting the signature with additional information to determine whether the result is the same as the additional information.

Abstract: A communication apparatus includes a radio frequency circuit that operates on a radio frequency signal and a digital processing circuit coupled to the radio frequency circuit. The digital processing circuit includes a plurality of bus masters coupled to a shared bus. A bus arbiter is provided for arbitrating between requests to access the bus by a first bus master and one or more other bus masters. Accesses by the one or more other bus masters to the bus are restricted in response to a signal indicative of a change in a mode of operation of the RF circuit. In one particular implementation, a communication apparatus employs time domain isolation wherein the digital processing circuit may be placed in a shutdown mode when the radio frequency circuit is active.

Abstract: A communication apparatus including a digital processing circuit coupled to a radio frequency (RF) circuit and to a serial communications device. The serial communications device may be configured to buffer data communicated between the digital processing circuit and an external device. A portion of the serial communications device may be disabled during an active mode of operation of the RF circuit. The serial communications device may include a flow control logic circuit configured to control a data stream between the digital processing circuit and the external device while a portion of the serial communications device is disabled. In some embodiments, a portion of the digital processing circuit may be disabled during an active mode of operation of the RF circuit.

Abstract: A system includes a communication apparatus coupled to a test subsystem through a converter. The test subsystem may be configured to initiate an audio test of the communication apparatus and receive in response a set of audio test data at a predetermined constant data rate. The communication apparatus may be configured to enable output of audio test data during inactive periods of operation of an RF circuit of the communication apparatus and to disable output of audio test data during active periods of operation of the RF circuit. The converter may be configured to receive the set of audio test data from the communication apparatus and provide the set of audio test data to the test subsystem at the predetermined constant data rate during the active and the inactive periods of operation of the RF circuit.

Abstract: A communication apparatus including a radio frequency (RF) circuit coupled to a digital processing circuit and an interface circuit coupled to an authentication device. The RF circuit may be configured to operate on a radio frequency signal. A portion of the digital processing circuit may be disabled during an active mode of operation of the RF circuit. The interface circuit may be configured to buffer data communicated between the digital processing circuit and an authentication device during the active mode of operation of the RF circuit. In one embodiment, the interface circuit includes a memory and memory control logic to buffer data available for transmission to and/or received from the authentication device. In some embodiments, the digital processing circuit includes a processing unit configured to process authentication data received from the authentication device. In these and other embodiments, the authentication device may be a subscriber identity module (SIM).

Abstract: A wireless communication system is provided that includes RF circuitry and signal processing circuitry. The signal processing circuitry includes a dedicated frequency burst (FB) search hardware circuit which exhibits relatively low noise in comparison with other digital processing circuitry, such as a DSP and MCU, within the system. The RF circuitry, dedicated FB search hardware circuit and the other digital processing circuitry can each be activated and inactivated. In one embodiment, when the RF circuitry and the dedicated FB search hardware are active, other digital processing circuitry remains inactive to avoid noise problems that could degrade reception and interfere with the FB search hardware locating the FB. Noise problems in the system are thus desirably reduced.

Abstract: A method of operating a radio-frequency (RF) circuitry and a signal-processing circuitry in a mobile telephone apparatus includes at least partially disabling the signal-processing circuitry while transmitting or receiving signals. In one example, a processor is efficiently disabled by generating and servicing an interrupt of relatively high priority. One advantage of this example is that preexisting, legacy code can be maintained, while still achieving the desired objectives. The processor can be enabled by generating and servicing a second high priority interrupt.

Abstract: A method of operating a radio-frequency (RF) circuitry and a signal-processing circuitry in a mobile telephone apparatus includes at least partially disabling the signal-processing circuitry while transmitting or receiving signals. In one example, a processor is efficiently disabled by generating and servicing an interrupt of relatively high priority. One advantage of this example is that preexisting, legacy code can be maintained, while still achieving the desired objectives. The processor can be enabled by generating and servicing a second high priority interrupt.

Abstract: A method of operating a radio-frequency (RF) circuitry and a signal-processing circuitry in a mobile telephone apparatus includes at least partially disabling the signal-processing circuitry while transmitting or receiving signals. In one example, a processor is efficiently disabled by generating and servicing an interrupt of relatively high priority. One advantage of this example is that preexisting, legacy code can be maintained, while still achieving the desired objectives. The processor can be enabled by generating and servicing a second high priority interrupt.

Abstract: A communication apparatus includes a radio frequency circuit that operates on a radio frequency signal and a digital processing circuit coupled to the radio frequency circuit. The digital processing circuit includes a first timing circuit that provides timed signals to control timing of system operations during an active mode of operation of the digital processing circuit, and a second timing circuit that provides timing signals to control timing of system operations during an active mode of operation of the radio frequency circuit. In one particular embodiment, at least a portion of the first timing circuit is disabled when the radio frequency circuit is active (receiving and/or transmitting).

Abstract: Apparatus and methods for scanning a keypad of a communications device in a manner that tends to minimize interference with transceiver operation, such as a RF transceiver. In one embodiment, a controller receives a periodic signal of the communications device and provides a scan signal to cause the keypad to be scanned. In a sleep mode a keypad scan is performed only subsequent to a keypad activation. However, if the communications device is in use a keypad scan is performed once per frame at predetermined intervals, in one embodiment.

Abstract: A communication apparatus includes a radio frequency circuit that operates on a radio frequency signal and a digital processing circuit coupled to the radio frequency circuit. The digital processing circuit includes a plurality of bus masters coupled to a shared bus. A bus arbiter is provided for arbitrating between requests to access the bus by a first bus master and one or more other bus masters. Accesses by the one or more other bus masters to the bus are restricted in response to a signal indicative of a change in a mode of operation of the RF circuit. In one particular implementation, a communication apparatus employs time domain isolation wherein the digital processing circuit may be placed in a shutdown mode when the radio frequency circuit is active.

Abstract: A method of operating a radio-frequency (RF) circuitry and a signal-processing circuitry in a mobile telephone apparatus includes at least partially disabling the signal-processing circuitry while transmitting or receiving signals. In one example, a processor is efficiently disabled by generating and servicing an interrupt of relatively high priority. One advantage of this example is that preexisting, legacy code can be maintained, while still achieving the desired objectives. The processor can be enabled by generating and servicing a second high priority interrupt.