Abstract: A static output signal is generated using a static storage element (104) and transmitted to a NDL gate (110) over a transmission path (112) that is characterized by a user-specified multi-cycle timing constraint that is used to create appropriate verification tests of the apparatus. The multi-cycle timing constraint may be a pragma that is interpreted by the compiler of a timing analysis tool such as PATHMILL to automatically check the set-up and hold times of the static signal relative to the rising edge or falling edge of user-specified clock signal pulses. The same pragma is interpreted by the compiler of a functional verification tools such as VIS to create statements that test the behavior of the apparatus during the clock signal pulses other than the user-specified clock signal pulses tested by the timing analysis tool.

Abstract: A method of efficiently simulating logic designs comprising signals that are capable of having more than two unique decimal values and one or more unique drive states, such as designs based upon the new N-nary logic design style, is disclosed. The present invention includes a signal model that models N-nary signal value, drive strength, and signal definition information in a specific format that supports the ability of the simulator to simulate the operation of the N-nary logic gates such as adders, buffers, and multiplexers by arithmetically and logically manipulating the unique decimal values of the N-nary signals. The simulator comprises an input logic signal model reader, an arithmetic/logical operator, an output logic signal model generator, and an output message generator that generates one or more output- or input-signal-specific output messages that pack relevant simulation data into a format optimized to the architecture of the simulation host.

Abstract: The present invention is a grid that is a monitor that detects a cross product of design verification events and reports a single status event to a database. One embodiment of the present invention comprises axes declarations, logic expressions, and a grid declaration. An axes declaration produces a cross product of verification events. A logic expressions evaluates whether a specific verification event has occurred. A grid declaration returns the status event. The present invention further comprises a grid where the cross-product of verification events comprises a fully or a sparsely populated cross-product of verification events. Additionally, the present invention further comprises a grid that uses N-Nary signals. And, the present invention comprises a parser to translate the monitor source file code into a standard computer language code.

Abstract: A computer program assigns a unique linear index value to a multivariate cell in a sparsely populated or fully populated n-dimensional matrix of data values. The computer program identifies the n ordered axes of the matrix wherein each said axis corresponds to a category of data and has an axis variable and an axis size. The computer program sets the n axis variables to a positive or zero integer value that uniquely corresponds to one of the states of the categories of data. The computer program converts the n axis variables to a unique linear index value by multiplying the integer value of each axis variable except the nth said axis variable by the product of the sizes of each higher-order axis than the axis to which said axis variable corresponds, summing the results, and adding the integer value of the nth said axis variable.

Abstract: The monitor manager manages the execution of monitors during the simulation of a digital design. The monitor manager (20) includes an instance generator (32) that creates executable instances (38) of monitors that may be time-dependent monitors, an activation manager (34) that assigns instances to be active or inactive, and an execution unit (36) that executes active instances and receives returned status values passed, failed, active, or error. Executable instances of time-dependent monitors are software state machines having a state variable, one or more time-dependent variables, and at least two state-driven code blocks, at least one of which might be either a cycle-dependent code block that tests for a specific cycle-dependent condition, or an event-dependent code block that tests for a specific event-dependent condition. In either case, the state-driven code block increments the time-dependent variable, and, when the condition has been satisfied, increments the state variable.

Abstract: A static output signal is generated using a static storage element (104) and transmitted to a NDL gate (110) over a transmission path (112) that is characterized by a user-specified multi-cycle timing constraint that is used to create appropriate verification tests of the apparatus. The multi-cycle timing constraint may be a pragma that is interpreted by the compiler of a timing analysis tool such as PATHMILL to automatically check the set-up and hold times of the static signal relative to the rising edge or falling edge of user-specified clock signal pulses. The same pragma is interpreted by the compiler of a functional verification tools such as VIS to create statements that test the behavior of the apparatus during the clock signal pulses other than the user-specified clock signal pulses tested by the timing analysis tool.

Abstract: A random number indexing method and apparatus includes an index array 302 that uniquely identifies each pseudo-random number in a sequence of numbers generated by a pseudo-random number generator 202. A computer program 102 provides a seed value to the pseudo-random number generator and populates the index array. The computer program uses the identifying indicia in the index array to call for and receive pseudo-random numbers.

Abstract: The present invention is a method and apparatus for building a software system in a networked software development environment, utilizing existing software version control and build tools such as RCS and MAKE. Source and object files are loaded into network caches shared by multiple users at local workstations. At individual workstations, a cache link structure generated from a user-created build list is provided to the software building program, which then builds the desired software system using links to cached files. The present invention thus minimizes the amount of computing resources required to build software programs by eliminating the need to store multiple local copies of building block software files, and to rebuild object files that may be unchanged from prior builds. A method for maintaining and updating network caches to maximize the efficiency of cache link creation is also disclosed.

Abstract: The present invention is a method and apparatus for building a software system in a networked software development environment, utilizing existing software version control and build tools such as RCS and MAKE. Source and object files are loaded into network caches shared by multiple users at local workstations. At individual workstations, a cache link structure generated from a user-created build list is provided to the software building program, which then builds the desired software system using links to cached files. The present invention thus minimizes the amount of computing resources required to build software programs by eliminating the need to store multiple local copies of building block software files, and to rebuild object files that may be unchanged from prior builds. A method for maintaining and updating network caches to maximize the efficiency of cache link creation is also disclosed.

Abstract: A software monitor runs during the simulation of a digital design to detect and report event combinations to a database for test coverage analysis. The monitor is a grid that includes n ordered axis declarations 72 that each correspond to a functional attribute and list at least two valid functional states, logic expressions 78 that test for the functional states and set axis variables, and a grid declaration 80 that converts the axis variables to a unique linear index value corresponding to the cross-product of the achieved functional states and records hits. The linear index is calculated by multiplying the integer value of each axis variable (except the nth axis variable) by the product of the sizes of each higher-order axis than the axis to which said axis variable corresponds, summing the results, and adding the integer value of the nth said axis variable.