Patents by Inventor Fritz Redeker
Fritz Redeker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9058975Abstract: Presented is a cleaning solution according to one embodiment of the present invention that includes a corrosion inhibitor, a solubilizing agent, an oxygen scavenger, and a complexing agent also capable as a pH adjustor. Another embodiment of the present invention includes cleaning solutions that include a pH adjustor, an optional complexing agent, and a corrosion inhibitor. The cleaning solutions may have a solubilizing agent optionally present, may have a surfactant optionally present, and may have a dielectric etchant optionally present.Type: GrantFiled: September 7, 2008Date of Patent: June 16, 2015Assignee: Lam Research CorporationInventors: Artur Kolics, Fritz Redeker
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Patent number: 9006893Abstract: An electronic device which in one embodiment comprises a metallization stack is provided. The metallization stack comprises a barrier metal deposited electrolessly and a substantially gold-free wetting layer deposited electrolessly. Additionally, the barrier metal contacts the wetting layer, where the wetting layer is wettable by solder.Type: GrantFiled: August 22, 2013Date of Patent: April 14, 2015Assignee: Lam Research CorporationInventors: Artur Kolics, William T. Lee, Fritz Redeker
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Patent number: 8970027Abstract: One aspect of the present invention is a method of processing a substrate. In one embodiment, the method comprises forming an electrical conductor on or in the substrate by providing a mixture comprising metal particles and an electroless deposition solution and electrolessly depositing a metal matrix and co-depositing the metal particles. In another embodiment, the method comprises forming an electrical conductor on or in the substrate by providing a mixture comprising metal particles and an electrochemical plating solution and electrochemically plating a metal matrix and co-depositing the metal particles. Another aspect of the present invention is a mixture for the formation of an electrical conductor on or in a substrate. Another aspect of the present invention is an electronic device.Type: GrantFiled: August 10, 2013Date of Patent: March 3, 2015Assignee: Lam Research CorporationInventors: Artur Kolics, Fritz Redeker
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Publication number: 20140145334Abstract: Methods and apparatuses for fabricating three-dimensional integrated circuits having through hole vias are provided. One aspect of the present invention is a method of gapfill for through hole vias for three-dimensional integrated circuits. The method comprises providing a semiconductor wafer having a plurality of holes for through hole vias and depositing a conformal metal layer to partially fill the holes to leave open voids. The method also includes purging the voids and cleaning the surface of the voids and using a dry deposition process to fill or close the voids. Another aspect of the present invention is an electronic device structure for a three-dimensional integrated circuit.Type: ApplicationFiled: January 29, 2014Publication date: May 29, 2014Inventors: John BOYD, Fritz REDEKER, Yezdi N. DORDI, Hyungsuk Alexander YOON, Shijian LI
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Patent number: 8673769Abstract: Methods and apparatuses for fabricating three-dimensional integrated circuits having through hole vias are provided. One aspect of the present invention is a method of gapfill for through hole vias for three-dimensional integrated circuits. The method comprises providing a semiconductor wafer having a plurality of holes for through hole vias and depositing a conformal metal layer to partially fill the holes to leave open voids. The method also includes purging the voids and cleaning the surface of the voids and using a dry deposition process to fill or close the voids. Another aspect of the present invention is an electronic device structure for a three-dimensional integrated circuit.Type: GrantFiled: June 20, 2007Date of Patent: March 18, 2014Assignee: Lam Research CorporationInventors: John Boyd, Fritz Redeker, Yezdi Dordi, Hyungsuk Alexander Yoon, Shijian Li
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Publication number: 20140054776Abstract: A method of making an electronic device which in one embodiment comprises providing a substrate, electrolessly depositing a barrier metal at least on portions of the substrate, and using wet chemistry such as electroless deposition to deposit a substantially gold-free wetting layer having solder wettability onto the barrier metal. An electronic device which in one embodiment comprises a metallization stack. The metallization stack comprises a barrier metal deposited electrolessly and a substantially gold-free wetting layer deposited on the barrier metal, and the wetting layer is wettable by solder.Type: ApplicationFiled: August 22, 2013Publication date: February 27, 2014Applicant: Lam Research CorporationInventors: Artur KOLICS, William T. LEE, Fritz REDEKER
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Publication number: 20140034370Abstract: One aspect of the present invention is a method of processing a substrate. In one embodiment, the method comprises forming an electrical conductor on or in the substrate by providing a mixture comprising metal particles and an electroless deposition solution and electrolessly depositing a metal matrix and co-depositing the metal particles. In another embodiment, the method comprises forming an electrical conductor on or in the substrate by providing a mixture comprising metal particles and an electrochemical plating solution and electrochemically plating a metal matrix and co-depositing the metal particles. Another aspect of the present invention is a mixture for the formation of an electrical conductor on or in a substrate. Another aspect of the present invention is an electronic device.Type: ApplicationFiled: August 10, 2013Publication date: February 6, 2014Applicant: Lam Research CorporationInventors: Artur KOLICS, Fritz REDEKER
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Patent number: 8590550Abstract: A substrate holder is defined to support a substrate. A rotating mechanism is defined to rotate the substrate holder. An applicator is defined to extend over the substrate holder to dispense a cleaning material onto a surface of the substrate when present on the substrate holder. The applicator is defined to apply a downward force to the cleaning material on the surface of the substrate. In one embodiment the cleaning material is gelatinous.Type: GrantFiled: August 24, 2010Date of Patent: November 26, 2013Assignee: Lam Research CorporationInventors: Mikhail Korolik, Erik M. Freer, John M. de Larios, Katrina Mikhaylichenko, Mike Ravkin, Fritz Redeker
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Patent number: 8535451Abstract: An apparatus and method are disclosed in which a semiconductor substrate having a surface containing contaminants is cleaned or otherwise subjected to chemical treatment using a foam. The semiconductor wafer is supported either on a stiff support (or a layer of foam) and foam is provided on the opposite surface of the semiconductor wafer while the semiconductor wafer is supported. The foam contacting the semiconductor wafer is pressurized using a form to produce a jammed foam. Relative movement between the form and the semiconductor wafer. such as oscillation parallel and/or perpendicular to the top surface of the semiconductor wafer. is then induced while the jammed foam is in contact with the semiconductor wafer to remove the undesired contaminants and/or otherwise chemically treat the surface of the semiconductor wafer using the foam.Type: GrantFiled: September 29, 2008Date of Patent: September 17, 2013Assignee: Lam Research CorporationInventors: John M. de Larios, Mike Ravkin, Jeffrey Farber, Mikhail Korolik, Fritz Redeker, Aleksander Owczarz
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Patent number: 8518826Abstract: One aspect of the present invention is a method of processing a substrate. In one embodiment, the method comprises forming an electrical conductor on or in the substrate by providing a mixture comprising metal particles and an electroless deposition solution and electrolessly depositing a metal matrix and co-depositing the metal particles. In another embodiment, the method comprises forming an electrical conductor on or in the substrate by providing a mixture comprising metal particles and an electrochemical plating solution and electrochemically plating a metal matrix and co-depositing the metal particles. Another aspect of the present invention is a mixture for the formation of an electrical conductor on or in a substrate. Another aspect of the present invention is an electronic device.Type: GrantFiled: July 13, 2010Date of Patent: August 27, 2013Assignee: Lam Research CorporationInventors: Artur Kolics, Fritz Redeker
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Patent number: 8518815Abstract: A method of making an electronic device which in one embodiment comprises providing a substrate, electrolessly depositing a barrier metal at least on portions of the substrate, and using wet chemistry such as electroless deposition to deposit a substantially gold-free wetting layer having solder wettability onto the barrier metal. An electronic device which in one embodiment comprises a metallization stack. The metallization stack comprises a barrier metal deposited electrolessly and a substantially gold-free wetting layer deposited on the barrier metal, and the wetting layer is wettable by solder.Type: GrantFiled: July 7, 2010Date of Patent: August 27, 2013Assignee: Lam Research CorporationInventors: Artur Kolics, William T. Lee, Fritz Redeker
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Patent number: 8519461Abstract: Presented are device structures and methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. Another aspect of the present invention includes three-dimensional integrated circuits fabricated according to methods of the present invention.Type: GrantFiled: April 25, 2012Date of Patent: August 27, 2013Assignee: Lam Research CorporationInventors: John Boyd, Fritz Redeker, Yezdi Dordi, Hyungsuk Alexander Yoon, Shijian Li
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Patent number: 8323460Abstract: Presented are methods and systems for fabricating three-dimensional integrated circuits having large diameter through-hole vias. One embodiment of the present invention provides a method of processing a wafer having holes for through-hole vias. The method comprises plating a gapfill metal on the wafer. The method also comprises chemically or electrochemically deplating a portion of the overburden metal. The method further comprises using chemical mechanical planarization to planarize the gapfill metal and to remove the remaining overburden metal. Another embodiment of the present invention is an integrated system comprising a process chamber for containing the wafer, a plating component integrated with the process chamber, and a deplating component integrated with the process chamber. The plating component is configured to electrochemically plate a gapfill metal onto the wafer to a least partially fill the holes.Type: GrantFiled: June 20, 2007Date of Patent: December 4, 2012Assignee: Lam Research CorporationInventors: John Boyd, Fritz Redeker, Yezdi Dordi, Hyungsuk Alexander Yoon, Shijian Li
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Publication number: 20120205807Abstract: Presented are device structures and methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. Another aspect of the present invention includes three-dimensional integrated circuits fabricated according to methods of the present invention.Type: ApplicationFiled: April 25, 2012Publication date: August 16, 2012Inventors: John Boyd, Fritz Redeker, Yezdi Dordi, Hyungsuk Alexander Yoon, Shijian Li
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Patent number: 8242067Abstract: A cleaning compound is disclosed for removing particulate contaminants from a semiconductor substrate surface. The cleaning compound includes a liquid and carboxylic acid solid components dispersed in a substantially uniform manner in the liquid. A concentration of the carboxylic acid solid components in the liquid exceeds a solubility limit of the carboxylic acid solid components in the liquid. In one embodiment, a concentration of the carboxylic acid solid components in the liquid is within a range extending from about 3 percent by weight to about 5 percent by weight. In one embodiment, the carboxylic acid solid components are defined by a carbon number of at least four. The carboxylic acid solid components are defined to interact with the particulate contaminants on the semiconductor substrate surface to remove the particulate contaminants from the semiconductor substrate surface. The cleaning compound is viscous and may be formed as a gel.Type: GrantFiled: August 24, 2010Date of Patent: August 14, 2012Assignee: Lam Research CorporationInventors: Mikhail Korolik, Erik M. Freer, John M. de Larios, Katrina Mikhaylichenko, Mike Ravkin, Fritz Redeker
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Patent number: 8187968Abstract: Presented are methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. Another aspect of the present invention includes three-dimensional integrated circuits fabricated according to methods of the present invention.Type: GrantFiled: November 5, 2009Date of Patent: May 29, 2012Assignee: Lam Research CorporationInventors: John Boyd, Fritz Redeker, Yezdi Dordi, Hyungsuk Alexander Yoon, Shijian Li
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Patent number: 8133812Abstract: This invention pertains to methods and systems for fabricating semiconductor devices. One aspect of the present invention is a method of depositing a gapfill copper layer onto a barrier layer for semiconductor device metallization. In one embodiment, the method includes forming the barrier layer on a surface of a substrate and subjecting the barrier layer to a process condition so as to form a removable passivated surface on the barrier layer. The method further includes removing the passivated surface from the barrier layer and depositing the gapfill copper layer onto the barrier layer. Another aspect of the present invention is an integrated system for depositing a copper layer onto a barrier layer for semiconductor device metallization.Type: GrantFiled: September 18, 2009Date of Patent: March 13, 2012Assignee: Lam Research CorporationInventors: Yezdi Dordi, John Boyd, Fritz Redeker, William Thie, Tiruchirapalli Arunagiri, Alex Yoon
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Publication number: 20120024230Abstract: The present invention pertains to methods, apparatuses, and systems for fabricating three-dimensional integrated circuits. One or more embodiments of systems, apparatuses, and/or methods according to the present invention are presented.Type: ApplicationFiled: October 5, 2011Publication date: February 2, 2012Inventors: Shijian Li, Fritz Redeker, Yezdi Dordi
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Publication number: 20120013008Abstract: One aspect of the present invention is a method of processing a substrate. In one embodiment, the method comprises forming an electrical conductor on or in the substrate by providing a mixture comprising metal particles and an electroless deposition solution and electrolessly depositing a metal matrix and co-depositing the metal particles. In another embodiment, the method comprises forming an electrical conductor on or in the substrate by providing a mixture comprising metal particles and an electrochemical plating solution and electrochemically plating a metal matrix and co-depositing the metal particles. Another aspect of the present invention is a mixture for the formation of an electrical conductor on or in a substrate. Another aspect of the present invention is an electronic device.Type: ApplicationFiled: July 13, 2010Publication date: January 19, 2012Inventors: Artur Kolics, Fritz Redeker
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Publication number: 20120007239Abstract: A method of making an electronic device which in one embodiment comprises providing a substrate, electrolessly depositing a barrier metal at least on portions of the substrate, and using wet chemistry such as electroless deposition to deposit a substantially gold-free wetting layer having solder wettability onto the barrier metal. An electronic device which in one embodiment comprises a metallization stack. The metallization stack comprises a barrier metal deposited electrolessly and a substantially gold-free wetting layer deposited on the barrier metal, and the wetting layer is wettable by solder.Type: ApplicationFiled: July 7, 2010Publication date: January 12, 2012Inventors: Artur Kolics, William T. Lee, Fritz Redeker