Patents by Inventor Fu-Cheng Wang
Fu-Cheng Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100302100Abstract: A signal processing apparatus for a multi-mode satellite positioning system includes a band-pass filter, a local oscillator circuit, a first mixing circuit, a second mixing circuit, an analog-to-digital converter and a baseband circuit. By properly allocating a local frequency, radio frequency (RF) signals of a Global Positioning System (GPS), a Galileo positioning system and a Global Navigation System (GLONASS) are processed via a single signal path to save hardware cost.Type: ApplicationFiled: March 8, 2010Publication date: December 2, 2010Applicant: MStar Semiconductor, Inc.Inventors: CHAO-TUNG YANG, Fu-Cheng Wang, Shoufang Chen, Shuo-Yuan Hsiao
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Patent number: 7785971Abstract: Fabrication of complementary first and second insulated-gate field-effect transistors (110 or 112 and 120 or 122) from a semiconductor body entails separately introducing (i) three body-material dopants into the body material (50) for the first transistor so as to reach respective maximum dopant concentrations at three different locations in the first transistor's body material and (ii) two body-material dopants into the body material (130) for the second transistor so as to reach respective maximum dopant concentrations at two different locations in the second transistor's body material. Gate electrodes (74 or 94 and 154 or 194) are subsequently defined after which source/drain zones (60, 62 or 80, 82 and 140, 142 or 160, 162) are formed in the semiconductor body. The vertical dopant profiles resulting from the body-material dopants alleviate punchthrough and reduce current leakage.Type: GrantFiled: February 6, 2007Date of Patent: August 31, 2010Assignee: National Semiconductor CorporationInventors: Constantin Bulucea, Fu-Cheng Wang, Prasad Chaparala
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Publication number: 20100148463Abstract: The invention provides a mechatronic suspension system and a method for shock absorbing thereof. The invention applies the analogies between mechanical and electronic networks to propose a mechatronic suspension system, which combines a ball-screw inerter and a permanent magnet electric machinery, such that the complicated network structure can be realized through the combination of mechanical and electronic networks. The mechatronic suspension system is connected to two terminals, and consists of the inerter mechanism, the permanent magnet electric machinery and the feedback circuit. The inerter mechanism is connected to the terminals to transfer the linear motion into the rotational motion. The permanent magnet electric machinery is connected to the inerter mechanism to generate a corresponding voltage. And the feedback circuit is connected to the permanent magnet electric machinery to provide suitable system impedance and to generate a feedback force.Type: ApplicationFiled: March 4, 2009Publication date: June 17, 2010Applicant: National Taiwan UniversityInventors: Fu-cheng Wang, Hsiang-an Chan
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Publication number: 20100129781Abstract: The invention discloses the electrical bronze acupuncture statue apparatus that comprises the electrical elements, the sensors and the embedded system. The invention simulates the acupuncture points for practicing the traditional Chinese medicine treatment and provides the virtual results.Type: ApplicationFiled: March 10, 2009Publication date: May 27, 2010Applicant: National Taiwan UniversityInventors: Fu-Cheng Wang, Hsiao-Wu Wang
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Patent number: 7701005Abstract: Each of a pair of differently configured like-polarity insulated-gate field-effect transistors (40 or 42 and 240 or 242) in a semiconductor structure has a channel zone of semiconductor body material, a gate dielectric layer overlying the channel zone, and a gate electrode overlying the gate dielectric layer. For each transistor, the net dopant concentration of the body material reaches multiple local subsurface maxima below a channel surface depletion region and below largely all gate-electrode material overlying the channel zone. The transistors have source/drain zones (60 or 80) of opposite conductivity type to, and halo pocket portions of the same conductivity type as, the body material. One pocket portion (100/102 or 104) extends along both source/drain zones of one of the transistors. Another pocket portion (244 or 246) extends largely along only one of the source/drain zones of the other transistor so that it is asymmetrical.Type: GrantFiled: October 15, 2007Date of Patent: April 20, 2010Assignee: National Semiconductor CorporationInventors: Constantin Bulucea, Fu-Cheng Wang, Prasad Chaparala
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Patent number: 7700980Abstract: Each of a pair of like-polarity IGFETs (40 or 42 and 240 or 242) has a channel zone (64 or 84) situated in body material (50). Short-channel effects are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a local surface minimum at a location between the IGFET's source/drain zones (60 and 62 or 80 and 82) and by arranging for the net dopant concentration in the body material to reach a local subsurface maximum more than 0.1 ?m deep into the body material but not more than 0.4 ?m deep into the body material. A pocket portion (100/102 or 104) extends along both source drain zones of one of the IGFETs. A pocket portion (244 or 246) extends largely along only one of the source/drain zones of the other IGFET so that it is an asymmetrical device.Type: GrantFiled: October 17, 2007Date of Patent: April 20, 2010Assignee: National Semiconductor CorporationInventors: Constantin Bulucea, Fu-Cheng Wang, Prasad Chaparala
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Patent number: 7595244Abstract: Fabrication of two differently configured like-polarity insulated-gate field-effect transistors (40 or 42 and 240 or 242) entails introducing multiple body-material semiconductor dopants of the same conductivity type into a semiconductor body. Gate electrodes (74 or 94) are defined such that each body-material dopant reaches a maximum concentration below the channel surface depletion regions, below all gate-electrode material overlying the channel zones (64 or 84), and at a different depth than each other body-material dopant. The transistors are provided with source/drain zones (60 or 80) of opposite conductivity type to, and with halo pocket portions of the same conductivity type as, the body-material dopants. One pocket portion (100/102 or 104) extends along both source/drain zones of one of the transistors. Another pocket portion (244 or 246) extends largely along only one of the source/drain zones of the other transistor so that it is asymmetrical.Type: GrantFiled: October 16, 2007Date of Patent: September 29, 2009Assignee: National Semiconductor CorporationInventors: Constantin Bulucea, Fu-Cheng Wang, Prasad Chaparala
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Publication number: 20090176133Abstract: A fuel cell control system and a control method thereof are provided. The fuel cell control system includes an air supply module, a fuel supply module having a fuel supply end, a fuel cell set having an electrical output end, an measuring unit and a control module having an arithmetic logic unit. A set of control algorithms is employed to effectively adjust the electrical output in order to identify the transfer function and to perform controller design. When the electrical output of the fuel cell is different from the default electrical output, the controller then regulates the fuel supply and the air supply to provide a stable fuel cell electrical output and to reduce fuel consumption.Type: ApplicationFiled: November 21, 2008Publication date: July 9, 2009Applicant: NATIONAL TAIWAN UNIVERSITYInventors: Fu-Cheng Wang, Hsuan-Tsung Chen
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Publication number: 20090139225Abstract: The invention provides a hydraulic inerter mechanism, including: a hydraulic cylinder; a hydraulic motor connected to the hydraulic cylinder, with an output shaft thereon for converting the motion of the hydraulic cylinder from rectilinear motion to rotary motion; and an inertia body disposed on the output shaft. In operation, an external force applied to the inerter mechanism causes displacement of the piston, thereby pushing working fluid inside the hydraulic cylinder to generate a pressure difference between an inlet and an outlet of a hydraulic motor. The differential pressure consequently drives the hydraulic motor to rotate, and then the output shaft further drives the inertia body to rotate, thereby attaining inerter characteristics.Type: ApplicationFiled: March 14, 2008Publication date: June 4, 2009Applicant: NATIONAL TAIWAN UNIVERSITYInventors: Fu-Cheng Wang, Tz-Chian Lin
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Publication number: 20090108510Abstract: A screw type inerter mechanism includes a screw with a limit portion and a thread portion with threads; a screw cap engaged with the thread portion of the screw; an inertia body fixed to the limit portion of the screw; and a connection body engaged with the limit portion of the screw wherein an axial of the screw serves as a rotation axial for the screw to rotate relatively to the connection body. Thus, when a non-zero external force is applied to the inerter mechanism to generate relative horizontal displacement between the screw cap and the connection body, the screw cap brings the screw to rotate, which further brings the inertia body to rotate, thereby achieving the inerter features.Type: ApplicationFiled: July 29, 2008Publication date: April 30, 2009Applicant: National Taiwan UniversityInventors: Fu-Cheng Wang, Mao-Sheng Hsu, Wei-Jiun Su, Tz-Chain Lin
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Patent number: 7145191Abstract: The source/drain zones (140 and 142 or 160 and 162) of a p-channel IGFET (120 or 122) are provided with graded-junction characteristics to reduce junction capacitance, thereby increasing switching speed. Each source/drain zone contains a main portion (140M, 142M, 160M, or 162M) and a more lightly doped lower portion (140L, 142L, 160L, or 162L) underlying, and vertically continuous with, the main portion.Type: GrantFiled: August 18, 2004Date of Patent: December 5, 2006Assignee: National Semiconductor CorporationInventors: Chih Sieh Teng, Constantin Bulucea, Chin-Miin Shyu, Fu-Cheng Wang, Prasad Chaparala
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Patent number: 6797576Abstract: An IGFET (40 or 42) has a channel zone (64 or 84) situated in body material (50). Short-channel threshold voltage roll-off and punchthrough are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a local surface minimum at a location between the IGFET's source/drain zones (60 and 62 or 80 and 82) and by arranging for the net dopant concentration in the body material to reach a local subsurface maximum more than 0.1 &mgr;m deep into the body material but not more than 0.1 &mgr;m deep into the body material. The source/drain zones (140 and 142 or 160 and 162) of a p-channel IGFET (120 or 122) are provided with graded-junction characteristics to reduce junction capacitance, thereby increasing switching speed.Type: GrantFiled: December 20, 2002Date of Patent: September 28, 2004Assignee: National Semiconductor CorporationInventors: Chih Sieh Teng, Constantin Bulucea, Chin-Miin Shyu, Fu-Cheng Wang, Prasad Chaparala
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Patent number: 6599804Abstract: Short-channel threshold voltage roll-off and punchthrough in an IGFET (40 or 42) having a channel zone (64 or 84) situated in body material (50) are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a local surface minimum at a location between the IGFET's source/drain zones (60 and 62 or 80 and 82) and by arranging for the net dopant concentration in the body material to reach a local subsurface maximum more than 0.1 &mgr;m deep into the body material but not more than 0.4 &mgr;m deep into the body material.Type: GrantFiled: September 4, 2001Date of Patent: July 29, 2003Assignee: National Semiconductor CorporationInventors: Constantin Bulucea, Fu-Cheng Wang, Prasad Chaparala
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Patent number: 6566204Abstract: To furnish an IGFET (120 or 122) with an asymmetrically doped channel zone (144 or 164), a mask (212) is provided over a semiconductor body and an overlying electrically insulated gate electrode (148P or 168P). Ions of a semiconductor dopant species are directed toward an opening (213) in the mask from two different angular orientations along paths that originate laterally beyond opposite respective opening-defined sides of the mask. The location and shape of the opening are controlled so that largely only ions impinging from one of the angular orientations enter the intended location for the channel zone. Ions impinging from the other angular orientation are shadowed by the mask from entering the channel zone location. Although the ions impinging from this other angular orientation do not significantly dope the channel zone location, they normally enter the semiconductor body elsewhere, e.g., the intended location for the channel zone of another IGFET.Type: GrantFiled: March 31, 2000Date of Patent: May 20, 2003Assignee: National Semiconductor CorporationInventors: Fu-Cheng Wang, Constantin Bulucea
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Patent number: 6548842Abstract: An IGFET (40 or 42) has a channel zone (64 or 84) situated in body material (50). Short-channel threshold voltage roll-off and punchthrough are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a local surface minimum at a location between the IGFET's source/drain zones (60 and 62 or 80 and 82) and by arranging for the net dopant concentration in the body material to reach a local subsurface maximum more than 0.1 &mgr;m deep into the body material but not more than 0.4 &mgr;m deep into the body material.Type: GrantFiled: March 31, 2000Date of Patent: April 15, 2003Assignee: National Semiconductor CorporationInventors: Constantin Bulucea, Fu-Cheng Wang, Prasad Chaparala
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Patent number: 6461932Abstract: A trenched-isolated semiconductor structure is created by a process that entails forming a patterned trench (54) along an upper surface of a semiconductor body (40). A dielectric layer (56) is provided over the upper semiconductor surface. The dielectric layer is covered with a smoothening layer (60) whose upper surface is smoother than the upper surface of the dielectric layer. The smoothening layer is removed starting from its upper surface. During the removal of the smoothening layer, upward-protruding material of the dielectric layer progressively becomes exposed and is also removed. As a result, the remainder of dielectric layer has a smoother upper surface than the initial upper surface of the dielectric layer.Type: GrantFiled: December 14, 1998Date of Patent: October 8, 2002Assignee: National Semiconductor CorporationInventor: Fu-Cheng Wang
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Publication number: 20020074612Abstract: An IGFET (40 or 42) has a channel zone (64 or 84) situated in body material (50). Short-channel threshold voltage roll-off and punchthrough are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a local surface minimum at a location between the IGFET's source/drain zones (60 and 62 or 80 and 82) and by arranging for the net dopant concentration in the body material to reach a local subsurface maximum more than 0.1 &mgr;m deep into the body material but not more than 0.1 &mgr;m deep into the body material. The source/drain zones (140 and 142 or 160 and 162) of a p-channel IGFET (120 or 122) are provided with graded-junction characteristics to reduce junction capacitance, thereby increasing switching speed.Type: ApplicationFiled: September 4, 2001Publication date: June 20, 2002Applicant: National Semiconductor CorporationInventors: Constantin Bulucea, Fu-Cheng Wang, Prasad Chaparala