Patents by Inventor Fu Chiung Chong
Fu Chiung Chong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7247035Abstract: Several embodiments of stress metal springs are disclosed, which typically comprise a plurality of stress metal layers that are established on a substrate, which are then controllably patterned and partially released from the substrate. An effective rotation angle is typically created in the formed stress metal springs, defining a looped spring structure. The formed springs provide high pitch compliant electrical contacts for a wide variety of interconnection systems, including chip scale semiconductor packages, high density interposer connectors, and probe contactors. Several embodiments of massively parallel interface integrated circuit test assemblies are also disclosed, comprising one or more substrates having stress metal spring contacts, to establish connections between one or more separated integrated circuits on a compliant wafer carrier.Type: GrantFiled: September 1, 2004Date of Patent: July 24, 2007Assignee: Nanonexus, Inc.Inventors: Sammy Mok, Fu Chiung Chong, Roman Milter
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Patent number: 7137830Abstract: This invention provides a solution to increase the yield strength and fatigue strength of miniaturized springs, which can be fabricated in arrays with ultra-small pitches. It also discloses a solution to minimize adhesion of the contact pad materials to the spring tips upon repeated contacts without affecting the reliability of the miniaturized springs. In addition, the invention also presents a method to fabricate the springs that allow passage of relatively higher current without significantly degrading their lifetime.Type: GrantFiled: March 17, 2003Date of Patent: November 21, 2006Assignee: NanoNexus, Inc.Inventors: Syamal Kumar Lahiri, Frank Swiatowiec, Fu Chiung Chong, Sammy Mok, Erh-Kong Chieh, Roman L. Milter, Joseph M. Haemer, Chang-Ming Lin, Yi-Hsing Chen, David Thanh Doan
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Patent number: 7138818Abstract: Several embodiments of massively parallel interface structures are disclosed, which may be used in a wide variety of permanent or temporary applications, such as for interconnecting integrated circuits (ICs) to test and burn-in equipment, for interconnecting modules within electronic devices, for interconnecting computers and other peripheral devices within a network, or for interconnecting other electronic circuitry. Preferred embodiments of the massively parallel interface structures provide massively parallel integrated circuit test assemblies. The massively parallel interface structures preferably use one or more substrates to establish connections between one or more integrated circuits on a semiconductor wafer, and one or more test modules. One or more layers on the intermediate substrates preferably include MEMS and/or thin-film fabricated spring probes.Type: GrantFiled: January 5, 2006Date of Patent: November 21, 2006Assignee: NanoNexus, Inc.Inventors: Fu Chiung Chong, Sammy Mok
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Patent number: 7126220Abstract: This invention provides a solution to increase the yield strength and fatigue strength of miniaturized springs, which can be fabricated in arrays with ultra-small pitches. It also discloses a solution to minimize adhesion of the contact pad materials to the spring tips upon repeated contacts without affecting the reliability of the miniaturized springs. In addition, the invention also presents a method to fabricate the springs that allow passage of relatively higher current without significantly degrading their lifetime.Type: GrantFiled: March 17, 2003Date of Patent: October 24, 2006Assignee: NanoNexus, Inc.Inventors: Syamal Kumar Lahiri, Frank Swiatowiec, Fu Chiung Chong, Sammy Mok, Erh-Kong Chieh, Roman L. Milter, Joseph M. Haemer, Chang-Ming Lin, Yi-Hsing Chen, David Thanh Doan
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Patent number: 7126358Abstract: Several embodiments of integrated circuit probe card assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more integrated circuits on a semiconductor wafer. Several embodiments of probe card assemblies, which provide tight signal pad pitch compliance and/or enable high levels of parallel testing in commercial wafer probing equipment, are disclosed. In some preferred embodiments, the probe card assembly structures include separable standard components, which reduce assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. The probes also have built in mechanical protection for both the integrated circuits and the MEMS or thin film fabricated spring tips and probe layout structures on substrates.Type: GrantFiled: September 27, 2004Date of Patent: October 24, 2006Assignee: NanoNexus, Inc.Inventors: Sammy Mok, Fu Chiung Chong
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Patent number: 7009412Abstract: Several embodiments of massively parallel interface structures are disclosed, which may be used in a wide variety of permanent or temporary applications, such as for interconnecting integrated circuits (ICs) to test and burn-in equipment, for interconnecting modules within electronic devices, for interconnecting computers and other peripheral devices within a network, or for interconnecting other electronic circuitry. Preferred embodiments of the massively parallel interface structures provide massively parallel integrated circuit test assemblies. The massively parallel interface structures preferably use one or more substrates to establish connections between one or more integrated circuits on a semiconductor wafer, and one or more test modules. One or more layers on the intermediate substrates preferably include MEMS and/or thin-film fabricated spring probes.Type: GrantFiled: August 12, 2004Date of Patent: March 7, 2006Assignee: NanoNexus, Inc.Inventors: Fu Chiung Chong, Sammy Mok
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Patent number: 6917525Abstract: Several embodiments of enhanced integrated circuit probe card and package assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more integrated circuits on a semiconductor wafer. Several embodiments of probe card assemblies, which provide tight signal pad pitch compliance and/or enable high levels of parallel testing in commercial wafer probing equipment, are disclosed. In some preferred embodiments, the probe card assembly structures include separable standard components, which reduce assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. The probes also have built in mechanical protection for both the integrated circuits and the MEMS or thin film fabricated spring tips and probe layout structures on substrates.Type: GrantFiled: June 24, 2002Date of Patent: July 12, 2005Assignee: NanoNexus, Inc.Inventors: Sammy Mok, Fu Chiung Chong, Frank John Swiatowiec, Syamal Kumar Lahiri, Joseph Michael Haemer
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Publication number: 20050068054Abstract: Several embodiments of integrated circuit probe card assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more integrated circuits on a semiconductor wafer. Several embodiments of probe card assemblies, which provide tight signal pad pitch compliance and/or enable high levels of parallel testing in commercial wafer probing equipment, are disclosed. In some preferred embodiments, the probe card assembly structures include separable standard components, which reduce assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. The probes also have built in mechanical protection for both the integrated circuits and the MEMS or thin film fabricated spring tips and probe layout structures on substrates.Type: ApplicationFiled: July 9, 2004Publication date: March 31, 2005Inventors: Sammy Mok, Fu Chiung Chong, Frank John Swiatowiec
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Publication number: 20040223309Abstract: Several embodiments of enhanced integrated circuit probe card and package assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more integrated circuits on a semiconductor wafer. Several embodiments of probe card assemblies, which provide tight signal pad pitch compliance and/or enable high levels of parallel testing in commercial wafer probing equipment, are disclosed. In some preferred embodiments, the probe card assembly structures include separable standard components, which reduce assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. The probes also have built in mechanical protection for both the integrated circuits and the MEMS or thin film fabricated spring tips and probe layout structures on substrates.Type: ApplicationFiled: June 16, 2004Publication date: November 11, 2004Inventors: Joseph Michael Haemer, Fu Chiung Chong, Douglas N. Modlin
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Patent number: 6815961Abstract: Several embodiments of integrated circuit probe card assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more integrated circuits on a semiconductor wafer. Several embodiments of probe card assemblies, which provide tight signal pad pitch compliance and/or enable high levels of parallel testing in commercial wafer probing equipment, are disclosed. In some preferred embodiments, the probe card assembly structures include separable standard components, which reduce assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. The probes also have built in mechanical protection for both the integrated circuits and the MEMS or thin film fabricated spring tips and probe layout structures on substrates.Type: GrantFiled: March 8, 2002Date of Patent: November 9, 2004Assignee: NanoNexus, Inc.Inventors: Sammy Mok, Fu Chiung Chong
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Patent number: 6812718Abstract: Several embodiments of massively parallel interface structures are disclosed, which may be used in a wide variety of permanent or temporary applications, such as for interconnecting integrated circuits (ICs) to test and burn-in equipment, for interconnecting modules within electronic devices, for interconnecting computers and other peripheral devices within a network, or for interconnecting other electronic circuitry. Preferred embodiments of the massively parallel interface structures provide massively parallel intergrated circuit test assemblies. The massively parallel interface structures preferably use one or more substrates to establish connection between one or more integrated circuits on a semiconductor wafer, and one or more test modules. One or more layers on the intermediate substrates preferably include MEMS and/or thin-film fabrication spring probes.Type: GrantFiled: November 21, 2001Date of Patent: November 2, 2004Assignee: NanoNexus, Inc.Inventors: Fu Chiung Chong, Sammy Mok
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Patent number: 6799976Abstract: Several embodiments of integrated circuit probe card assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more integrated circuits on a semiconductor wafer. Several embodiments of probe card assemblies, which provide tight signal pad pitch compliance and/or enable high levels of parallel testing in commercial wafer probing equipment, are disclosed. In some preferred embodiments, the probe card assembly structures include separable standard components, which reduce assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. The probes also have built in mechanical protection for both the integrated circuits and the MEMS or thin film fabricated spring tips and probe layout structures on substrates.Type: GrantFiled: November 27, 2001Date of Patent: October 5, 2004Assignee: NanoNexus, Inc.Inventors: Sammy Mok, Fu Chiung Chong
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Patent number: 6791171Abstract: Several embodiments of stress metal springs are disclosed, which typically comprise a plurality of stress metal layers that are established on a substrate, which are then controllably patterned and partially released from the substrate. An effective rotation angle is typically created in the formed stress metal springs, defining a looped spring structure. The formed springs provide high pitch compliant electrical contacts for a wide variety of interconnection systems, including chip scale semiconductor packages, high density interposer connectors, and probe contactors. Several embodiments of massively parallel interface integrated circuit test assemblies are also disclosed, comprising one or more substrates having stress metal spring contacts, to establish connections between one or more separated integrated circuits on a compliant wafer carrier.Type: GrantFiled: June 28, 2002Date of Patent: September 14, 2004Assignee: NanoNexus, Inc.Inventors: Sammy Mok, Fu Chiung Chong
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Publication number: 20040075455Abstract: The invention provides a mosaic decal probe, in which a mosaic of probe chips is assembled into a thin membrane that is suspended in a ring which is made of a material that has a TCE matching that of silicon. The membrane is mounted on the ring in tension, such as it stays in tension throughout a functional temperature range. In this way, the membrane exhibits a functional TCE matching that of the ring. The probe chip preferably has spring contacts on both sides. Apertures are cut in the membrane to allow the spring contacts on one side of the membrane to protrude through the membrane and contact the printed wiring board. The spring contacts which contact the printed wiring board are allowed to slide during temperature excursions, thereby decoupling the TCE mismatch between the probe chip and the printed wiring board. Two preferred embodiments are currently contemplated. A first embodiment of the invention uses a low-count mosaic comprised of few probe chips, for example four probe chips.Type: ApplicationFiled: November 19, 2003Publication date: April 22, 2004Inventors: Sammy Mok, Fu Chiung Chong, Ira Feldman
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Patent number: 6710609Abstract: The invention provides a mosaic decal probe, in which a mosaic of probe chips is assembled into a thin membrane that is suspended in a ring which is made of a material that has a TCE matching that of silicon. The membrane is mounted on the ring in tension, such as it stays in tension throughout a functional temperature range. In this way, the membrane exhibits a functional TCE matching that of the ring. The probe chip preferably has spring contacts on both sides. Apertures are cut in the membrane to allow the spring contacts on one side of the membrane to protrude through the membrane and contact the printed wiring board. The spring contacts which contact the printed wiring board are allowed to slide during temperature excursions, thereby decoupling the TCE mismatch between the probe chip and the printed wiring board. Two preferred embodiments are currently contemplated. A first embodiment of the invention uses a low-count mosaic comprised of few probe chips, for example four probe chips.Type: GrantFiled: July 15, 2002Date of Patent: March 23, 2004Assignee: NanoNexus, Inc.Inventors: Sammy Mok, Fu Chiung Chong, Ira Feldman
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Publication number: 20040022042Abstract: Several embodiments of integrated circuit probe card assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more integrated circuits on a semiconductor wafer. Several embodiments of probe card assemblies, which provide tight signal pad pitch compliance and/or enable high levels of parallel testing in commercial wafer probing equipment, are disclosed. In some preferred embodiments, the probe card assembly structures include separable standard components, which reduce assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. The probes also have built in mechanical protection for both the integrated circuits and the MEMS or thin film fabricated spring tips and probe layout structures on substrates.Type: ApplicationFiled: March 8, 2002Publication date: February 5, 2004Inventors: Sammy Mok, Fu Chiung Chong
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Publication number: 20040008045Abstract: The invention provides a mosaic decal probe, in which a mosaic of probe chips is assembled into a thin membrane that is suspended in a ring which is made of a material that has a TCE matching that of silicon. The membrane is mounted on the ring in tension, such as it stays in tension throughout a functional temperature range. In this way, the membrane exhibits a functional TCE matching that of the ring. The probe chip preferably has spring contacts on both sides. Apertures are cut in the membrane to allow the spring contacts on one side of the membrane to protrude through the membrane and contact the printed wiring board. The spring contacts which contact the printed wiring board are allowed to slide during temperature excursions, thereby decoupling the TCE mismatch between the probe chip and the printed wiring board. Two preferred embodiments are currently contemplated. A first embodiment of the invention uses a low-count mosaic comprised of few probe chips, for example four probe chips.Type: ApplicationFiled: July 15, 2002Publication date: January 15, 2004Inventors: Sammy Mok, Fu Chiung Chong, Ira Feldman
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Publication number: 20030218244Abstract: This invention provides a solution to increase the yield strength and fatigue strength of miniaturized springs, which can be fabricated in arrays with ultra-small pitches. It also discloses a solution to minimize adhesion of the contact pad materials to the spring tips upon repeated contacts without affecting the reliability of the miniaturized springs. In addition, the invention also presents a method to fabricate the springs that allow passage of relatively higher current without significantly degrading their lifetime.Type: ApplicationFiled: March 17, 2003Publication date: November 27, 2003Inventors: Syamal Kumar Lahiri, Frank Swiatowiec, Fu Chiung Chong, Sammy Mok, Erh-Kong Chieh, Roman L. Milter, Joseph M. Haemer, Chang-Ming Lin, Yi-Hsing Chen, David Thanh Doan
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Publication number: 20030214045Abstract: This invention provides a solution to increase the yield strength and fatigue strength of miniaturized springs, which can be fabricated in arrays with ultra-small pitches. It also discloses a solution to minimize adhesion of the contact pad materials to the spring tips upon repeated contacts without affecting the reliability of the miniaturized springs. In addition, the invention also presents a method to fabricate the springs that allow passage of relatively higher current without significantly degrading their lifetime.Type: ApplicationFiled: March 17, 2003Publication date: November 20, 2003Inventors: Syamal Kumar Lahiri, Frank Swiatowiec, Fu Chiung Chong, Sammy Mok, Erh-Kong Chieh, Roman L. Milter, Joseph M. Haemer, Chang-Ming Lin, Yi-Hsing Chen, David Thanh Doan
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Publication number: 20030099097Abstract: Several embodiments of enhanced integrated circuit probe card and package assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more integrated circuits on a semiconductor wafer. Several embodiments of probe card assemblies, which provide tight signal pad pitch compliance and/or enable high levels of parallel testing in commercial wafer probing equipment, are disclosed. In some preferred embodiments, the probe card assembly structures include separable standard components, which reduce assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. The probes also have built in mechanical protection for both the integrated circuits and the MEMS or thin film fabricated spring tips and probe layout structures on substrates.Type: ApplicationFiled: June 24, 2002Publication date: May 29, 2003Inventors: Sammy Mok, Fu Chiung Chong, Frank John Swiatowiec, Syamal Kumar Lahiri, Joseph Michael Haemer