Abstract: A power-saving supply controller circuit of supplying power based on electrical specifications is provided. The power-saving supply controller circuit includes a first switch component, a second switch component and a control circuit. A first terminal of the first switch component and a first terminal of a capacitor are connected to a first terminal of a power supply device. Second terminals of the first and second switch components are connected to a second terminal of the power supply device. A first terminal of the second switch component is connected to a second terminal of the capacitor. When a current is supplied from the first terminal of the power supply device, the control circuit controls the first and second switch components such that a current flowing back to the second terminal of the power supply device is not smaller than a specified current.

Abstract: A power converter having a load transition detecting mechanism is provided. A comparator of the power converter compares an output voltage of the power converter or a divided voltage thereof with a reference voltage to output a comparison signal. A load transition detecting circuit of the power converter detects the comparison signal, and samples and holds some of a plurality of waveforms of the comparison signal. The load transition detecting circuit of the power converter calculates an average value of a plurality of parameters respectively of the sampled waveforms as a load steady state reference value. The load transition detecting circuit of the power converter compares the parameter of each of the plurality of waveforms of the comparison signal with the load steady state reference value to determine whether or not a load is in a steady state or in a transient state.

Abstract: A power converter having a multi-slope compensation mechanism is provided. A multi-slope compensation circuit of the power converter includes a plurality of first capacitors, a comparator and a plurality of first resistors. A first terminal of each of the plurality of first capacitors and a node between a second terminal of a high-side switch and a first terminal of a low-side switch are connected to an inductor. A plurality of first input terminals of a comparator are respectively connected to second terminals of the plurality of first capacitors, and are respectively connected to first terminals of the plurality of first resistors. Second terminals of the plurality of first resistors are coupled to a second reference voltage. A second input terminal of the comparator is coupled to a first reference voltage. An output terminal of the comparator is connected to an input terminal of a driver circuit.

Abstract: A power converter having a multi-slope compensation mechanism is provided. A multi-slope compensation circuit of the power converter includes a plurality of first capacitors, a comparator and a plurality of first resistors. A first terminal of each of the plurality of first capacitors and a node between a second terminal of a high-side switch and a first terminal of a low-side switch are connected to an inductor. A plurality of first input terminals of a comparator are respectively connected to second terminals of the plurality of first capacitors, and are respectively connected to first terminals of the plurality of first resistors. Second terminals of the plurality of first resistors are coupled to a second reference voltage. A second input terminal of the comparator is coupled to a first reference voltage. An output terminal of the comparator is connected to an input terminal of a driver circuit.

Abstract: A power converter having a smooth transition control mechanism is provided. An oscillator circuit outputs a clock signal. A control circuit receives the clock signal from the oscillator circuit and outputs a control signal based on the clock signal. A driver circuit outputs a high-side conduction signal and a low-side conduction signal according to the control signal. A high-side switch is turned on or off according to the high-side conduction signal from the driver circuit. A low-side switch is turned on or off according to the low-side conduction signal from the driver circuit. The oscillator circuit receives the high-side conduction signal from the driver circuit. The oscillator circuit, according to the high-side conduction signal, determines whether or not the clock signal outputted to the control circuit needs to be adjusted.

Abstract: A power converter for providing a negative voltage is provided. A coupling controller circuit receives a digital control signal and provides a control signal. A reverse voltage converter circuit receives the control signal and provides a reverse voltage. The reverse voltage converter circuit includes a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a seventh switch, an eighth switch, a coupling control signal triggering circuit and a pulse width modulation circuit. A first reverse logic circuit is connected to a second reverse logic circuit. The second reverse logic circuit is connected to the pulse width modulation circuit and is configured to provide a trigger signal to the pulse width modulation circuit. The pulse width modulation circuit turns on or off the reverse voltage converter circuit according to the trigger signal.

Abstract: A power converter having a smooth transition control mechanism is provided. An oscillator circuit outputs a clock signal. A control circuit receives the clock signal from the oscillator circuit and outputs a control signal based on the clock signal. A driver circuit outputs a high-side conduction signal and a low-side conduction signal according to the control signal. A high-side switch is turned on or off according to the high-side conduction signal from the driver circuit. A low-side switch is turned on or off according to the low-side conduction signal from the driver circuit. The oscillator circuit receives the high-side conduction signal from the driver circuit. The oscillator circuit, according to the high-side conduction signal, determines whether or not the clock signal outputted to the control circuit needs to be adjusted.

Abstract: A power converter having a slew rate controlling mechanism is provided. A first terminal of a high-side switch is coupled to an input voltage. A first terminal of a low-side switch is connected to a second terminal of the high-side switch. A second terminal of a first capacitor is connected to a node between the second terminal of the high-side switch and the first terminal of the low-side switch. A first terminal of an inductor is connected to the second terminal of the first capacitor and to the node. A first terminal of a second capacitor is connected to a second terminal of the inductor. A second terminal of the second capacitor is grounded. An input terminal of a current controlling device is connected to a power output terminal of a high-side buffer. An output terminal of the current controlling device is connected to the node.

Abstract: A power converter having a slew rate controlling mechanism is provided. A first terminal of a high-side switch is coupled to an input voltage. A first terminal of a low-side switch is connected to a second terminal of the high-side switch. A second terminal of a first capacitor is connected to a node between the second terminal of the high-side switch and the first terminal of the low-side switch. A first terminal of an inductor is connected to the second terminal of the first capacitor and to the node. A first terminal of a second capacitor is connected to a second terminal of the inductor. A second terminal of the second capacitor is grounded. An input terminal of a current controlling device is connected to a power output terminal of a high-side buffer. An output terminal of the current controlling device is connected to the node.

Abstract: A power converter including switch components having different safe operating areas is provided. A first terminal of a first high-side switch is coupled to a common voltage. A first terminal of a first low-side switch is connected to a second terminal of the first high-side switch. A second terminal of the first low-side switch is grounded. A first terminal of a second low-side switch is connected to a node between the second terminal of the first high-side switch and the first terminal of the first low-side switch. A second terminal of the second low-side switch is grounded. A safe operating area of the second low-side switch is larger than a safe operating area of the first low-side switch. After the first low-side switch is turned off, the second low-side switch is turned off Before the first low-side switch is turned on, the second low-side switch is turned on.

Abstract: A power converter with an automatic balance mechanism of a flying capacitor is provided. The flying capacitor and a first terminal of an output inductor are connected to a switch circuit. Two terminals of an output capacitor are respectively connected to a second terminal of the output inductor and grounded. Two input terminals of an error amplifier are respectively connected to a node between the output capacitor and the output inductor, and coupled to a reference voltage. The error amplifier outputs an error amplified signal according to a voltage of the node and the reference voltage. A comparator circuit receives a ramp signal. A slope of the ramp signal is proportional to a voltage of the flying capacitor. The comparator circuit compares the ramp signal with the error amplified signal to output a comparison signal. The driving circuit drives the switch circuit according to the comparison signal.

Abstract: A power converter, a synchronous power converter system and a method of determining switching frequency are provided. A processor is configured to output a synchronous clock signal corresponding to a first switching frequency. A plurality of first-stage power converters are coupled to the processor, and configured to generate a plurality of first output voltages corresponding to the first switching frequency according to the synchronous clock signal and a system voltage. At least one second-stage power converter is coupled to the processor and one of the plurality of first-stage power converters, and configured to generate a second output voltage corresponding to a second switching frequency according to the synchronous clock signal, a multiplied frequency control signal and one of the plurality of first output voltages. The second switching frequency is a multiple of the first switching frequency.

Abstract: A power converter including switch components having different safe operating areas is provided. A first terminal of a first high-side switch is coupled to a common voltage. A first terminal of a first low-side switch is connected to a second terminal of the first high-side switch. A second terminal of the first low-side switch is grounded. A first terminal of a second low-side switch is connected to a node between the second terminal of the first high-side switch and the first terminal of the first low-side switch. A second terminal of the second low-side switch is grounded. A safe operating area of the second low-side switch is larger than a safe operating area of the first low-side switch. After the first low-side switch is turned off, the second low-side switch is turned off Before the first low-side switch is turned on, the second low-side switch is turned on.

Abstract: A power converter, a synchronous power converter system and a method of determining switching frequency are provided. A processor is configured to output a synchronous clock signal corresponding to a first switching frequency. A plurality of first-stage power converters are coupled to the processor, and configured to generate a plurality of first output voltages corresponding to the first switching frequency according to the synchronous clock signal and a system voltage. At least one second-stage power converter is coupled to the processor and one of the plurality of first-stage power converters, and configured to generate a second output voltage corresponding to a second switching frequency according to the synchronous clock signal, a multiplied frequency control signal and one of the plurality of first output voltages. The second switching frequency is a multiple of the first switching frequency.

Abstract: A power converter with an automatic balance mechanism of a flying capacitor is provided. The flying capacitor and a first terminal of an output inductor are connected to a switch circuit. Two terminals of an output capacitor are respectively connected to a second terminal of the output inductor and grounded. Two input terminals of an error amplifier are respectively connected to a node between the output capacitor and the output inductor, and coupled to a reference voltage. The error amplifier outputs an error amplified signal according to a voltage of the node and the reference voltage. A comparator circuit receives a ramp signal. A slope of the ramp signal is proportional to a voltage of the flying capacitor. The comparator circuit compares the ramp signal with the error amplified signal to output a comparison signal. The driving circuit drives the switch circuit according to the comparison signal.

Abstract: A synchronous power converter system is provided. The system includes a processor circuit and a plurality of power converters. The processor circuit outputs a plurality of clock signals having the same frequency. The power converters respectively receive the clock signals. Each of the power converters includes an oscillator circuit, a frequency detector circuit, a compensator circuit, a controller circuit, and a switch circuit. The oscillator circuit outputs an oscillation signal. The frequency detector circuit receives the clock signal and the oscillation signal and detects a clock frequency of the clock signal and an oscillation frequency of the oscillation signal to output a frequency detected signal. The compensator circuit outputs a compensating signal according to the frequency detected signal. The controller circuit controls the switch circuit according to the compensating signal.

Abstract: A synchronous power converter system is provided. The system includes a processor circuit and a plurality of power converters. The processor circuit outputs a plurality of clock signals having the same frequency. The power converters respectively receive the clock signals. Each of the power converters includes an oscillator circuit, a frequency detector circuit, a compensator circuit, a controller circuit, and a switch circuit. The oscillator circuit outputs an oscillation signal. The frequency detector circuit receives the clock signal and the oscillation signal and detects a clock frequency of the clock signal and an oscillation frequency of the oscillation signal to output a frequency detected signal. The compensator circuit outputs a compensating signal according to the frequency detected signal. The controller circuit controls the switch circuit according to the compensating signal.

Abstract: A power converter having fast transient response is provided. The power converter includes a voltage detector circuit and a compensator circuit. The voltage detector circuit includes a plurality of resistors, a plurality of comparators, and a detection control circuit. The resistors are connected in series with each other and grounded. First and second terminals of one of the resistors are respectively connected to a reference voltage and a first terminal of the adjacent resistor. First and second terminals of another of the resistors are respectively connected to a second terminal of the adjacent resistor and grounded. First input terminals of the comparators are respectively connected to second terminals of the resistors. The detection control circuit outputs control signals according to comparison signals. The compensator circuit outputs a compensating signal according to the control signals. A main control circuit controls switch circuits according to the compensating signal.

Abstract: An automatic bandwidth control system for any switching frequency of a power converter is provided. A pulse generator outputs a preset clock signal according to a comparing signal. A control circuit controls a first switch and a second switch according to frequencies of the preset clock signal and an external clock signal. A first current mirror is connected to an input voltage source and a first terminal of the first switch. A second comparator compares an output voltage of a second reference voltage source with an output voltage of the first current mirror to output the comparing signal. A second current mirror is connected to the input voltage source, an error amplifier and a first terminal of the second switch. A transconductance gain of the error amplifier is controlled by a current of the second current mirror to adjust a bandwidth of the power converter.

Abstract: A fast transient current mode control circuit and a method thereof are provided. The circuit includes a slope detector circuit and a switch controller circuit. The slope detector circuit detects an output voltage signal of a power convertor. When a voltage of the output voltage signal drops sharply and a slope of the output voltage signal is larger than a slope threshold, the slope detector circuit outputs a transient enhanced signal. The switch controller circuit outputs a switch control signal to an upper bridge switch of the power convertor according to the transient enhanced signal to turn on the upper bridge switch during a duty cycle of a pulse wave of the transient enhanced signal, such that a current flowing through an inductor of the power convertor increases to be equal to a current flowing through a load of a system.