Abstract: The invention introduces a method for reducing data errors in transceiving of a flash storage interface, performed by a processing unit of a first side, at least including: descrambling first data from a second side via an enabled descrambler of a lowest layer; determining whether a reception error is occurred by continuously monitoring first descrambled data; and when the reception error is occurred, disabling the descrambler of the lowest layer and issuing a first request to the second side for directing the second side to disable a scrambler, thereby disabling the second side to protect second data to be transmitted to the first side by using a data scrambling technique.

Abstract: The invention introduces a method for reducing data errors in transceiving of a flash storage interface, performed by a processing unit of a first side, comprising: continuously monitoring data frames and/or control frames from a second side; and triggering a TX (transmission) data rate adjustment when information of the data frame and/or the control frame indicates that the lowest layer of the second side detects errors from received data.

Abstract: The invention introduces a method for reducing data errors in transceiving of a flash storage interface, performed by a processing unit of a first side, comprising: continuously monitoring data frames and/or control frames from a second side; and triggering a de-emphasis adjustment when information of the data frame and/or the control frame indicates that the lowest layer of the second side detects errors from received data.

Abstract: An electronic device includes a data storage device and a host device. The host device is coupled to the data storage device via a predetermined interface and includes a processor. The processor dynamically adjusts a data transfer speed of the predetermined interface according to a data processing speed required by data to be read from or written to the data storage device.

Abstract: A host device coupled to a data storage device via a predetermined interface includes a processor and a thermal sensor. The thermal sensor senses ambient temperature to obtain a sensed temperature and provides the sensed temperature to the processor. When the processor determines that the sensed temperature is higher than a high-temperature threshold, the processor adjusts a data transfer speed of the predetermined interface according to a data processing speed required by subsequent data to be read from or written to the data storage device.

Abstract: A controller circuit includes a first signal processing device processing signals in accordance with a first predetermined rule, a second signal processing device processing signals in accordance with a second predetermined rule, a data bus coupled between the first signal processing device and the second signal processing device and comprising multiple data lines, and a confirm signal line coupled between the first signal processing device and the second signal processing device. The first signal processing device transmits a synchronization signal to the second signal processing device via the data bus. The second signal processing device estimates transmission delay on each data line according to the synchronization signal, performs transmission delay compensation on each data line according to the estimated transmission delay and transmits a confirmation signal on the confirm signal line to notify the first signal processing device that the transmission delay compensation is complete.

Abstract: A data storage device coupled to a host device via a predetermined interface includes a memory device, an SRAM, and a controller. The controller is coupled to the memory device and the SRAM. The controller receives a first power mode change request packet requesting to change the data transfer speed of the predetermined interface from a first speed to a second speed via the predetermined interface from the host device, and in response to the first power mode change request packet, the controller determines whether the operation status of the data storage device is busy. When the operation status of the data storage device is busy, the controller determines to reject the request to change the data transfer speed and keeps the data transfer speed at the first speed and does not change the data transfer speed to the second speed.

Abstract: A host device coupled to a data storage device via a predetermined interface includes a processor and a signal processing device. The processor accesses data stored in the data storage device via the predetermined interface. The signal processing device performs signal processing on the data. The processor transmits a first power mode change request packet to the data storage device via the predetermined interface, to request to change a data transfer speed of the predetermined interface from a first speed to a second speed. The processor receives a first power mode change confirm packet via the predetermined interface from the data storage device, and in response to the first power mode change confirm packet, the processor determines to keep the data transfer speed at the first speed and does not change the data transfer speed to the second speed.

Abstract: A dual-polarized antenna includes a ground plane, an inverted-F conductor unit with an inverted-F plane, an inverted-L conductor unit with an inverted-L plane and a stretched ground conductor unit with a T-shaped plane. The inverted-F plane is vertically connected to the inverted-L plane, the T-shaped plane and the ground plane respectively, and the T-shaped plane is vertically connected with the ground plane. Therefore, the inverted-F plane, the inverted-L plane and the stretched ground conductor unit correspond to each side of the ground plane respectively to form a dual-polarized radiation field.

Abstract: A dual-polarized antenna includes a ground plane, an inverted-F conductor unit with an inverted-F plane, an inverted-L conductor unit with an inverted-L plane and a stretched ground conductor unit with a T-shaped plane. The inverted-F plane is vertically connected to the inverted-L plane, the T-shaped plane and the ground plane respectively, and the T-shaped plane is vertically connected with the ground plane. Therefore, the inverted-F plane, the inverted-L plane and the stretched ground conductor unit correspond to each side of the ground plane respectively to form a dual-polarized radiation field.

Abstract: A multi-channel display driver circuit incorporating modified D/A converters has a plurality of digital comparators connected to a number generator. Each digital comparator has an output, a digital data input and a reference input. The reference inputs of all digital comparators are connected to the number generator and the outputs are respectively connected to corresponding data channels of a display. By the proposed technique, each digital comparator obtains a unique non-sequence reference signal, and then compares it with the input digital data signal. Since the non-sequential signals are input to the reference input of the digital comparator, the overshoot distortion, the harmonic distortion and the electromagnetic interference problems are prevented. Therefore, the precise imaging can be obtained with this signal modulation technique in small circuit size.

Abstract: A multi-channel display driver circuit incorporating modified D/A converters has a plurality of digital comparators connected to a number generator. Each digital comparator has an output, a digital data input and a reference input. The reference inputs of all digital comparators are connected to the number generator and the outputs are respectively connected to corresponding data channels of a display. By the proposed technique, each digital comparator obtains a unique non-sequence reference signal, and then compares it with the input digital data signal. Since the non-sequential signals are input to the reference input of the digital comparator, the overshoot distortion, the harmonic distortion and the electromagnetic interference problems are prevented. Therefore, the precise imaging can be obtained with this signal modulation technique in small circuit size.

Abstract: A plate type antenna for a small size mobile wireless communication device can be simultaneously to fit two different channels of 5.4 GHZ and 2.4 GHZ according to the specification of the wireless LAN standard announced by IEEE comprising a first antenna of a pair of “” shaped antenna wiring symmetrically printed on an upside surface of a dielectrical PC board and a second antenna of a “” shaped antenna wiring printed on an underside surface of the PC board coordinately piled under the first antenna wire for producing a reflecting surface yield point sympathy effect to provide two different transmitting channels fitting to the specification of the wireless LAN standard therefore.

Abstract: A plate type antenna for a small size mobile wireless communication device can be simultaneously to fit two different channels of 5.4 GHZ and 2.4 GHZ according to the specification of the wireless LAN standard announced by IEEE comprising a first antenna of a pair of “” shaped antenna wiring symmetrically printed on an upside surface of a dielectrical PC board and a second antenna of a “” shaped antenna wiring printed on an underside surface of the PC board coordinately piled under the first antenna wire for producing a reflecting surface yield point sympathy effect to provide two different transmitting channels fitting to the specification of the wireless LAN standard therefore.