Abstract: A layout method for a printed circuit board (PCB) is provided. The method obtains a memory type of a dynamic random access memory (DRAM) to be mounted on the PCB, obtains a module group from a database according to the memory type of the DRAM, wherein the module group comprises a plurality of routing modules, obtains a plurality of PCB parameters, selects a specific routing module from the module group according to the PCB parameters, and implements the specific routing module into a layout design for PCB fabrication. The specific routing module comprises layout information regarding a main chip, a memory chip and a routing configuration between the main chip and the memory chip.

Abstract: A layout method for a printed circuit board (PCB) is provided. The method obtains a memory type of a dynamic random access memory (DRAM) to be mounted on the PCB, obtains a module group from a database according to the memory type of the DRAM, wherein the module group comprises a plurality of routing modules, obtains a plurality of PCB parameters, selects a specific routing module from the module group according to the PCB parameters, and implements the specific routing module into a layout design for PCB fabrication. The specific routing module comprises layout information regarding a main chip, a memory chip and a routing configuration between the main chip and the memory chip.

Abstract: A printed circuit board (PCB) is provided. The PCB has a specific routing module, having a first chip, a memory chip, and a plurality of traces designed for interconnection between the first chip and the memory chip according to a routing configuration between the first chip and the memory chip. The memory chip is a dynamic random access memory (DRAM) with a memory type, the specific routing module is obtained from a module group comprising a plurality of routing modules according to a plurality of PCB parameters, and module group is obtained from a database according to the memory type of the DRAM.

Abstract: A layout method for a printed circuit board (PCB) is provided. A memory type of a dynamic random access memory (DRAM) to be mounted on the PCB is obtained. A module group is obtained from a database according to the memory type of the DRAM, wherein the module group includes a plurality of routing modules. A plurality of PCB parameters are obtained. A specific routing module is selected from the module group according to the PCB parameters. The specific routing module is implemented into a layout design of the PCB. The specific routing module includes layout information regarding a main chip, a memory chip and a routing configuration between the main chip and the memory chip.

Abstract: Embodiments of a printed circuit board (PCB) and an electronic apparatus are provided. The PCB includes a PCB substrate and a plurality of the pads. The PCB substrate is disposed with the plurality of the pads. The plurality of the pads include a first type of the pads and a second type of the pads. The first type of the pads adopts the solder mask defined structure, and the second type of the pads adopts the non-solder mask defined structure.

Abstract: A layout method for a printed circuit board (PCB) is provided. A memory type of a dynamic random access memory (DRAM) to be mounted on the PCB is obtained. A module group is obtained from a database according to the memory type of the DRAM, wherein the module group includes a plurality of routing modules. A plurality of PCB parameters are obtained. A specific routing module is selected from the module group according to the PCB parameters. The specific routing module is implemented into a layout design of the PCB. The specific routing module includes layout information regarding a main chip, a memory chip and a routing configuration between the main chip and the memory chip.

Abstract: A printed circuit board assembly (PCB) assembly is provided, including a printed circuit board (PCB) comprising a plurality of conductive pads and an advanced quad pack no-lead chip (a-QFN) package soldered to the printed circuit board. In one embodiment, the conductive pads have a first surface area and the QFN package includes a plurality of leads facing the conductive pads, having a second surface area, wherein a ratio between the second surface area and the first surface area is about 20% to 85% to ensure a physical connection between the PCB and the a-QFN package.