Abstract: A wafer supporting mechanism and a method for wafer dicing are provided. The wafer supporting mechanism includes a base portion and a support portion. The base portion includes a first gas channel and a first outlet connected to the first gas channel. The support portion is connected to the base portion and including a second gas channel connected to the first gas channel. An accommodation space is defined by the base portion and the support portion.

Abstract: A wafer supporting mechanism and a method for wafer dicing are provided. The wafer supporting mechanism includes a base portion and a support portion. The base portion includes a first gas channel and a first outlet connected to the first gas channel. The support portion is connected to the base portion and including a second gas channel connected to the first gas channel. An accommodation space is defined by the base portion and the support portion.

Abstract: A method for manufacturing an electrical package is provided. The method include: providing a substrate having a first surface and a second surface opposite to the first surface, wherein the second surface has a first level difference; forming an adhesive layer on the second surface of the substrate, wherein the adhesive layer is configured to cover the second surface and provides a third surface spaced apart from the second surface of the substrate, wherein the third surface has a second level difference; disposing a tape on the third surface of the adhesive layer; and performing a removing operation on the first surface of the substrate; wherein the second level difference is smaller than the first level difference.

Abstract: A wafer supporting mechanism and a method for wafer dicing are provided. The wafer supporting mechanism includes a base portion and a support portion. The base portion includes a first gas channel and a first outlet connected to the first gas channel. The support portion is connected to the base portion and including a second gas channel connected to the first gas channel. An accommodation space is defined by the base portion and the support portion.

Abstract: A wafer supporting mechanism and a method for wafer dicing are provided. The wafer supporting mechanism includes a base portion and a support portion. The base portion includes a first gas channel and a first outlet connected to the first gas channel. The support portion is connected to the base portion and including a second gas channel connected to the first gas channel. An accommodation space is defined by the base portion and the support portion.

Abstract: A method of processing a semiconductor wafer is provided. The method includes providing a semiconductor wafer having a front side and a back side, the semiconductor wafer provided with a circuit layer at the front side and a patterned surface at the back side, forming a sacrificial layer on the back side, mounting a tape on the sacrificial layer, the sacrificial layer isolating the patterned surface from the tape, wherein adhesion strength between the sacrificial layer and the patterned surface is larger than that between the sacrificial layer and the tape, dicing the semiconductor wafer at the back side through the tape, defining individual chips on the semiconductor wafer, and expanding the tape to separate the chips from each other.

Abstract: A method of processing a semiconductor wafer is provided. The method includes providing a semiconductor wafer having a front side and a back side, the semiconductor wafer provided with a circuit layer at the front side and a patterned surface at the back side, forming a sacrificial layer on the back side, mounting a tape on the sacrificial layer, the sacrificial layer isolating the patterned surface from the tape, wherein adhesion strength between the sacrificial layer and the patterned surface is larger than that between the sacrificial layer and the tape, dicing the semiconductor wafer at the back side through the tape, defining individual chips on the semiconductor wafer, and expanding the tape to separate the chips from each other.

Abstract: A method for sawing a wafer includes the following steps. A wafer which has an active surface, a back surface and a plurality of longitudinal and transverse sawing lines is provided, wherein the sawing lines are located on the active surface so as to define a plurality of dies. A multiple-type tape is attached on the active surface of the wafer, wherein the multiple-type tape includes a first tape and a second tape, the second tape is located between the first tape and the active surface of the wafer, and the second tape is transparent. The back surface of the wafer is grinded. The first tape is removed. Finally, the wafer including the second tape is sawn along the sawing lines so as to separate the dies from one another.

Abstract: A method for sawing a wafer includes the following steps. A wafer which has an active surface, a back surface and a plurality of longitudinal and transverse sawing lines is provided, wherein the sawing lines are located on the active surface so as to define a plurality of dies. A multiple tape is attached on the active surface of the wafer, wherein the multiple tape includes a first tape and a second tape, the second tape is located between the first tape and the active surface of the wafer, and the second tape is transparent. The back surface of the wafer is grinded. The first tape is removed. Finally, the wafer including the second tape is sawn along the sawing lines so as to separate the dies from one another.

Abstract: The present invention relates to a sawing method for a wafer. The sawing method of the invention comprises: (a) providing a wafer, the wafer having an active surface and a back surface, the active surface having a plurality of sawing lines; (b) coating a protection layer on the active surface and the sawing lines; (c) taping a grinding tape on a surface of the protection layer; (d) grinding the back surface of the wafer to thin the wafer; (e) removing the grinding tape; and (f) sawing the wafer to form a plurality of dice. Whereby, the problems of die cracking, die scratching, die contamination and peeling of the surface of the sawing lines can be avoided.

Abstract: A method for dicing a wafer is provided. A layer of adhesive material is applied to the back surface of the wafer so as to provide a sufficient mechanical strength for the wafer during dicing process thereby preventing the dice diced from the wafer from undue chipping on the back surfaces and the side surfaces.

Abstract: A semiconductor wafer cassette has a first side wall, a second side wall opposite the first side wall, a front surface, and a back surface opposite the front surface. A body defines an internal bay portion with slots for vertically receiving wafers, each slot of the internal bay portion having one support slab. The body also includes two parallel legs for supporting the cassette and a handle for handling the cassette.

Abstract: The present invention discloses a semiconductor wafer cassette, which is able to receive at least one wafer, comprising: a first side wall, a second side wall opposite to the first side wall, a front surface, and a back surface opposite to the front surface; the cassette further comprising a body, the body defining an internal bay portion with slots for vertically receiving a plurality of wafers, each slot of the internal bay portion having one support slab. Moreover, the body also includes two parallel legs for supporting the cassette and a handle for handling the wafer cassette.

Abstract: The present invention discloses a frame cassette comprising a case, a hollow parallelepiped with an front opening, having a bottom wall and a top wall parallel with each other, and a left side wall, a right side wall and a rear side wall perpendicular to the top wall and the bottom wall; and a plurality of frames for adhering and fixing cut wafers; characterized in that: a positioning hole is disposed on near the boundary between the bottom wall and the left side wall and the right side wall to fix the frame cassette on a personal guided vehicle.

Abstract: An adhesive pattern for attaching a semiconductor chip onto a non-uniform substrate is disclosed. The adhesive pattern comprises a double-k pattern formed on the substrate. The double-k pattern includes a longest major line and four shorter lines connected to the major line. The non-uniform substrate has a conductive circuit and a solder mask formed on the substrate including the circuit. The substrate has a die covering region for receiving the semiconductor chip. The conductive circuit of the substrate comprises a plurality of conductive traces unequally distributed on the die covering region. The double-k adhesive pattern of the present invention is applied onto the non-uniform substrate by a dispenser in a manner that the area on the substrate defined between the major line and the border of the die covering region has a trace density lower than the other area on the substrate.