Patents by Inventor Fu-Tien Weng

Fu-Tien Weng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9128218
    Abstract: A microlens structure is provided. The microlens structure includes a microlens element having a first refraction index. A first film is disposed on the microlens element, wherein the first film has a second refraction index less than the first refraction index. A second film is disposed on the first film, wherein the second film has a third refraction index less than the second refraction index and greater than a refraction index of air. Further, a fabrication method of the microlens structure is also provided.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: September 8, 2015
    Assignee: VisEra Technologies Company Limited
    Inventors: Fu-Tien Weng, Yu-Kun Hsiao
  • Patent number: 9117714
    Abstract: An exemplary wafer level package comprises a semiconductor wafer with a plurality of semiconductor chips of perfect polygonal shapes thereon. A circuit-free area is defined over the semiconductor wafer to electrically isolate the semiconductor chips. A dam structure is substantially formed over the circuit-free area, wherein a portion of the dam structure formed around an edge of the semiconductor wafer is formed with a plurality via holes therein. A transparent substrate is formed over the semiconductor wafer, defining a plurality of cavities between the semiconductor chips and the transparent substrate, wherein the transparent substrate is supported by the dam structure.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: August 25, 2015
    Assignee: VisEra TECHNOLOGIES COMPANY LIMITED
    Inventors: Fu-Tien Weng, Yung-Shun Liao, Yi-Chuan Lo, Bii-Cheng Chang
  • Patent number: 8664680
    Abstract: A method for fabricating a color filter structure includes: providing a base layer; forming a first colored layer on the base layer; patterning the first colored layer to form a pair of first colored patterns, a first opening between the first colored patterns, and a second opening adjacent to the first colored patterns; forming a first dielectric layer on the first colored patterns and the base layer exposed by the first and second openings; forming a second colored layer on the first colored patterns and the first dielectric layer; patterning the second colored layer to form a second colored pattern in the first opening; forming a second dielectric layer on the first dielectric layer and the second colored pattern; forming a third colored layer on the second dielectric layer; and patterning the third colored layer to form a third colored pattern in the second opening.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: March 4, 2014
    Assignee: VisEra Technologies Company Limited
    Inventors: Fu-Tien Weng, Chieh-Yuan Cheng, Han-Lin Wu
  • Publication number: 20130180949
    Abstract: A method for fabricating a color filter structure includes: providing a base layer; forming a first colored layer on the base layer; patterning the first colored layer to form a pair of first colored patterns, a first opening between the first colored patterns, and a second opening adjacent to the first colored patterns; forming a first dielectric layer on the first colored patterns and the base layer exposed by the first and second openings; forming a second colored layer on the first colored patterns and the first dielectric layer; patterning the second colored layer to form a second colored pattern in the first opening; forming a second dielectric layer on the first dielectric layer and the second colored pattern; forming a third colored layer on the second dielectric layer; and patterning the third colored layer to form a third colored pattern in the second opening.
    Type: Application
    Filed: January 13, 2012
    Publication date: July 18, 2013
    Inventors: Fu-Tien Weng, Chieh-Yuan Cheng, Han-Lin Wu
  • Publication number: 20130170047
    Abstract: A microlens structure is provided. The microlens structure includes a microlens element having a first refraction index. A first film is disposed on the microlens element, wherein the first film has a second refraction index less than the first refraction index. A second film is disposed on the first film, wherein the second film has a third refraction index less than the second refraction index and greater than a refraction index of air. Further, a fabrication method of the microlens structure is also provided.
    Type: Application
    Filed: December 29, 2011
    Publication date: July 4, 2013
    Inventors: Fu-Tien WENG, Yu-Kun Hsiao
  • Patent number: 8129762
    Abstract: A method is provided for processing a substrate. The substrate has at least one filter region, a plurality of bond pads, and a plurality of scribe lines arranged around the filter region and bond pads. A first planarization layer is formed above the substrate. The planarization layer has a substantially flat top surface overlying the filter region, the bond pads and the scribe lines. At least one color resist layer is formed over the first planarization layer and within the filter region while the first planarization layer covers the bond pads and the scribe lines.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: March 6, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Tien Weng, Yu-Kung Hsiao, Hung-Jen Hsu, Yi-Ming Dai, Chin Chen Kuo, Te-Fu Tseng, Chih-Kung Chang, Jack Deng, Chung-Sheng Hsiung, Bii-Junq Chang
  • Publication number: 20100164040
    Abstract: A microlens structure and a method of fabrication thereof are provided. The method comprises forming a layer of microlens material over a substrate, which has photo-sensitive elements formed therein. The microlens material, which comprises a photo-resist material, is exposed in accordance with a desired pattern a plurality of times. The energy used with each exposure process is less than the energy required if a single exposure is used. Furthermore, the masks used for each exposure may differ. In an embodiment, the masks are varied so as to create a notch in the upper corner of the microlens. The microlens structure may have a height less than about 0.5 um and/or a gap between microlenses less than about 0.2 um. In an embodiment, one or more dielectric layers having a combined thickness greater than about 3.5 um are interposed between the photo-sensitive elements and the microlenses.
    Type: Application
    Filed: March 11, 2010
    Publication date: July 1, 2010
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Chang Kao, Chih-Kung Chang, Fu-Tien Weng, Bii-Junq Chang
  • Patent number: 7704778
    Abstract: A microlens structure and a method of fabrication thereof are provided. The method comprises forming a layer of microlens material over a substrate, which has photo-sensitive elements formed therein. The microlens material, which comprises a photo-resist material, is exposed in accordance with a desired pattern a plurality of times. The energy used with each exposure process is less than the energy required if a single exposure is used. Furthermore, the masks used for each exposure may differ. In an embodiment, the masks are varied so as to create a notch in the upper corner of the microlens.
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: April 27, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Chang Kao, Chih-Kung Chang, Fu-Tien Weng, Bii-Junq Chang
  • Publication number: 20090104547
    Abstract: A method is provided for processing a substrate. The substrate has at least one filter region, a plurality of bond pads, and a plurality of scribe lines arranged around the filter region and bond pads. A first planarization layer is formed above the substrate. The planarization layer has a substantially flat top surface overlying the filter region, the bond pads and the scribe lines. At least one color resist layer is formed over the first planarization layer and within the filter region while the first planarization layer covers the bond pads and the scribe lines.
    Type: Application
    Filed: December 31, 2008
    Publication date: April 23, 2009
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Tien Weng, Yu-Kung Hsiao, Hung-Jen Hsu, Yi-Ming Dai, Chin Chen Kuo, Te-Fu Tseng, Chih-Kung Chang, Jack Deng, Chung-Sheng Hsiung, Bii-Junq Chang
  • Publication number: 20090102005
    Abstract: An exemplary wafer level package comprises a semiconductor wafer with a plurality of semiconductor chips of perfect polygonal shapes thereon. A circuit-free area is defined over the semiconductor wafer to electrically isolate the semiconductor chips. A dam structure is substantially formed over the circuit-free area, wherein a portion of the dam structure formed around an edge of the semiconductor wafer is formed with a plurality via holes therein. A transparent substrate is formed over the semiconductor wafer, defining a plurality of cavities between the semiconductor chips and the transparent substrate, wherein the transparent substrate is supported by the dam structure.
    Type: Application
    Filed: October 19, 2007
    Publication date: April 23, 2009
    Inventors: Fu-Tien Weng, Yung-Shun Liao, Yi-Chuan Lo, Bii-Cheng Chang
  • Patent number: 7507598
    Abstract: A method is provided for processing a substrate. The substrate has at least one filter region, a plurality of bond pads, and a plurality of scribe lines arranged around the filter region and bond pads. A first planarization layer is formed above the substrate. The planarization layer has a substantially flat top surface overlying the filter region, the bond pads and the scribe lines. At least one color resist layer is formed over the first planarization layer and within the filter region while the first planarization layer covers the bond pads and the scribe lines.
    Type: Grant
    Filed: June 20, 2005
    Date of Patent: March 24, 2009
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Tien Weng, Yu-Kung Hsiao, Hung-Jen Hsu, Yi-Ming Dai, Chin Chen Kuo, Te-Fu Tseng, Chih-Kung Chang, Jack Deng, Chung-Sheng Hsiung, Bii-Junq Chang
  • Patent number: 7505206
    Abstract: A method of manufacturing a microlens device by depositing a microlens material layer over a substrate that includes photo-sensors. The microlens material layer is then exposed and developed to define microlens material elements, including first microlens material elements and second microlens material elements. Each second microlens material element is substantially greater in thickness relative to each first microlens material element. The microlens material elements are then heated to form a microlens array that includes first microlens array elements, each corresponding to a first microlens material element, and second microlens array elements, each corresponding to a second microlens material element. Each first microlens array element has a substantially greater focal length relative to each second microlens array element. For example, each second microlens array element is substantially greater in thickness relative to each first microlens array element.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: March 17, 2009
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Jack Deng, Chih-Kung Chang, Chin Chen Kuo, Ming-Chang Kao, Fu-Tien Weng, Bii-Junq Chang
  • Patent number: 7372497
    Abstract: An image sensor device and method for forming said device are described. The image sensor structure comprises a substrate with photodiodes, an interconnect structure formed on the substrate, a color filter layer above the interconnect structure, a first microlens array, an overcoat layer, and a second microlens array. A key feature is that a second microlens has a larger radius of curvature than a first microlens. Additionally, each first microlens and second microlens is a flat convex lens. Thus, a thicker second microlens with a short focal length is aligned above a thinner first microlens having a long focal length. A light column that includes a first microlens, a second microlens and a color filter region is formed above each photodiode. A second embodiment involves replacing a second microlens in each light column with a plurality of smaller second microlenses that focus light onto a first microlens.
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: May 13, 2008
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Fu-Tien Weng, Yu-Kung Hsiao, Chin-Kung Chang, Hung-Jen Hsu, Yi-Ming Dai, Chin-Chen Kuo
  • Publication number: 20080007839
    Abstract: A method of manufacturing a microlens device by depositing a microlens material layer over a substrate that includes photo-sensors. The microlens material layer is then exposed and developed to define microlens material elements, including first microlens material elements and second microlens material elements. Each second microlens material element is substantially greater in thickness relative to each first microlens material element. The microlens material elements are then heated to form a microlens array that includes first microlens array elements, each corresponding to a first microlens material element, and second microlens array elements, each corresponding to a second microlens material element. Each first microlens array element has a substantially greater focal length relative to each second microlens array element. For example, each second microlens array element is substantially greater in thickness relative to each first microlens array element.
    Type: Application
    Filed: July 10, 2006
    Publication date: January 10, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jack DENG, Chih-Kung CHANG, Chin Chen KUO, M. C. KAO, Fu-Tien WENG, Bii-Junq CHANG
  • Patent number: 7264976
    Abstract: A method of manufacturing a plurality of microlenses on a substrate comprises forming a grid having raised ridges defining a plurality of openings on the substrate and forming a plurality of patterned photoresist features each disposed within one of the plurality of openings. The plurality of patterned photoresist features can then be reflowed inside the grid.
    Type: Grant
    Filed: February 23, 2005
    Date of Patent: September 4, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jack Deng, Chin Chen Kuo, Fu-Tien Weng, Chih-Kung Chang, Bii-Junq Chang
  • Publication number: 20060189062
    Abstract: A method of manufacturing a plurality of microlenses on a substrate comprises forming a grid having raised ridges defining a plurality of openings on the substrate and forming a plurality of patterned photoresist features each disposed within one of the plurality of openings. The plurality of patterned photoresist features can then be reflowed inside the grid.
    Type: Application
    Filed: February 23, 2005
    Publication date: August 24, 2006
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jack Deng, Chin Kuo, Fu-Tien Weng, Chih-Kung Chang, Bii-Junq Chang
  • Publication number: 20060189024
    Abstract: A microlens structure and a method of fabrication thereof are provided. The method comprises forming a layer of microlens material over a substrate, which has photo-sensitive elements formed therein. The microlens material, which comprises a photo-resist material, is exposed in accordance with a desired pattern a plurality of times. The energy used with each exposure process is less than the energy required if a single exposure is used. Furthermore, the masks used for each exposure may differ. In an embodiment, the masks are varied so as to create a notch in the upper corner of the microlens.
    Type: Application
    Filed: July 14, 2005
    Publication date: August 24, 2006
    Inventors: Ming-Chang Kao, Chih-Kung Chang, Fu-Tien Weng, Bii-Junq Chang
  • Patent number: 7071032
    Abstract: A new method is provided of treating the wafer prior to the process of singulating the wafer into individual die. A first surface of the wafer over which CMOS image sensor devices have been created is coated with a layer of material that is non-soluble in water. The wafer is attached to a tape by bringing a second surface of the wafer in contact with the tape. The wafer is singulated by approaching the first surface of the wafer and by sawing first through the layer of material that has been coated over the first surface of the wafer and by then sawing through the wafer, stopping at the surface of the tape. A thorough water rinse is applied to the surface of the singulated wafer, followed by a wafer clean applying specific chemicals for this purpose. The singulated die is now removed from the tape and further processed by applying steps of die mount, wire bonding, surrounding the die in a mold compound and marking the package.
    Type: Grant
    Filed: May 7, 2003
    Date of Patent: July 4, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Jen Hsu, Yu-Kung Hsiao, Chih-Kung Chang, Sheng-Liang Pan, Fu-Tien Weng
  • Publication number: 20060131710
    Abstract: The present invention provides an advanced cavity structure for optically sensitive devices in wafer level chip scale package and methods of manufacturing thereof. Image sensor or light detection integrated circuits are formed on substrate. Substantially absorptive bleached cavity walls are formed about the image sensor or light detection integrated circuits. Upon attaching a transparent layer to the bleached cavity walls and above the image sensor or light detection integrated circuits, open chambers are formed thereby permitting the image sensor or light detection integrated circuits to receive and manipulate signals without decreasing or decaying the optical sensitivity of the incident light. Furthermore, individual image sensor or light detection integrated circuits may be separated from each other to comprise wafer level chip scale packages of at least one image sensor or light detection integrated circuits, at least one transparent layer, and at least one open chamber.
    Type: Application
    Filed: December 21, 2004
    Publication date: June 22, 2006
    Inventors: Chin Kuo, Jack Deng, Fu-Tien Weng, Chih-Kung Chang, Bii-Jung Chang
  • Publication number: 20060019424
    Abstract: A method is provided for processing a substrate. The substrate has at least one filter region, a plurality of bond pads, and a plurality of scribe lines arranged around the filter region and bond pads. A first planarization layer is formed above the substrate. The planarization layer has a substantially flat top surface overlying the filter region, the bond pads and the scribe lines. At least one color resist layer is formed over the first planarization layer and within the filter region while the first planarization layer covers the bond pads and the scribe lines.
    Type: Application
    Filed: June 20, 2005
    Publication date: January 26, 2006
    Inventors: Fu-Tien Weng, Yu-Kung Hsiao, Hung-Jen Hsu, Yi-Ming Dai, Chin Chen Kuo, Te-Fu Tseng, Chih-Kung Chang, Jack Deng, Chung-Sheng Hsiung, Bii-Junq Chang