Patents by Inventor Fubito Igari

Fubito Igari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Non-volatile semiconductor storage apparatus
    Patent number: 9940192
    Abstract: According to one embodiment, a non-volatile semiconductor storage apparatus is configured to decide determination periods respectively corresponding to each of management blocks based on rewrite count information items and a temperature, and to perform a determination processing for each of management blocks for each determination period. The determination processing includes determining whether first data read from a block in the blocks is normal based on the number of errors that are occurred in the first data. The apparatus is configured to perform a rewrite processing of rewriting the first data to second data which is error-corrected when it is determined that the first data is not normal.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: April 10, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Fubito Igari, Hiroyuki Suto, Yasuyuki Ozawa
  • NON-VOLATILE SEMICONDUCTOR STORAGE APPARATUS
    Publication number: 20150052414
    Abstract: According to one embodiment, a non-volatile semiconductor storage apparatus is configured to decide determination periods respectively corresponding to each of management blocks based on rewrite count information items and a temperature, and to perform a determination processing for each of management blocks for each determination period. The determination processing includes determining whether first data read from a block in the blocks is normal based on the number of errors that are occurred in the first data. The apparatus is configured to perform a rewrite processing of rewriting the first data to second data which is error-corrected when it is determined that the first data is not normal.
    Type: Application
    Filed: October 30, 2014
    Publication date: February 19, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Fubito IGARI, Hiroyuki Suto, Yasuyuki Ozawa
  • Non-volatile semiconductor storage apparatus
    Patent number: 8918699
    Abstract: According to one embodiment, a non-volatile semiconductor storage apparatus is configured to decide determination periods respectively corresponding to each of management blocks based on rewrite count information items and a temperature, and to perform a determination processing for each of management blocks for each determination period. The determination processing includes determining whether first data read from a block in the blocks is normal based on the number of errors that are occurred in the first data. The apparatus is configured to perform a rewrite processing of rewriting the first data to second data which is error-corrected when it is determined that the first data is not normal.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: December 23, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Fubito Igari, Hiroyuki Suto, Yasuyuki Ozawa
  • Electronic device with serial ATA interface and power saving method for serial ATA buses
    Patent number: 8732502
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Grant
    Filed: September 10, 2010
    Date of Patent: May 20, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Fubito Igari
  • NON-VOLATILE SEMICONDUCTOR STORAGE APPARATUS
    Publication number: 20140040701
    Abstract: According to one embodiment, a non-volatile semiconductor storage apparatus is configured to decide determination periods respectively corresponding to each of management blocks based on rewrite count information items and a temperature, and to perform a determination processing for each of management blocks for each determination period. The determination processing includes determining whether first data read from a block in the blocks is normal based on the number of errors that are occurred in the first data. The apparatus is configured to perform a rewrite processing of rewriting the first data to second data which is error-corrected when it is determined that the first data is not normal.
    Type: Application
    Filed: January 29, 2013
    Publication date: February 6, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Fubito IGARI, Hiroyuki Suto, Yasuyuki Ozawa
  • Electronic device and power saving method using predetermined command to designate portion of device in power saving mode
    Patent number: 8219837
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: July 10, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Fubito Igari
  • Electronic device with serial ATA interface and power saving method for serial ATA buses
    Patent number: 7882378
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: February 1, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Fubito Igari
  • ELECTRONIC DEVICE WITH SERIAL ATA INTERFACE AND POWER SAVING METHOD FOR SERIAL ATA BUSES
    Publication number: 20110010573
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Application
    Filed: September 10, 2010
    Publication date: January 13, 2011
    Inventor: Fubito IGARI
  • Electronic device with serial ATA interface and power saving method for serial ATA buses
    Patent number: 7856567
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: December 21, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Fubito Igari
  • Electronic device with serial ATA interface and power saving method for serial ATA buses
    Patent number: 7856565
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: December 21, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Fubito Igari
  • Electronic device with serial ATA interface and power saving method for serial ATA buses
    Patent number: 7809967
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: October 5, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Fubito Igari
  • Electronic device with serial ATA interface and power saving method for serial ATA buses
    Patent number: 7797562
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: September 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Fubito Igari
  • Electronic device with serial ATA interface and power saving method for serial ATA buses
    Patent number: 7770041
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: August 3, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Fubito Igari
  • Electronic device with serial ATA interface and power saving method for serial ATA buses
    Patent number: 7747885
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Grant
    Filed: December 14, 2007
    Date of Patent: June 29, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Fubito Igari
  • ELECTRONIC DEVICE WITH SERIAL ATA INTERFACE AND POWER SAVING METHOD FOR SERIAL ATA BUSES
    Publication number: 20090177905
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Application
    Filed: March 5, 2009
    Publication date: July 9, 2009
    Inventor: Fubito Igari
  • ELECTRONIC DEVICE WITH SERIAL ATA INTERFACE AND POWER SAVING METHOD FOR SERIAL ATA BUSES
    Publication number: 20090172448
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Application
    Filed: March 5, 2009
    Publication date: July 2, 2009
    Inventor: Fubito IGARI
  • ELECTRONIC DEVICE WITH SERIAL ATA INTERFACE AND POWER SAVING METHOD FOR SERIAL ATA BUSES
    Publication number: 20090172209
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Application
    Filed: March 5, 2009
    Publication date: July 2, 2009
    Inventor: Fubito IGARI
  • ELECTRONIC DEVICE WITH SERIAL ATA INTERFACE AND POWER SAVING METHOD FOR SERIAL ATA BUSES
    Publication number: 20090172312
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Application
    Filed: March 5, 2009
    Publication date: July 2, 2009
    Inventor: Fubito IGARI
  • Electronic device with serial ATA interference and power saving method for serial ATA buses
    Patent number: RE47050
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: September 18, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Fubito Igari
  • Electronic device with serial ATA interface and power saving method for serial ATA buses
    Patent number: RE48190
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: September 1, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Fubito Igari