Patents by Inventor Fukumi Shimizu
Fukumi Shimizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9966329Abstract: Reliability of a semiconductor device is improved. A method for manufacturing the semiconductor device includes the steps of: providing a lead frame having a semiconductor chip mounted thereon; providing a heat radiating frame having a heat radiating plate; and resin sealing the semiconductor chip and the heat radiating plate with the lead frame and the heat radiating frame in a stacked state. The method further includes the steps of: separating a frame body of the heat radiating frame from the lead frame having a sealing body; and applying an inspection to detect resin-unfilled regions to the lead frame having the sealing body. Since the frame body of the heat radiating frame shielding an inspection region is removed before the inspection, it becomes possible to perform the inspection using transmitted light.Type: GrantFiled: July 26, 2017Date of Patent: May 8, 2018Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Fukumi Shimizu, Haruhiko Harada
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Publication number: 20180090423Abstract: Reliability of a semiconductor device is improved. A method for manufacturing the semiconductor device includes the steps of: providing a lead frame having a semiconductor chip mounted thereon; providing a heat radiating frame having a heat radiating plate; and resin sealing the semiconductor chip and the heat radiating plate with the lead frame and the heat radiating frame in a stacked state. The method further includes the steps of: separating a frame body of the heat radiating frame from the lead frame having a sealing body; and applying an inspection to detect resin-unfilled regions to the lead frame having the sealing body. Since the frame body of the heat radiating frame shielding an inspection region is removed before the inspection, it becomes possible to perform the inspection using transmitted light.Type: ApplicationFiled: July 26, 2017Publication date: March 29, 2018Inventors: Fukumi SHIMIZU, Haruhiko HARADA
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Publication number: 20160005699Abstract: The method includes the steps of: providing a lead frame, including providing a concaved part in an upper face of a joint part of a die-pad-support lead of a lead frame for setting down a die pad and a tie-bar; bonding a semiconductor chip to a first principal face of the die pad via an adhesive-member layer; then, setting the lead frame between first and second molding dies having first and second cavities respectively so that the first and second cavities are opposed to each other, and the second principal face of the die pad faces toward the second cavity; and forming first and second resin sealed bodies on the sides of the first and second principal faces of the die pad respectively by resin sealing with the first and second molding dies clamping the tie-bar and a part of the lead frame surrounding the tie-bar.Type: ApplicationFiled: September 17, 2015Publication date: January 7, 2016Inventors: Yusuke OTA, Fukumi SHIMIZU
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Patent number: 9153527Abstract: The method includes the steps of: providing a lead frame, including providing a concaved part in an upper face of a joint part of a die-pad-support lead of a lead frame for setting down a die pad and a tie-bar; bonding a semiconductor chip to a first principal face of the die pad via an adhesive-member layer; then, setting the lead frame between first and second molding dies having first and second cavities respectively so that the first and second cavities are opposed to each other, and the second principal face of the die pad faces toward the second cavity; and forming first and second resin sealed bodies on the sides of the first and second principal faces of the die pad respectively by resin sealing with the first and second molding dies clamping the tie-bar and a part of the lead frame surrounding the tie-bar.Type: GrantFiled: June 2, 2014Date of Patent: October 6, 2015Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yusuke Ota, Fukumi Shimizu
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Publication number: 20140264797Abstract: The method includes the steps of: providing a lead frame, including providing a concaved part in an upper face of a joint part of a die-pad-support lead of a lead frame for setting down a die pad and a tie-bar; bonding a semiconductor chip to a first principal face of the die pad via an adhesive-member layer; then, setting the lead frame between first and second molding dies having first and second cavities respectively so that the first and second cavities are opposed to each other, and the second principal face of the die pad faces toward the second cavity; and forming first and second resin sealed bodies on the sides of the first and second principal faces of the die pad respectively by resin sealing with the first and second molding dies clamping the tie-bar and a part of the lead frame surrounding the tie-bar.Type: ApplicationFiled: June 2, 2014Publication date: September 18, 2014Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Yusuke OTA, Fukumi SHIMIZU
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Patent number: 8772090Abstract: The method includes the steps of: providing a lead frame, including providing a concaved part in an upper face of a joint part of a die-pad-support lead of a lead frame for setting down a die pad and a tie-bar; bonding a semiconductor chip to a first principal face of the die pad via an adhesive-member layer; then, setting the lead frame between first and second molding dies having first and second cavities respectively so that the first and second cavities are opposed to each other, and the second principal face of the die pad faces toward the second cavity; and forming first and second resin sealed bodies on the sides of the first and second principal faces of the die pad respectively by resin sealing with the first and second molding dies clamping the tie-bar and a part of the lead frame surrounding the tie-bar.Type: GrantFiled: May 21, 2013Date of Patent: July 8, 2014Assignee: Renesas Electronics CorporationInventors: Yusuke Ota, Fukumi Shimizu
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Publication number: 20130316500Abstract: The method includes the steps of: providing a lead frame, including providing a concaved part in an upper face of a joint part of a die-pad-support lead of a lead frame for setting down a die pad and a tie-bar; bonding a semiconductor chip to a first principal face of the die pad via an adhesive-member layer; then, setting the lead frame between first and second molding dies having first and second cavities respectively so that the first and second cavities are opposed to each other, and the second principal face of the die pad faces toward the second cavity; and forming first and second resin sealed bodies on the sides of the first and second principal faces of the die pad respectively by resin sealing with the first and second molding dies clamping the tie-bar and a part of the lead frame surrounding the tie-bar.Type: ApplicationFiled: May 21, 2013Publication date: November 28, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Yusuke OTA, Fukumi SHIMIZU
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Patent number: 8476113Abstract: When chip-scale molding system is employed for QFP, the number of semiconductor devices available from a leadframe decreases because cavities each requires a runner portion. This problem can be overcome by employing MAP system, but use of a laminate tape increases the production cost. In through mold system, each cavity needs an ejector pin, which however makes it difficult to place a support pillar. The present application provides a manufacturing method of a semiconductor device by filling, while sandwiching a leadframe between mold dies having a matrix-state cavity group in which cavity columns obtained by linking mold cavities in series via a through gate have been placed in rows, a sealing resin in the cavities. In this method, the matrix-state cavity group has, at the cavity corner portions thereof, a support pillar having a cross-section striding over all the cavities adjacent to the cavity corner portions when viewed planarly.Type: GrantFiled: June 15, 2011Date of Patent: July 2, 2013Assignee: Renesas Electronics CorporationInventors: Bunshi Kuratomi, Fukumi Shimizu
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Patent number: 8117742Abstract: A method of fabricating a semiconductor integrated circuit device uses a mold which is provided with a plurality of air vents and movable pins which are formed such that the movable pins include grooves in the distal ends thereof which project into the air vents. By clamping the mold in a state such that the distal ends of the movable pins are pushed against a multi-cavity board at the time of clamping the mold, resin can be filled while leaking air inside the cavity through the grooves formed in the distal ends of the movable pins by setting the depths of the respective air vents to a fixed value irrespective of the irregularities in thickness of the multi-cavity boards. Accordingly, it is possible to prevent insufficient filling of resin in the cavity, the leaking of resin or defective welding, whereby the yield rate of products can be enhanced.Type: GrantFiled: March 22, 2010Date of Patent: February 21, 2012Assignees: Renesas Electronics Corporation, Renesas Eastern Japan Semiconductor, Inc.Inventors: Bunshi Kuratomi, Fukumi Shimizu
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Publication number: 20120009737Abstract: When chip-scale molding system is employed for QFP, the number of semiconductor devices available from a leadframe decreases because cavities each requires a runner portion. This problem can be overcome by employing MAP system, but use of a laminate tape increases the production cost. In through mold system, each cavity needs an ejector pin, which however makes it difficult to place a support pillar. The present application provides a manufacturing method of a semiconductor device by filling, while sandwiching a leadframe between mold dies having a matrix-state cavity group in which cavity columns obtained by linking mold cavities in series via a through gate have been placed in rows, a sealing resin in the cavities. In this method, the matrix-state cavity group has, at the cavity corner portions thereof, a support pillar having a cross-section striding over all the cavities adjacent to the cavity corner portions when viewed planarly.Type: ApplicationFiled: June 15, 2011Publication date: January 12, 2012Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Bunshi KURATOMI, Fukumi SHIMIZU
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Publication number: 20100233857Abstract: A method of fabricating a semiconductor integrated circuit device uses a mold which is provided with a plurality of air vents and movable pins which are formed such that the movable pins include grooves in the distal ends thereof which project into the air vents. By clamping the mold in a state such that the distal ends of the movable pins are pushed against a multi-cavity board at the time of clamping the mold, resin can be filled while leaking air inside the cavity through the grooves formed in the distal ends of the movable pins by setting the depths of the respective air vents to a fixed value irrespective of the irregularities in thickness of the multi-cavity boards. Accordingly, it is possible to prevent insufficient filling of resin in the cavity, the leaking of resin or defective welding, whereby the yield rate of products can be enhanced.Type: ApplicationFiled: March 22, 2010Publication date: September 16, 2010Inventors: Bunshi KURATOMI, Fukumi Shimizu
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Patent number: 7681308Abstract: A method of fabricating a semiconductor integrated circuit device uses a mold which is provided with a plurality of air vents and movable pins which are formed such that the movable pins include grooves in the distal ends thereof which project into the air vents. By clamping the mold in a state such that the distal ends of the movable pins are pushed against a multi-cavity board at the time of clamping the mold, resin can be filled while leaking air inside the cavity through the grooves formed in the distal ends of the movable pins by setting the depths of the respective air vents to a fixed value irrespective of the irregularities in thickness of the multi-cavity boards. Accordingly, it is possible to prevent insufficient filling of resin in the cavity, the leaking of resin or defective welding, whereby the yield rate of products can be enhanced.Type: GrantFiled: May 9, 2008Date of Patent: March 23, 2010Assignees: Renesas Eastern Japan Semiconductor, Inc., Renesas Technology CorporationInventors: Bunshi Kuratomi, Fukumi Shimizu
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Patent number: 7632720Abstract: In connection with a memory card of a block molding type there is provided a method able to prevent the occurrence of a chip crack in transfer molding. The method includes a first step wherein a substrate having plural chips constituting plural memory cards and mounted on a surface of the substrate and further having connecting terminals in recesses formed on a substrate surface opposite to the chips-mounted surface is sandwiched between a first die (upper die) installed on the chips-mounted surface side and a second die (lower die) installed on the surface side where the connecting terminal are formed. The method further includes a second step of injecting sealing resin between the first die and the substrate to seal at a time the plural chips mounted on the substrate. Projecting portions (terminal supporting elements) projecting from the surrounding portion are formed in regions of the second die which regions are positioned just under the connecting terminals.Type: GrantFiled: July 31, 2006Date of Patent: December 15, 2009Assignee: Renesas Technology Corp.Inventors: Bunshi Kuratomi, Fukumi Shimizu
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Publication number: 20090160084Abstract: A lead frame is equipped between an upper die with which a gate port and an air vent part are not formed in a cavity part 12a and a lower die in which a gate port 15f is formed in one place of a corner of a cavity part 15a and an air vent part is not formed. After decompressing the inside of the die formed of the cavity parts 12a and 15a by clamping the upper die and the lower die with the clamp pressure of intermediate pressure, mold resin is allowed to flow in the die. Residual air is exhausted while allowing mold resin to flow in the die formed of the cavity parts 12a and 15a by once clamping the upper die and the lower die with low-pressure clamp pressure. Then, the mold resin which filled up in the die formed of the cavity parts 12a and 15a is formed by clamping the upper die and the lower die with high-pressure clamp pressure.Type: ApplicationFiled: December 28, 2006Publication date: June 25, 2009Inventors: Bunshi Kuratomi, Fukumi Shimizu, Takafumi Nishita
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Publication number: 20090004779Abstract: A method of fabricating a semiconductor integrated circuit device uses a mold which is provided with a plurality of air vents and movable pins which are formed such that the movable pins include grooves in the distal ends thereof which project into the air vents. By clamping the mold in a state such that the distal ends of the movable pins are pushed against a multi-cavity board at the time of clamping the mold, resin can be filled while leaking air inside the cavity through the grooves formed in the distal ends of the movable pins by setting the depths of the respective air vents to a fixed value irrespective of the irregularities in thickness of the multi-cavity boards. Accordingly, it is possible to prevent insufficient filling of resin in the cavity, the leaking of resin or defective welding, whereby the yield rate of products can be enhanced.Type: ApplicationFiled: May 9, 2008Publication date: January 1, 2009Inventors: Bunshi Kuratomi, Fukumi Shimizu
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Patent number: 7445969Abstract: For molding semiconductor chips on a wiring substrate matrix with a sealing resin, the wiring substrate matrix is placed on a lower die cavity block of a lower die, and, thereafter, an upper die is brought down, whereby an outer peripheral portion of a cavity of the upper die comes into abutment against an outer peripheral portion of a main surface of the wiring substrate matrix, causing the substrate matrix to be deformed a sufficient extent to prevent resin leakage. Thereafter, block pins provided on the upper die push down the lower die cavity block. Thus, when clamping the wiring substrate matrix using both upper and lower dies, it is possible to suppress or prevent the application of excessive pressure to the wiring substrate matrix and to suppress or prevent deformation or cracking caused by crushing of the wiring substrate matrix. Consequently, the semiconductor device manufacturing yield can be improved.Type: GrantFiled: October 29, 2007Date of Patent: November 4, 2008Assignee: Renesas Technology Corp.Inventors: Bunshi Kuratomi, Takafumi Nishita, Fukumi Shimizu
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Publication number: 20080173995Abstract: There is a need to provide a large capacity memory card for a portable communication device. A memory card 1 includes: a wiring board 2 mainly composed of a glass epoxy resin; multiple semiconductor chips (3C and 3F) mounted on a main surface of the memory card 1; and a mold resin 4 for encapsulating the wiring board 2 and the semiconductor chips (3C and 3F). The mold resin 4 is made of a thermosetting epoxy resin containing quartz filler. A back surface of the wiring board 2 is not covered with the mold resin 4 and is exposed to a back surface of the memory card 1. The back surface of the wiring board 2 is used to form multiple external connection terminals 7 electrically connected to the semiconductor chips (3C and 3F) . When the memory card 1 is attached to a card slot of a mobile phone, the external connection terminals 7 contact with a connector terminal contained in the card slot. This makes it possible to exchange signals between the memory card 1 and the mobile phone or to supply the power.Type: ApplicationFiled: September 12, 2007Publication date: July 24, 2008Inventors: Bunshi Kuratomi, Fukumi Shimizu, Michiaki Sugiyama, Atsushi Fujishima, Tamaki Wada
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Patent number: 7377031Abstract: A method of fabricating a semiconductor integrated circuit device uses a mold which is provided with a plurality of air vents and movable pins which are formed such that the movable pins include grooves in the distal ends thereof which project into the air vents. By clamping the mold in a state such that the distal ends of the movable pins are pushed against a multi-cavity board at the time of clamping the mold, resin can be filled while leaking air inside the cavity through the grooves formed in the distal ends of the movable pins by setting the depths of the respective air vents to a fixed value irrespective of the irregularities in thickness of the multi-cavity boards. Accordingly, it is possible to prevent insufficient filling of resin in the cavity, the leaking of resin or defective welding, whereby the yield rate of products can be enhanced.Type: GrantFiled: December 30, 2005Date of Patent: May 27, 2008Assignees: Renesas Technology Corp., Renesas Eastern Japan Semiconductor, Inc.Inventors: Bunshi Kuratomi, Fukumi Shimizu
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Publication number: 20080057626Abstract: For molding semiconductor chips on a wiring substrate matrix with a sealing resin, the wiring substrate matrix is placed on a lower die cavity block of a lower die, and, thereafter, an upper die is brought down, whereby an outer peripheral portion of a cavity of the upper die comes into abutment against an outer peripheral portion of a main surface of the wiring substrate matrix, causing the substrate matrix to be deformed a sufficient extent to prevent resin leakage. Thereafter, block pins provided on the upper die push down the lower die cavity block. Thus, when clamping the wiring substrate matrix using both upper and lower dies, it is possible to suppress or prevent the application of excessive pressure to the wiring substrate matrix and to suppress or prevent deformation or cracking caused by crushing of the wiring substrate matrix. Consequently, the semiconductor device manufacturing yield can be improved.Type: ApplicationFiled: October 29, 2007Publication date: March 6, 2008Inventors: Bunshi KURATOMI, Takafumi Nishita, Fukumi Shimizu
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Publication number: 20080020510Abstract: A technique able to effect automation of a molding process corresponding to a multifarious small lot semiconductor device manufacturing process is provided. As to a frame supply unit, a lead frame conveying unit and molding press sets, which are each operated by a motor within a molding apparatus, the amount of operation of the motor is controlled in accordance with preset data so as to give an amount of operation matching the size of a lead frame. When the type of the lead frame changes, the data concerned is read and the amount of the operation of the motor is switched automatically.Type: ApplicationFiled: July 18, 2007Publication date: January 24, 2008Inventors: Bunshi Kuratomi, Fukumi Shimizu, Yoichi Kawata