Patents by Inventor Fumie KIKUSHIMA

Fumie KIKUSHIMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230180479
    Abstract: A semiconductor memory device includes a substrate, a plurality of first conductive layers, a second conductive layer, a first pillar, and a second pillar. The plurality of first conductive layers are stacked over the substrate in a first direction. The second conductive layer is disposed over the plurality of first conductive layers. The first pillar extends inside the plurality of first conductive layers in the first direction. The first pillar includes a first semiconductor portion including a first semiconductor of single-crystal. The second pillar extends inside the second conductive layer in the first direction. The second pillar includes an insulating portion serving as an axis including an insulator and a second semiconductor portion which is disposed on an outer circumference of the insulating portion in view of the first direction. The second semiconductor portion is in contact with the first semiconductor portion and includes a second semiconductor of poly-crystal.
    Type: Application
    Filed: January 26, 2023
    Publication date: June 8, 2023
    Applicant: KIOXIA CORPORATION
    Inventor: Fumie KIKUSHIMA
  • Patent number: 11594545
    Abstract: A semiconductor memory device includes a substrate, a plurality of first conductive layers, a second conductive layer, a first pillar, and a second pillar. The plurality of first conductive layers are stacked over the substrate in a first direction. The second conductive layer is disposed over the plurality of first conductive layers. The first pillar extends inside the plurality of first conductive layers in the first direction. The first pillar includes a first semiconductor portion including a first semiconductor of single-crystal. The second pillar extends inside the second conductive layer in the first direction. The second pillar includes an insulating portion serving as an axis including an insulator and a second semiconductor portion which is disposed on an outer circumference of the insulating portion in view of the first direction. The second semiconductor portion is in contact with the first semiconductor portion and includes a second semiconductor of poly-crystal.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: February 28, 2023
    Assignee: Kioxia Corporation
    Inventor: Fumie Kikushima
  • Publication number: 20220115403
    Abstract: A semiconductor memory device includes a plurality of electrode layers stacked above a first semiconductor layer, a second semiconductor layer and a first film. The second semiconductor layer extends through the plurality of electrode layers in a stacking direction of the plurality of electrode layers. The second semiconductor layer includes an end portion inside the first semiconductor layer. The first film is positioned inside the first semiconductor layer and contacts the first semiconductor layer. The first semiconductor layer includes a first portion, a second portion, and a third portion. The first film is positioned between the first portion and the second portion. The third portion links the first portion and the second portion. The third portion is positioned between the first film and the second semiconductor layer. The second semiconductor layer includes a contact portion contacting the third portion of the first semiconductor layer.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Takayuki MARUYAMA, Yoshiaki FUKUZUMI, Yuki SUGIURA, Shinya ARAI, Fumie KIKUSHIMA, Keisuke SUDA, Takashi ISHIDA
  • Publication number: 20210091094
    Abstract: A semiconductor memory device includes a substrate, a plurality of first conductive layers, a second conductive layer, a first pillar, and a second pillar. The plurality of first conductive layers are stacked over the substrate in a first direction. The second conductive layer is disposed over the plurality of first conductive layers. The first pillar extends inside the plurality of first conductive layers in the first direction. The first pillar includes a first semiconductor portion including a first semiconductor of single-crystal. The second pillar extends inside the second conductive layer in the first direction. The second pillar includes an insulating portion serving as an axis including an insulator and a second semiconductor portion which is disposed on an outer circumference of the insulating portion in view of the first direction. The second semiconductor portion is in contact with the first semiconductor portion and includes a second semiconductor of poly-crystal.
    Type: Application
    Filed: August 7, 2020
    Publication date: March 25, 2021
    Applicant: Kioxia Corporation
    Inventor: Fumie KIKUSHIMA
  • Patent number: 10910392
    Abstract: A semiconductor device according to an embodiment includes two semiconductor pillars, a connection member connected between the two semiconductor pillars, and a contact connected to the connection member. There is not a conductive member disposed between the two semiconductor pillars.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: February 2, 2021
    Assignee: Toshiba Memory Corporation
    Inventors: Mikiko Mori, Ryota Suzuki, Tatsuya Kato, Wataru Sakamoto, Fumie Kikushima
  • Publication number: 20200051991
    Abstract: A semiconductor device according to an embodiment includes two semiconductor pillars, a connection member connected between the two semiconductor pillars, and a contact connected to the connection member. There is not a conductive member disposed between the two semiconductor pillars.
    Type: Application
    Filed: October 16, 2019
    Publication date: February 13, 2020
    Applicant: Toshiba Memory Corporation
    Inventors: Mikiko Mori, Ryota Suzuki, Tatsuya Kato, Wataru Sakamoto, Fumie Kikushima
  • Patent number: 10497709
    Abstract: A semiconductor device according to an embodiment includes two semiconductor pillars, a connection member connected between the two semiconductor pillars, and a contact connected to the connection member. There is not a conductive member disposed between the two semiconductor pillars.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: December 3, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Mikiko Mori, Ryota Suzuki, Tatsuya Kato, Wataru Sakamoto, Fumie Kikushima
  • Publication number: 20190355742
    Abstract: A semiconductor memory device includes a plurality of electrode layers stacked above a first semiconductor layer, a second semiconductor layer and a first film. The second semiconductor layer extends through the plurality of electrode layers in a stacking direction of the plurality of electrode layers. The second semiconductor layer includes an end portion inside the first semiconductor layer. The first film is positioned inside the first semiconductor layer and contacts the first semiconductor layer. The first semiconductor layer includes a first portion, a second portion, and a third portion. The first film is positioned between the first portion and the second portion. The third portion links the first portion and the second portion. The third portion is positioned between the first film and the second semiconductor layer. The second semiconductor layer includes a contact portion contacting the third portion of the first semiconductor layer.
    Type: Application
    Filed: March 8, 2019
    Publication date: November 21, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Takayuki MARUYAMA, Yoshiaki Fukuzumi, Yuki Sugiura, Shinya Arai, Fumie Kikushima, Keisuke Suda, Takashi Ishida
  • Publication number: 20180323204
    Abstract: A semiconductor device according to an embodiment includes two semiconductor pillars, a connection member connected between the two semiconductor pillars, and a contact connected to the connection member. There is not a conductive member disposed between the two semiconductor pillars.
    Type: Application
    Filed: June 26, 2018
    Publication date: November 8, 2018
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Mikiko MORI, Ryota Suzuki, Tatsuya Kato, Wataru Sakamoto, Fumie Kikushima
  • Patent number: 10056400
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor substrate, a stacked body, and a first insulating film. The stacked body is provided on the semiconductor substrate. The stacked body includes first films, and second films being conductive. The first films and the second films are stacked alternately. The first insulating film extends in a stacking direction of the stacked body. The second films include a first portion and a second portion. The first portion is positioned between the first films. The second portion has a surface contacting the first insulating film in a direction perpendicular to the stacking direction.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: August 21, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Fumie Kikushima, Keisuke Kikutani
  • Patent number: 10043815
    Abstract: A semiconductor device according to an embodiment includes two semiconductor pillars, a connection member connected between the two semiconductor pillars, and a contact connected to the connection member. There is not a conductive member disposed between the two semiconductor pillars.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: August 7, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Mikiko Mori, Ryota Suzuki, Tatsuya Kato, Wataru Sakamoto, Fumie Kikushima
  • Publication number: 20170345837
    Abstract: A semiconductor device according to an embodiment includes two semiconductor pillars, a connection member connected between the two semiconductor pillars, and a contact connected to the connection member. There is not a conductive member disposed between the two semiconductor pillars.
    Type: Application
    Filed: August 10, 2017
    Publication date: November 30, 2017
    Applicant: Toshiba Memory Corporation
    Inventors: Mikiko Mori, Ryota Suzuki, Tatsuya Kato, Wataru Sakamoto, Fumie Kikushima
  • Patent number: 9761600
    Abstract: A semiconductor device according to an embodiment includes two semiconductor pillars, a connection member connected between the two semiconductor pillars, and a contact connected to the connection member. There is not a conductive member disposed between the two semiconductor pillars.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: September 12, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mikiko Mori, Ryota Suzuki, Tatsuya Kato, Wataru Sakamoto, Fumie Kikushima
  • Publication number: 20170069644
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor substrate, a stacked body, and a first insulating film. The stacked body is provided on the semiconductor substrate. The stacked body includes first films, and second films being conductive. The first films and the second films are stacked alternately. The first insulating film extends in a stacking direction of the stacked body. The second films include a first portion and a second portion. The first portion is positioned between the first films. The second portion has a surface contacting the first insulating film in a direction perpendicular to the stacking direction.
    Type: Application
    Filed: March 3, 2016
    Publication date: March 9, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Fumie KIKUSHIMA, Keisuke KlKUTANI
  • Publication number: 20170005107
    Abstract: A semiconductor device according to an embodiment includes two semiconductor pillars, a connection member connected between the two semiconductor pillars, and a contact connected to the connection member. There is not a conductive member disposed between the two semiconductor pillars.
    Type: Application
    Filed: September 19, 2016
    Publication date: January 5, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Mikiko MORI, Ryota SUZUKI, Tatsuya KATO, Wataru SAKAMOTO, Fumie KIKUSHIMA
  • Patent number: 9478556
    Abstract: A semiconductor device according to an embodiment includes two semiconductor pillars, a connection member connected between the two semiconductor pillars, and a contact connected to the connection member. There is not a conductive member disposed between the two semiconductor pillars.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: October 25, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mikiko Mori, Ryota Suzuki, Tatsuya Kato, Wataru Sakamoto, Fumie Kikushima
  • Patent number: 9293547
    Abstract: According to one embodiment, a part of a buried insulating film buried in a trench is removed; accordingly, an air gap is formed between adjacent floating gate electrodes in a word line direction, and the air gap is formed continuously along the trench in a manner of sinking below a control gate electrode.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: March 22, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Fumitaka Arai, Wataru Sakamoto, Fumie Kikushima, Hiroyuki Nitta
  • Publication number: 20160079253
    Abstract: A semiconductor device according to an embodiment includes two semiconductor pillars, a connection member connected between the two semiconductor pillars, and a contact connected to the connection member. There is not a conductive member disposed between the two semiconductor pillars.
    Type: Application
    Filed: March 11, 2015
    Publication date: March 17, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Mikiko MORI, Ryota SUZUKI, Tatsuya KATO, Wataru SAKAMOTO, Fumie KIKUSHIMA
  • Patent number: 9257443
    Abstract: According to an embodiment, a semiconductor memory device includes a semiconductor pillar, a first electrode film, a second electrode film, a first insulating film, a second insulating film, and a wiring film. The semiconductor member is extending in a first direction. The first electrode film is disposed at the lateral side of the semiconductor member away from the semiconductor member. The second electrode film is provided between the semiconductor member and the first electrode film. The first insulating film is provided between the semiconductor member and the second electrode film. The second insulating film is provided between the second electrode film and the first electrode film. The wiring film is disposed in a wiring lead-out region adjacent to the memory cell region. And the first electrode film is formed of a material different from a material of the wiring film, and being electrically connected to the wiring film.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: February 9, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Fumie Kikushima, Tatsuya Kato, Wataru Sakamoto, Fumitaka Arai
  • Patent number: 8981522
    Abstract: A nonvolatile semiconductor storage device includes a substrate; an isolation film extending in a first direction and dividing the substrate into element regions; a cell string including memory cells in the element regions; a cell unit including the cell string and a select transistor on first directional ends of the cell string; diffusion layers formed in a portion of the element region first directionally beside the select gate electrode, the diffusion layers being adjacent to one another in a second direction intersecting with the first direction; and contacts extending through an interlayer insulating film and contacting the diffusion layers. An upper surface of the isolation film located between the diffusion layers is lower than an upper surface of the substrate. A laminate of silicon oxide film and a silicon nitride film are located above the upper surface of the isolation film and below the upper surface of the substrate.
    Type: Grant
    Filed: August 27, 2013
    Date of Patent: March 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenichi Fujii, Akira Yotsumoto, Takaya Yamanaka, Fumie Kikushima