Patents by Inventor Fumihiko Koga

Fumihiko Koga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160268322
    Abstract: There is provided a solid state imaging device including a pixel including a photoelectric conversion unit that generates and accumulates a charge according to a received light amount, a charge accumulation unit that accumulates the generated charge, a first transfer transistor that transfers the charge of the photoelectric conversion unit to the charge accumulation unit, a charge holding unit that holds the charge to read out as a signal, and a second transfer transistor that transfers the charge of the charge accumulation unit to the charge holding unit, in which a gate electrode of the first transfer transistor is formed to be buried up to a predetermined depth from a semiconductor substrate interface, and the charge accumulation unit is formed in a longitudinally long shape to be extended in a depth direction along a side wall of the gate electrode of the first transfer transistor to be buried therein.
    Type: Application
    Filed: October 14, 2014
    Publication date: September 15, 2016
    Applicant: SONY CORPORATION
    Inventors: Taiichiro WATANABE, Fumihiko KOGA
  • Publication number: 20160247848
    Abstract: There is provided a solid-state image pickup device including: a semiconductor substrate (21); a photodiode (11A, 11B) formed in the semiconductor substrate; a transistor (10) having a gate electrode (14) part or all of which is embedded in the semiconductor substrate, the transistor being configured to read a signal electric charge from the photodiode via the gate electrode; and an electric charge transfer layer (13) provided between the gate electrode and the photodiode.
    Type: Application
    Filed: March 31, 2016
    Publication date: August 25, 2016
    Inventors: Ryosuke NAKAMURA, Fumihiko KOGA, Taiichiro WATANABE
  • Publication number: 20160204159
    Abstract: Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.
    Type: Application
    Filed: March 24, 2016
    Publication date: July 14, 2016
    Applicant: Sony Corporation
    Inventors: Toshifumi Wakano, Fumihiko Koga
  • Publication number: 20160197109
    Abstract: Disclosed is a solid-state imaging device which includes a pixel section, a peripheral circuit section, a first isolation region formed with a STI structure on a semiconductor substrate in the peripheral circuit section, and a second isolation region formed with the STI structure on the semiconductor substrate in the pixel section. The portion of the second isolation region buried into the semiconductor substrate is shallower than the portion buried into the semiconductor substrate of the first isolation region, and the height of the upper face of the second isolation region is equal to that of the first isolation region. A method of producing the solid-state imaging device and an electronic device provided with the solid-state imaging devices are also disclosed.
    Type: Application
    Filed: March 17, 2016
    Publication date: July 7, 2016
    Inventors: Keiji Tatani, Takuji Matsumoto, Yasushi Tateshita, Fumihiko Koga, Takashi Nagano, Takahiro Toyoshima, Tetsuji Yamaguchi, Keiichi Nakazawa, Naoyuki Miyashita, Yoshihiko Nagahama
  • Patent number: 9344662
    Abstract: Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: May 17, 2016
    Assignee: Sony Corporation
    Inventors: Toshifumi Wakano, Fumihiko Koga
  • Patent number: 9312291
    Abstract: A solid-state imaging device includes a first-conductivity-type semiconductor well region, a plurality of pixels each of which is formed on the semiconductor well region and is composed of a photoelectric conversion portion and a pixel transistor, an element isolation region provided between the pixels and in the pixels, and an element isolation region being free from an insulation film and being provided between desired pixel transistors.
    Type: Grant
    Filed: September 16, 2014
    Date of Patent: April 12, 2016
    Assignee: Sony Corporation
    Inventors: Keiji Tatani, Fumihiko Koga, Takashi Nagano
  • Publication number: 20160093653
    Abstract: A solid-state imaging device includes a first-conductivity-type semiconductor well region, a plurality of pixels each of which is formed on the semiconductor well region and is composed of a photoelectric conversion portion and a pixel transistor, an element isolation region provided between the pixels and in the pixels, and an element isolation region being free from an insulation film and being provided between desired pixel transistors.
    Type: Application
    Filed: December 8, 2015
    Publication date: March 31, 2016
    Applicant: Sony Corporation
    Inventors: Keiji Tatani, Fumihiko Koga, Takashi Nagano
  • Publication number: 20160093659
    Abstract: There is provided a solid-state image pickup device including: a semiconductor substrate (21); a photodiode (11A, 11B) formed in the semiconductor substrate; a transistor (10) having a gate electrode (14) part or all of which is embedded in the semiconductor substrate, the transistor being configured to read a signal electric charge from the photodiode via the gate electrode; and an electric charge transfer layer (13) provided between the gate electrode and the photodiode.
    Type: Application
    Filed: May 9, 2014
    Publication date: March 31, 2016
    Inventors: Ryosuke NAKAMURA, Fumihiko KOGA, Taiichiro WATANABE
  • Publication number: 20160065875
    Abstract: Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.
    Type: Application
    Filed: November 6, 2015
    Publication date: March 3, 2016
    Applicant: Sony Corporation
    Inventors: Toshifumi Wakano, Fumihiko Koga
  • Publication number: 20150326807
    Abstract: Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.
    Type: Application
    Filed: April 17, 2015
    Publication date: November 12, 2015
    Inventors: Toshifumi Wakano, Fumihiko Koga
  • Patent number: 9049393
    Abstract: Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: June 2, 2015
    Assignee: SONY CORPORATION
    Inventors: Toshifumi Wakano, Fumihiko Koga
  • Publication number: 20150041871
    Abstract: A solid-state imaging device is provided, which includes a photodiode having a first conductivity type semiconductor area that is dividedly formed for each pixel; a first conductivity type transfer gate electrode formed on the semiconductor substrate via a gate insulating layer in an area neighboring the photodiode, and transmitting signal charges generated and accumulated in the photodiode; a signal reading unit reading a voltage which corresponds to the signal charge or the signal charge; and an inversion layer induction electrode formed on the semiconductor substrate via the gate insulating layer in an area covering a portion or the whole of the photodiode, and composed of a conductor or a semiconductor having a work function. An inversion layer is induced, which is formed by accumulating a second conductivity type carrier on a surface of the inversion layer induction electrode side of the semiconductor area through the inversion layer induction electrode.
    Type: Application
    Filed: September 22, 2014
    Publication date: February 12, 2015
    Inventors: Yorito Sakano, Takashi Abe, Keiji Mabuchi, Ryoji Suzuki, Hiroyuki Mori, Yoshiharu Kudoh, Fumihiko Koga, Takeshi Yanagita, Kazunobu Ota
  • Publication number: 20150009384
    Abstract: Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.
    Type: Application
    Filed: September 24, 2014
    Publication date: January 8, 2015
    Inventors: Toshifumi Wakano, Fumihiko Koga
  • Publication number: 20150001600
    Abstract: A solid-state imaging device includes a first-conductivity-type semiconductor well region, a plurality of pixels each of which is formed on the semiconductor well region and is composed of a photoelectric conversion portion and a pixel transistor, an element isolation region provided between the pixels and in the pixels, and an element isolation region being free from an insulation film and being provided between desired pixel transistors.
    Type: Application
    Filed: September 16, 2014
    Publication date: January 1, 2015
    Inventors: Keiji Tatani, Fumihiko Koga, Takashi Nagano
  • Patent number: 8885083
    Abstract: Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.
    Type: Grant
    Filed: January 6, 2014
    Date of Patent: November 11, 2014
    Assignee: Sony Corporation
    Inventors: Toshifumi Wakano, Fumihiko Koga
  • Publication number: 20140327052
    Abstract: Disclosed is a solid-state imaging device which includes a pixel section, a peripheral circuit section, a first isolation region formed with a STI structure on a semiconductor substrate in the peripheral circuit section, and a second isolation region formed with the STI structure on the semiconductor substrate in the pixel section. The portion of the second isolation region buried into the semiconductor substrate is shallower than the portion buried into the semiconductor substrate of the first isolation region, and the height of the upper face of the second isolation region is equal to that of the first isolation region. A method of producing the solid-state imaging device and an electronic device provided with the solid-state imaging devices are also disclosed.
    Type: Application
    Filed: April 3, 2014
    Publication date: November 6, 2014
    Applicant: Sony Corporation
    Inventors: Keiji Tatani, Takuji Matsumoto, Yasushi Tateshita, Fumihiko Koga, Takashi Nagano, Takahiro Toyoshima, Tetsuji Yamaguchi, Keiichi Nakazawa, Naoyuki Miyashita, Yoshihiko Nagahama
  • Patent number: 8872953
    Abstract: A solid-state imaging device is provided, which includes a photodiode having a first conductivity type semiconductor area that is dividedly formed for each pixel; a first conductivity type transfer gate electrode formed on the semiconductor substrate via a gate insulating layer in an area neighboring the photodiode, and transmitting signal charges generated and accumulated in the photodiode; a signal reading unit reading a voltage which corresponds to the signal charge or the signal charge; and an inversion layer induction electrode formed on the semiconductor substrate via the gate insulating layer in an area covering a portion or the whole of the photodiode, and composed of a conductor or a semiconductor having a work function. An inversion layer is induced, which is formed by accumulating a second conductivity type carrier on a surface of the inversion layer induction electrode side of the semiconductor area through the inversion layer induction electrode.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: October 28, 2014
    Assignee: Sony Corporation
    Inventors: Yorito Sakano, Takashi Abe, Keiji Mabuchi, Ryoji Suzuki, Hiroyuki Mori, Yoshiharu Kudoh, Fumihiko Koga, Takeshi Yanagita, Kazunobu Ota
  • Patent number: 8860099
    Abstract: A solid-state imaging device includes a first-conductivity-type semiconductor well region, a plurality of pixels each of which is formed on the semiconductor well region and is composed of a photoelectric conversion portion and a pixel transistor, an element isolation region provided between the pixels and in the pixels, and an element isolation region being free from an insulation film and being provided between desired pixel transistors.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: October 14, 2014
    Assignee: Sony Corporation
    Inventors: Keiji Tatani, Fumihiko Koga, Takashi Nagano
  • Patent number: 8823069
    Abstract: A solid-state imaging device that includes: a pixel array section configured by an array of a unit pixel, including an optoelectronic conversion section that subjects an incoming light to optoelectronic conversion and stores therein a signal charge, a transfer transistor that transfers the signal charge stored in the optoelectronic conversion section, a charge-voltage conversion section that converts the signal charge provided by the transfer transistor into a signal voltage, and a reset transistor that resets a potential of the charge-voltage conversion section; and voltage setting means for setting a voltage of a well of the charge-voltage conversion section to be negative.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: September 2, 2014
    Assignee: Sony Corporation
    Inventor: Fumihiko Koga
  • Patent number: 8728852
    Abstract: A solid-state imaging device which includes a pixel section, a peripheral circuit section, a first isolation region formed with a STI structure on a semiconductor substrate in the peripheral circuit section, and a second isolation region formed with the STI structure on the semiconductor substrate in the pixel section. The portion of the second isolation region buried into the semiconductor substrate is shallower than the portion buried into the semiconductor substrate of the first isolation region, and the height of the upper face of the second isolation region is equal to that of the first isolation region. A method of producing the solid-state imaging device and an electronic device provided with the solid-state imaging devices are also disclosed.
    Type: Grant
    Filed: July 8, 2011
    Date of Patent: May 20, 2014
    Assignee: Sony Corporation
    Inventors: Keiji Tatani, Takuji Matsumoto, Yasushi Tateshita, Fumihiko Koga, Takashi Nagano, Takahiro Toyoshima, Tetsuji Yamaguchi, Keiichi Nakazawa, Naoyuki Miyashita, Yoshihiko Nagahama