Patents by Inventor Fumihiko Koga

Fumihiko Koga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140118593
    Abstract: Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.
    Type: Application
    Filed: January 6, 2014
    Publication date: May 1, 2014
    Applicant: Sony Corporation
    Inventors: Toshifumi Wakano, Fumihiko Koga
  • Patent number: 8659688
    Abstract: Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: February 25, 2014
    Assignee: Sony Corporation
    Inventors: Toshifumi Wakano, Fumihiko Koga
  • Patent number: 8604408
    Abstract: A solid-state imaging device includes: a pixel having a photodiode and a pixel transistor; a first isolation region using a semiconductor region containing impurities formed between neighboring photodiodes; and a second isolation region using an semiconductor region containing impurities formed between the photodiode and the pixel transistor, wherein an impurity concentration of the first isolation region is different from an impurity concentration of the second isolation region.
    Type: Grant
    Filed: November 11, 2010
    Date of Patent: December 10, 2013
    Assignee: Sony Corporation
    Inventors: Takeshi Yanagita, Fumihiko Koga, Toshifumi Wakano, Takashi Nagano
  • Patent number: 8431880
    Abstract: A solid-state imaging device includes a semiconductor substrate including a pixel portion having a photoelectric conversion portion and a peripheral circuit portion; a first sidewall composed of a sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the pixel portion; a second sidewall composed of the sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the peripheral circuit portion; a first silicide blocking film composed of the sidewall film and disposed on the photoelectric conversion portion and a part of the MOS transistors in the pixel portion; and a second silicide blocking film disposed on the MOS transistors in the pixel portion so as to overlap with a part of the first silicide blocking film, wherein the MOS transistors in the pixel portion are covered with the first and second silicide blocking films.
    Type: Grant
    Filed: January 12, 2012
    Date of Patent: April 30, 2013
    Assignee: Sony Corporation
    Inventors: Takuji Matsumoto, Tetsuji Yamaguchi, Keiji Tatani, Yutaka Nishimura, Kazuichiro Itonaga, Hiroyuki Mori, Norihiro Kubo, Fumihiko Koga, Shinichiro Izawa, Susumu Ooki
  • Patent number: 8368161
    Abstract: A solid-state image capturing device includes, in a semiconductor substrate, a photoelectric conversion section which performs photoelectric conversion on incident light to obtain signal charges; a pixel transistor section which outputs the signal charges generated in the photoelectric conversion section; a peripheral circuit section which is formed in the periphery of a pixel section including the photoelectric conversion section and the pixel transistor section; and isolation areas which electrically separate the photoelectric conversion section, the pixel transistor section, and the peripheral circuit section from each other. The isolation areas in the periphery of the pixel transistor section each have an insulating section formed higher than a surface of the semiconductor substrate. A first gate electrode of a transistor of the pixel transistor section is formed between the insulating sections and on the semiconductor substrate with a gate insulating film interposed therebetween.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: February 5, 2013
    Assignee: Sony Corporation
    Inventors: Fumihiko Koga, Yoshiharu Kudoh
  • Publication number: 20120235022
    Abstract: A solid-state imaging device that includes: a pixel array section configured by an array of a unit pixel, including an optoelectronic conversion section that subjects an incoming light to optoelectronic conversion and stores therein a signal charge, a transfer transistor that transfers the signal charge stored in the optoelectronic conversion section, a charge-voltage conversion section that converts the signal charge provided by the transfer transistor into a signal voltage, and a reset transistor that resets a potential of the charge-voltage conversion section; and voltage setting means for setting a voltage of a well of the charge-voltage conversion section to be negative.
    Type: Application
    Filed: May 25, 2012
    Publication date: September 20, 2012
    Applicant: SONY CORPORATION
    Inventor: Fumihiko KOGA
  • Patent number: 8188519
    Abstract: A solid-state imaging device that includes: a pixel array section configured by an array of a unit pixel, including an optoelectronic conversion section that subjects an incoming light to optoelectronic conversion and stores therein a signal charge, a transfer transistor that transfers the signal charge stored in the optoelectronic conversion section, a charge-voltage conversion section that converts the signal charge provided by the transfer transistor into a signal voltage, and a reset transistor that resets a potential of the charge-voltage conversion section; and voltage setting means for setting a voltage of a well of the charge-voltage conversion section to be negative.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: May 29, 2012
    Assignee: Sony Corporation
    Inventor: Fumihiko Koga
  • Publication number: 20120104479
    Abstract: A solid-state imaging device includes a semiconductor substrate including a pixel portion having a photoelectric conversion portion and a peripheral circuit portion; a first sidewall composed of a sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the pixel portion; a second sidewall composed of the sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the peripheral circuit portion; a first silicide blocking film composed of the sidewall film and disposed on the photoelectric conversion portion and a part of the MOS transistors in the pixel portion; and a second silicide blocking film disposed on the MOS transistors in the pixel portion so as to overlap with a part of the first silicide blocking film, wherein the MOS transistors in the pixel portion are covered with the first and second silicide blocking films.
    Type: Application
    Filed: January 12, 2012
    Publication date: May 3, 2012
    Applicant: SONY CORPORATION
    Inventors: Takuji Matsumoto, Tetsuji Yamaguchi, Keiji Tatani, Yutaka Nishimura, Kazuichiro Itonaga, Hiroyuki Mori, Norihiro Kubo, Fumihiko Koga, Shinichiro Izawa, Susumu Ooki
  • Patent number: 8115154
    Abstract: A solid-state imaging device includes a semiconductor substrate including a pixel portion having a photoelectric conversion portion and a peripheral circuit portion; a first sidewall composed of a sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the pixel portion; a second sidewall composed of the sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the peripheral circuit portion; a first silicide blocking film composed of the sidewall film and disposed on the photoelectric conversion portion and a part of the MOS transistors in the pixel portion; and a second silicide blocking film disposed on the MOS transistors in the pixel portion so as to overlap with a part of the first silicide blocking film, wherein the MOS transistors in the pixel portion are covered with the first and second silicide blocking films.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: February 14, 2012
    Assignee: Sony Corporation
    Inventors: Takuji Matsumoto, Tetsuji Yamaguchi, Keiji Tatani, Yutaka Nishimura, Kazuichiro Itonaga, Hiroyuki Mori, Norihiro Kubo, Fumihiko Koga, Shinichiro Izawa, Susumu Ooki
  • Publication number: 20110269259
    Abstract: A solid-state imaging device which includes a pixel section, a peripheral circuit section, a first isolation region formed with a STI structure on a semiconductor substrate in the peripheral circuit section, and a second isolation region formed with the STI structure on the semiconductor substrate in the pixel section. The portion of the second isolation region buried into the semiconductor substrate is shallower than the portion buried into the semiconductor substrate of the first isolation region, and the height of the upper face of the second isolation region is equal to that of the first isolation region. A method of producing the solid-state imaging device and an electronic device provided with the solid-state imaging devices are also disclosed.
    Type: Application
    Filed: July 8, 2011
    Publication date: November 3, 2011
    Applicant: SONY CORPORATION
    Inventors: Keiji Tatani, Takuji Matsumoto, Yasushi Tateshita, Fumihiko Koga, Takashi Nagano, Takahiro Toyoshima, Tetsuji Yamaguchi, Keiichi Nakazawa, Naoyuki Miyashita, Yoshihiko Nagahama
  • Publication number: 20110128400
    Abstract: Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.
    Type: Application
    Filed: November 12, 2010
    Publication date: June 2, 2011
    Applicant: SONY CORPORATION
    Inventors: Toshifumi Wakano, Fumihiko Koga
  • Publication number: 20110127408
    Abstract: A solid-state imaging device includes: a pixel having a photodiode and a pixel transistor; a first isolation region using a semiconductor region containing impurities formed between neighboring photodiodes; and a second isolation region using an semiconductor region containing impurities formed between the photodiode and the pixel transistor, wherein an impurity concentration of the first isolation region is different from an impurity concentration of the second isolation region.
    Type: Application
    Filed: November 11, 2010
    Publication date: June 2, 2011
    Applicant: SONY CORPORATION
    Inventors: Takeshi Yanagita, Fumihiko Koga, Toshifumi Wakano, Takashi Nagano
  • Publication number: 20110102620
    Abstract: A solid-state imaging device is provided, which includes a photodiode having a first conductivity type semiconductor area that is dividedly formed for each pixel; a first conductivity type transfer gate electrode formed on the semiconductor substrate via a gate insulating layer in an area neighboring the photodiode, and transmitting signal charges generated and accumulated in the photodiode; a signal reading unit reading a voltage which corresponds to the signal charge or the signal charge; and an inversion layer induction electrode formed on the semiconductor substrate via the gate insulating layer in an area covering a portion or the whole of the photodiode, and composed of a conductor or a semiconductor having a work function. An inversion layer is induced, which is formed by accumulating a second conductivity type carrier on a surface of the inversion layer induction electrode side of the semiconductor area through the inversion layer induction electrode.
    Type: Application
    Filed: October 22, 2010
    Publication date: May 5, 2011
    Applicant: SONY CORPORATION
    Inventors: Yorito Sakano, Takashi Abe, Keiji Mabuchi, Ryoji Suzuki, Hiroyuki Mori, Yoshiharu Kudoh, Fumihiko Koga, Takeshi Yanagita, Kazunobu Ota
  • Publication number: 20110073923
    Abstract: A solid-state imaging device includes a first-conductivity-type semiconductor well region, a plurality of pixels each of which is formed on the semiconductor well region and is composed of a photoelectric conversion portion and a pixel transistor, an element isolation region provided between the pixels and in the pixels, and an element isolation region being free from an insulation film and being provided between desired pixel transistors.
    Type: Application
    Filed: September 14, 2010
    Publication date: March 31, 2011
    Applicant: SONY CORPORATION
    Inventors: Keiji Tatani, Fumihiko Koga, Takashi Nagano
  • Publication number: 20100225775
    Abstract: A solid-state image capturing device includes, in a semiconductor substrate, a photoelectric conversion section which performs photoelectric conversion on incident light to obtain signal charges; a pixel transistor section which outputs the signal charges generated in the photoelectric conversion section; a peripheral circuit section which is formed in the periphery of a pixel section including the photoelectric conversion section and the pixel transistor section; and isolation areas which electrically separate the photoelectric conversion section, the pixel transistor section, and the peripheral circuit section from each other. The isolation areas in the periphery of the pixel transistor section each have an insulating section formed higher than a surface of the semiconductor substrate. A first gate electrode of a transistor of the pixel transistor section is formed between the insulating sections and on the semiconductor substrate with a gate insulating film interposed therebetween.
    Type: Application
    Filed: February 24, 2010
    Publication date: September 9, 2010
    Applicant: SONY CORPORATION
    Inventors: Fumihiko Koga, Yoshiharu Kudoh
  • Publication number: 20100025569
    Abstract: A solid-state imaging device includes a semiconductor substrate including a pixel portion having a photoelectric conversion portion and a peripheral circuit portion; a first sidewall composed of a sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the pixel portion; a second sidewall composed of the sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the peripheral circuit portion; a first silicide blocking film composed of the sidewall film and disposed on the photoelectric conversion portion and a part of the MOS transistors in the pixel portion; and a second silicide blocking film disposed on the MOS transistors in the pixel portion so as to overlap with a part of the first silicide blocking film, wherein the MOS transistors in the pixel portion are covered with the first and second silicide blocking films.
    Type: Application
    Filed: July 27, 2009
    Publication date: February 4, 2010
    Applicant: SONY CORPORATION
    Inventors: Takuji Matsumoto, Tetsuji Yamaguchi, Keiji Tatani, Yutaka Nishimura, Kazuichiro Itonaga, Hiroyuki Mori, Norihiro Kubo, Fumihiko Koga, Shinichiro Izawa, Susumu Ooki
  • Publication number: 20090256226
    Abstract: Disclosed is a solid-state imaging device which includes a pixel section, a peripheral circuit section, a first isolation region formed with a STI structure on a semiconductor substrate in the peripheral circuit section, and a second isolation region formed with the STI structure on the semiconductor substrate in the pixel section. The portion of the second isolation region buried into the semiconductor substrate is shallower than the portion buried into the semiconductor substrate of the first isolation region, and the height of the upper face of the second isolation region is equal to that of the first isolation region. A method of producing the solid-state imaging device and an electronic device provided with the solid-state imaging devices are also disclosed.
    Type: Application
    Filed: April 8, 2009
    Publication date: October 15, 2009
    Applicant: Sony Corporation
    Inventors: Keiji Tatani, Takuji Matsumoto, Yasushi Tateshita, Fumihiko Koga, Takashi Nagano, Takahiro Toyoshima, Tetsuji Yamaguchi, Keiichi Nakazawa, Naoyuki Miyashita, Yoshihiko Nagahama
  • Publication number: 20070051988
    Abstract: A solid-state imaging device that includes: a pixel array section configured by an array of a unit pixel, including an optoelectronic conversion section that subjects an incoming light to optoelectronic conversion and stores therein a signal charge, a transfer transistor that transfers the signal charge stored in the optoelectronic conversion section, a charge-voltage conversion section that converts the signal charge provided by the transfer transistor into a signal voltage, and a reset transistor that resets a potential of the charge-voltage conversion section; and voltage setting means for setting a voltage of a well of the charge-voltage conversion section to be negative.
    Type: Application
    Filed: August 29, 2006
    Publication date: March 8, 2007
    Inventor: Fumihiko Koga