Patents by Inventor Fumiki Nakano
Fumiki Nakano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10276611Abstract: A photosensor substrate includes: a substrate 31; gate lines arranged on the substrate 31 and extend in a first direction; source lines Si arranged on the substrate 31 and extend in a second direction; transistors arranged in correspondence to points of intersection between the source lines and the gate lines, respectively, and are connected therewith; an insulating layer that covers the transistors; photoelectric conversion elements 4 arranged in correspondence to the points of intersection between the source lines and the gate lines, and are connected with the transistors via first contact holes CH3 in the insulating layer, and bias lines 8 that extend in the second direction, and are connected with the photoelectric conversion elements 4. The source lines are connected with the transistors via second contact holes CH2 in the insulating layer, and have a line width greater than a line width of the bias lines 8.Type: GrantFiled: June 2, 2016Date of Patent: April 30, 2019Assignee: SHARP KABUSHIKI KAISHAInventors: Fumiki Nakano, Tadayoshi Miyamoto
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Publication number: 20190115385Abstract: A photoelectric converter of one aspect of the present invention is provided with an element substrate having a photodiode and a thin film transistor arranged in matrix form, an interlayer insulating film laminated on the thin film transistor, a first contact hole formed in the interlayer insulating film and reaching a surface of a source electrode of the thin film transistor, and a second contact hole formed in the interlayer insulating film and reaching a surface of a drain electrode of the thin film transistor, in which a source bus line and the source electrode of the thin film transistor are connected via the first contact hole, the drain electrode of the thin film transistor and a lower layer electrode of the photodiode are connected via the second contact hole, and the tapered part of the second contact hole has a gentler inclination than the tapered part of the first contact hole.Type: ApplicationFiled: March 30, 2017Publication date: April 18, 2019Applicant: SHARP KABUSHIKI KAISHAInventors: HIROYUKI MORIWAKI, KAZUHIDE TOMIYASU, MAKOTO NAKAZAWA, FUMIKI NAKANO, WATARU NAKAMURA
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Publication number: 20190096876Abstract: Provided is a technique of image pickup without being affected by leakage current on an active matrix substrate that includes photoelectric conversion elements. An active matrix substrate 1 includes photoelectric conversion elements that are respectively provided with respect to a plurality of pixels defined by gate lines and data lines 10, and a bias line 13 supplying a bias voltage to each photoelectric conversion element. Further, the active matrix substrate 1 further includes a plurality of data protection circuit units 16a that are connected with the data lines 10, respectively, and a first common line 17a that is connected with the data protection circuits 16a and has a potential equal to or lower than those of the data lines 10, outside the image pickup area composed of a plurality of pixels.Type: ApplicationFiled: September 28, 2018Publication date: March 28, 2019Inventors: HIROYUKI MORIWAKI, AKINORI KUBOTA, FUMIKI NAKANO, WATARU NAKAMURA
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Publication number: 20190096922Abstract: This display device is provided with: a circuit substrate having a display region and a non-display region; pixel-driving TFTs for driving pixels, formed in the display region and having source electrodes and drain electrodes being spaced apart from each other on an insulating film and a first active layer formed from an oxide semiconductor, provided on the opposite side from the insulating film so as to cover a separation section between a source electrode and a drain electrode and part of the source electrode and part of the drain electrode adjacent to the separation section; and a driver circuit TFT for driving the pixel-driving TFTs, formed in the non-display region and having a second active layer formed from a non-oxide semiconductor.Type: ApplicationFiled: November 29, 2018Publication date: March 28, 2019Inventors: Tadayoshi MIYAMOTO, Fumiki NAKANO
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Patent number: 10199233Abstract: An active matrix substrate includes a substrate 31; gate lines arranged on the substrate 31 and extend in a first direction; source lines Si arranged on the substrate 31 and extend in a second direction that is different from the first direction; transistors 2 arranged in correspondence to points of intersection between the gate lines and the source lines, respectively, and are connected with the gate lines and the source lines; and an insulating layer. At least either the gate lines and the source lines are connected with electrodes of the transistors via contact holes in the insulating layer, and are formed to satisfy at least either i) having a greater film thickness or ii) being formed with a material having a smaller specific resistance, as compared with the electrodes of the transistors to which the lines are connected via the contact holes in the insulating layer.Type: GrantFiled: June 2, 2016Date of Patent: February 5, 2019Assignee: SHARP KABUSHIKI KAISHAInventors: Tadayoshi Miyamoto, Fumiki Nakano
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Patent number: 10177170Abstract: This display device is provided with: a circuit substrate having a display region and a non-display region; pixel-driving TFTs for driving pixels, formed in the display region and having source electrodes and drain electrodes being spaced apart from each other on an insulating film and a first active layer formed from an oxide semiconductor, provided on the opposite side from the insulating film so as to cover a separation section between a source electrode and a drain electrode and part of the source electrode and part of the drain electrode adjacent to the separation section; and a driver circuit TFT for driving the pixel-driving TFTs, formed in the non-display region and having a second active layer formed from a non-oxide semiconductor.Type: GrantFiled: June 18, 2012Date of Patent: January 8, 2019Assignee: SHARP KABUSHIKI KAISHAInventors: Tadayoshi Miyamoto, Fumiki Nakano
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Patent number: 10177444Abstract: A scanned antenna (1000) is a scanned antenna including antenna elements (U) arranged together, the scanned antenna including: a TFT substrate (101) including a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including a second dielectric substrate (51) a slot electrode (55); a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65). The slot electrode includes slots (57) arranged so as to correspond to the patch electrodes. As seen from the normal direction to the first dielectric substrate, a plurality of spacer structures (75) provided between the TFT substrate and the slot substrate are arranged so as not to overlap with first regions (Rp1) and/or second regions (Rp2), where the first regions are regions that are within a distance of 0.3 mm from edges of the slots and the second regions are regions that are within a distance of 0.Type: GrantFiled: October 25, 2016Date of Patent: January 8, 2019Assignee: SHARP KABUSHIKI KAISHAInventors: Makoto Nakazawa, Takatoshi Orui, Wataru Nakamura, Tadashi Ohtake, Fumiki Nakano, Kiyoshi Minoura
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Publication number: 20190006746Abstract: A scanning antenna (1000) in which a plurality of antenna units (U) are arranged, the scanning antenna including: a TFT substrate (101) including a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including a second dielectric substrate (51) and a slot electrode (55) formed on a first main surface of the second dielectric substrate; a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65) disposed opposing via a dielectric layer (54) a second main surface opposite to the first main surface of the second dielectric substrate, (51) wherein the slot electrode includes slots disposed corresponding to the respective patch electrodes, and a heater part (68) is further provided on the outside of the TFT substrate (101) or on the outside of the slot substrate (201).Type: ApplicationFiled: October 17, 2016Publication date: January 3, 2019Inventors: TADASHI OHTAKE, KIYOSHI MINOURA, MAKOTO NAKAZAWA, TAKATOSHI ORUI, WATARU NAKAMURA, FUMIKI NAKANO
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Patent number: 10170826Abstract: A TFT substrate (101) including a plurality of antenna element regions (U) arranged on a dielectric substrate (1), the TFT substrate including a transmitting/receiving region including a plurality of antenna element regions, and a non-transmitting/receiving region located outside of the transmitting/receiving region, each of the plurality of antenna element regions (U) including: a thin film transistor (10); a first insulating layer (11) covering the thin film transistor and having a first opening (CH1) which exposes a drain electrode (7D) of the thin film transistor (10); and a patch electrode (15) formed on the first insulating layer (11) and in the first opening (CH1), and electrically connected to the drain electrode (7D) of the thin film transistor, wherein the patch electrode (15) includes a metal layer, and a thickness of the metal layer is greater than a thickness of a source electrode (7S) and the drain electrode (7D) of the thin film transistor.Type: GrantFiled: October 6, 2016Date of Patent: January 1, 2019Assignee: SHARP KABUSHIKI KAISHAInventors: Makoto Nakazawa, Takatoshi Orui, Shigeyasu Mori, Fumiki Nakano, Kiyoshi Minoura
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Publication number: 20180360542Abstract: A medical image-processing apparatus according to embodiments includes processing circuitry. The processing circuitry acquires volume data in which a blood vessel including a plurality of branch vessels leading to a plurality of target areas, respectively, is imaged. The processing circuitry extracts a blood vessel structure of the blood vessel included in the volume data. The processing circuitry sets a plurality of the target areas in the volume data. The processing circuitry acquires a plurality of delivery points that are points at which a drug is given to the target areas from a catheter moved inside the blood vessel based on the blood vessel structure of the blood vessel and a positional relationship between the respective target areas and the respective branch vessels in the volume data. The processing circuitry outputs the delivery points.Type: ApplicationFiled: June 13, 2018Publication date: December 20, 2018Applicant: Canon Medical Systems CorporationInventor: Fumiki NAKANO
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Publication number: 20180360427Abstract: According to one embodiment, a ultrasound diagnostic apparatuses includes processing circuitry. The processing circuitry configured to obtain an ultrasonic image assigned with incidental information as imaging information, the incidental information including at least one of a body mark and a probe mark, calculate position specifying information for specifying an imaging position with respect to the ultrasonic image by performing image recognition of the incidental information assigned to the ultrasonic image, extract from a plurality of first images obtained in a past, a second image assigned with incidental information including position specifying information corresponding to the calculated position specifying information and display the second image.Type: ApplicationFiled: June 13, 2018Publication date: December 20, 2018Applicant: Canon Medical Systems CorporationInventors: Fumiki NAKANO, Yasuko FUJISAWA
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Patent number: 10153550Abstract: A scanned antenna (1000) is a scanned antenna including antenna elements (U) arranged together, the scanned antenna comprising: a TFT substrate including a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including a second dielectric substrate (51), and a slot electrode (55) formed on a first primary surface of the second dielectric substrate; a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65) arranged so as to oppose a second primary surface of the second dielectric substrate (51) with a dielectric layer (54) interposed therebetween, the second primary surface being on an opposite side from the first primary surface.Type: GrantFiled: October 14, 2016Date of Patent: December 11, 2018Assignee: SHARP KABUSHIKI KAISHAInventors: Takatoshi Orui, Shigeyasu Mori, Makoto Nakazawa, Fumiki Nakano, Kiyoshi Minoura
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Publication number: 20180337446Abstract: A TFT substrate (101) including a plurality of antenna element regions (U) arranged on a dielectric substrate (1), the TFT substrate including a transmitting/receiving region including a plurality of antenna element regions, and a non-transmitting/receiving region located outside of the transmitting/receiving region, each of the plurality of antenna element regions (U) including: a thin film transistor (10); a first insulating layer (11) covering the thin film transistor and having a first opening (CH1) which exposes a drain electrode (7D) of the thin film transistor (10); and a patch electrode (15) formed on the first insulating layer (11) and in the first opening (CH1), and electrically connected to the drain electrode (7D) of the thin film transistor, wherein the patch electrode (15) includes a metal layer, and a thickness of the metal layer is greater than a thickness of a source electrode (7S) and the drain electrode (7D) of the thin film transistor.Type: ApplicationFiled: October 6, 2016Publication date: November 22, 2018Inventors: Makoto NAKAZAWA, Takatoshi ORUI, Shigeyasu MORI, Fumiki NAKANO, Kiyoshi MINOURA
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Patent number: 10120052Abstract: In one embodiment, a medical image processing apparatus includes a display and processing circuitry. The processing circuitry is configured to (a) calculate fluid information including flow-velocity vectors based on three-dimensional image data of plural time phases, which are acquired by a phase contrast method of magnetic resonance imaging, and in which fluid flowing inside a lumen is depicted, (b) identify a branching position where a second lumen branches from a first lumen, based on change in flow volume of fluid flowing inside the first lumen along an extending direction of the first lumen, and (c) cause the display to display an analysis result including fluid information of fluid flowing inside the second lumen, based on the branching position.Type: GrantFiled: February 1, 2016Date of Patent: November 6, 2018Assignee: Toshiba Medical Systems CorporationInventors: Shuhei Bannae, Shigeharu Ohyu, Masashi Yoshida, Yoshihiro Ikeda, Fumiki Nakano, Mitsukazu Kamata, Tetsuya Yokota, Tatsuya Kimoto, Masao Yui, Tomohisa Fukunaga, Shigehide Kuhara, Kota Aoyagi
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Publication number: 20180301806Abstract: A scanning antenna includes a TFT substrate including a first dielectric substrate, a plurality of TFTs, a plurality of gate bus lines, a plurality of source bus lines, and a plurality of patch electrodes, a slot substrate including a second dielectric substrate and a slot electrode (55) formed on the first main surface of the second dielectric substrate, a liquid crystal layer provided between the TFT substrate and the slot substrate, and a reflective conductive plate provided opposing a second main surface opposite to the first main surface of the second dielectric substrate via a dielectric layer, and the slot electrode includes a plurality of slots arranged in accordance with the plurality of patch electrodes, and a groove configured to divide the slot electrode into two or more sections, and the TFT substrate includes an opposing metal part arranged opposing the groove, and when viewed from a normal line direction of the first dielectric substrate, the groove is covered with the opposing metal part in thType: ApplicationFiled: October 7, 2016Publication date: October 18, 2018Inventors: TAKATOSHI ORUI, KIYOSHI MINOURA, SHIGEYASU MORI, MAKOTO NAKAZAWA, FUMIKI NAKANO
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Publication number: 20180294542Abstract: A scanning antenna including: a TFT substrate including a first dielectric substrate, a TFT, a gate bus line, a source bus line, and a patch electrode; a slot substrate including a second dielectric substrate and a slot electrode formed on a first main surface of the second dielectric substrate; a liquid crystal layer provided between the TFT substrate and the slot substrate; and a reflective conductive plate. The scanning antenna has a tiling structure in which a plurality of scanning antenna portions are bonded together, and each of the plurality of scanning antenna portions includes a TFT substrate portion and a slot substrate portion.Type: ApplicationFiled: October 6, 2016Publication date: October 11, 2018Inventors: KIYOSHI MINOURA, SHIGEYASU MORI, MAKOTO NAKAZAWA, FUMIKI NAKANO, TAKATOSHI ORUI
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Publication number: 20180287254Abstract: A scanning antenna is a scanning antenna in which antenna units U are arranged, and includes a TFT substrate including a first dielectric substrate, TFTs, a plurality of gate bus lines, source bus lines, and patch electrodes; a slot substrate including a second dielectric substrate, and a slot electrode formed on a first main surface of the second dielectric substrate; a liquid crystal layer LC provided between the TFT substrate and the slot substrate; and a reflective conductive plate provided opposing a second main surface of the second dielectric substrate opposite to the first main surface via a dielectric layer. The slot electrode includes slots arranged in correspondence with the plurality of patch electrodes, and each of the patch electrodes is connected to a drain of a corresponding TFT and is supplied with a data signal from a corresponding source bus line while selected by a scanning signal supplied from the gate bus line of the corresponding TFT.Type: ApplicationFiled: October 6, 2016Publication date: October 4, 2018Inventors: FUMIKI NAKANO, KIYOSHI MINOURA, SHIGEYASU MORI, MAKOTO NAKAZAWA, TAKATOSHI ORUI
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Publication number: 20180226512Abstract: A semiconductor device includes a TFT (101), the TFT including a gate electrode (12), a gate insulating layer (14) covering the gate electrode, a metal oxide layer (16A) including a channel region (16c), a source contact region (16s) and a drain contact region (16d), a first electrode (18A) in contact with the source contact region, an insulating layer (22) formed on the metal oxide layer and the first electrode, the insulating layer having a first opening (22p) therein through which a portion of the metal oxide layer is exposed, and a light-transmissive second electrode (24) formed on the insulating layer and in a contact hole including the first opening, wherein the second electrode (24) is in contact with the drain contact region (16d) in the contact hole, the drain contact region (16d) is a portion of a region (17) of the metal oxide layer (16A) that is exposed through the contact hole, and as seen from a direction normal to a substrate (11), the second electrode (24) does not overlap the channel region (Type: ApplicationFiled: July 26, 2016Publication date: August 9, 2018Inventors: Fumiki NAKANO, Sumio KATOH
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Publication number: 20180226266Abstract: An active matrix substrate includes a substrate 31; gate lines arranged on the substrate 31 and extend in a first direction; source lines Si arranged on the substrate 31 and extend in a second direction that is different from the first direction; transistors 2 arranged in correspondence to points of intersection between the gate lines and the source lines, respectively, and are connected with the gate lines and the source lines; and an insulating layer. At least either the gate lines and the source lines are connected with electrodes of the transistors via contact holes in the insulating layer, and are formed to satisfy at least either i) having a greater film thickness or ii) being formed with a material having a smaller specific resistance, as compared with the electrodes of the transistors to which the lines are connected via the contact holes in the insulating layer.Type: ApplicationFiled: June 2, 2016Publication date: August 9, 2018Inventors: TADAYOSHI MIYAMOTO, FUMIKI NAKANO
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Publication number: 20180166478Abstract: A photosensor substrate includes: a substrate 31; gate lines arranged on the substrate 31 and extend in a first direction; source lines Si arranged on the substrate 31 and extend in a second direction; transistors arranged in correspondence to points of intersection between the source lines and the gate lines, respectively, and are connected therewith; an insulating layer that covers the transistors; photoelectric conversion elements 4 arranged in correspondence to the points of intersection between the source lines and the gate lines, and are connected with the transistors via first contact holes CH3 in the insulating layer, and bias lines 8 that extend in the second direction, and are connected with the photoelectric conversion elements 4. The source lines are connected with the transistors via second contact holes CH2 in the insulating layer, and have a line width greater than a line width of the bias lines 8.Type: ApplicationFiled: June 2, 2016Publication date: June 14, 2018Inventors: FUMIKI NAKANO, TADAYOSHI MIYAMOTO