Patents by Inventor Fuminori Morisawa

Fuminori Morisawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240056040
    Abstract: A radio-frequency module includes a power amplifier, a first bias circuit connected to the power amplifier, and a second bias circuit connected to the power amplifier. The first bias circuit includes a register that receives a first digital control signal corresponding to a power mode of the power amplifier and a current generation circuit that generates, based on information in the register, a first bias current, and the second bias circuit includes another register that receives a second digital control signal corresponding to the power mode and a current generation circuit that generates, based on information in the other register, a second bias current.
    Type: Application
    Filed: June 1, 2023
    Publication date: February 15, 2024
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Satoshi SAKURAI, Toshiki MATSUI, Yasunobu YOSHIZAKI, Fuminori MORISAWA
  • Publication number: 20230361170
    Abstract: To provide a semiconductor device and a semiconductor module that are capable of improving a heat dissipation property in the semiconductor device including a heat generating element. A semiconductor device includes: a P-type semiconductor substrate, which has a main surface and a main surface opposed to the main surface; an N-type N well, which is provided on the main surface side of the semiconductor substrate; a unit field effect transistor, which is provided in the N well; a P-type heat dissipation guard ring region, which is provided on the main surface side of the semiconductor substrate on the outside of the N well in plan view of the semiconductor substrate; wiring, which is provided on the heat dissipation guard ring region; bump placement portions; and bumps.
    Type: Application
    Filed: July 14, 2023
    Publication date: November 9, 2023
    Inventors: Fuminori MORISAWA, Kazuhiro UEDA
  • Patent number: 11463060
    Abstract: The present disclosure provides a power amplifier circuit capable of suppressing the occurrence of noises while enabling control of an output power level. The power amplifier circuit includes a first transistor that amplifies a first signal; a bias circuit that supplies a bias current or voltage based on a control signal to the first transistor; a second transistor to which a control current based on the control signal is supplied, which has an emitter or a source thereof connected to a collector or a drain of the first transistor, and from which a second signal obtained by amplifying the first signal is output; and a first feedback circuit provided between the collector or the drain of the second transistor and the base or the gate of the second transistor.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: October 4, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Fumio Harima, Yoshiki Kogushi, Shota Ishihara, Fuminori Morisawa
  • Patent number: 11398805
    Abstract: Provided is a power amplification module that includes: an amplification transistor that has a constant power supply voltage supplied to a collector thereof, a bias current supplied to a base thereof and that amplifies an input signal input to the base thereof and outputs an amplified signal from the collector thereof; a first current source that outputs a first current that corresponds to a level control voltage that is for controlling a signal level of the amplified signal; and a bias transistor that has the first current supplied to a collector thereof, a bias control voltage connected to a base thereof and that outputs the bias current from an emitter thereof.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: July 26, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shota Ishihara, Yusuke Shimamune, Takashi Soga, Fuminori Morisawa, Seiko Ono, Tetsuaki Adachi
  • Publication number: 20210234523
    Abstract: There is provided a power amplifier circuit with improved operation speed of the protection function against overcurrent or overvoltage. The power amplifier circuit includes an amplifier configured to amplify a radio frequency signal and output the radio frequency signal, a bias current supply circuit configured to supply a bias current to the amplifier, a detection circuit configured to detect whether the current or voltage of the amplifier is equal to or greater than a predetermined threshold; and a draw circuit configured to, when the detection circuit detects that the current or voltage is equal to or greater than the predetermined threshold, draw at least a part of the bias current supplied to the amplifier.
    Type: Application
    Filed: April 14, 2021
    Publication date: July 29, 2021
    Inventors: Fuminori MORISAWA, Kazuhiko ISHIMOTO, Fumio HARIMA
  • Publication number: 20210013855
    Abstract: The present disclosure provides a power amplifier circuit capable of suppressing the occurrence of noises while enabling control of an output power level. The power amplifier circuit includes a first transistor that amplifies a first signal; a bias circuit that supplies a bias current or voltage based on a control signal to the first transistor; a second transistor to which a control current based on the control signal is supplied, which has an emitter or a source thereof connected to a collector or a drain of the first transistor, and from which a second signal obtained by amplifying the first signal is output; and a first feedback circuit provided between the collector or the drain of the second transistor and the base or the gate of the second transistor.
    Type: Application
    Filed: September 30, 2020
    Publication date: January 14, 2021
    Inventors: Yuri HONDA, Fumio HARIMA, Yoshiki KOGUSHI, Shota ISHIHARA, Fuminori MORISAWA
  • Patent number: 10892720
    Abstract: A control circuit includes a first output unit configured to output a constant bias current for setting an electrical bias state of a bias circuit to the bias circuit; a second output unit configured to output a bias control current or constant voltage for controlling the electrical bias state of the bias circuit to the bias circuit; a resistor having one end connected to a reference potential; and a switch provided between another end of the resistor and an output terminal of the second output unit.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: January 12, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takeyuki Okabe, Fuminori Morisawa, Mizuho Ishikawa, Yuri Honda
  • Patent number: 10826453
    Abstract: The present disclosure provides a power amplifier circuit capable of suppressing the occurrence of noises while enabling control of an output power level. The power amplifier circuit includes a first transistor that amplifies a first signal; a bias circuit that supplies a bias current or voltage based on a control signal to the first transistor; a second transistor to which a control current based on the control signal is supplied, which has an emitter or a source thereof connected to a collector or a drain of the first transistor, and from which a second signal obtained by amplifying the first signal is output; and a first feedback circuit provided between the collector or the drain of the second transistor and the base or the gate of the second transistor.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: November 3, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Fumio Harima, Yoshiki Kogushi, Shota Ishihara, Fuminori Morisawa
  • Patent number: 10715093
    Abstract: A power amplifier module includes a first transistor that amplifies and outputs a radio frequency signal, a second transistor smaller in size than the first transistor and connected in parallel with the first transistor, a third transistor that supplies a bias current to the first and second transistors, a current detection circuit that detects a current flowing through a collector of the second transistor, and a bias control circuit that controls the bias current supplied from the third transistor to the first and second transistors by supplying a current corresponding to a detection result of the current detection circuit to a collector or a drain of the third transistor. In a case that a current flowing through the collector of the second transistor is larger than a predetermined threshold value, the bias control circuit reduces the current supplied to the collector or the drain of the third transistor.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: July 14, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Fuminori Morisawa, Kenji Mukai, Yuri Honda
  • Patent number: 10637401
    Abstract: Provided is a current output circuit that includes: a first FET that has a power supply voltage supplied to a source thereof, that has a first voltage supplied to a gate thereof and that outputs a first current from a drain thereof; a second FET that has the power supply voltage supplied to a source thereof, that has the first voltage supplied to a gate thereof and that outputs an output current from a drain thereof; a first control circuit that controls the first voltage such that the first current comes to be at a target level; and a second control circuit that performs control such that a drain voltage of the first FET and a drain voltage of the second FET are made equal to each other.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: April 28, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yusuke Shimamune, Satoshi Tanaka, Takayuki Tsutsui, Hayato Nakamura, Kazuhito Nakai, Fuminori Morisawa
  • Patent number: 10476454
    Abstract: A power amplifier module includes a first current source that outputs a first current corresponding to a level control voltage for controlling a signal level of an amplified signal, a second current source that outputs a second current corresponding to the level control voltage, a first transistor in which an input signal and a first bias current are supplied to a base and an emitter is grounded, a second transistor in which an emitter is connected to a collector of the first transistor, the second current is supplied to a base, and a first amplified signal obtained by amplifying the input signal is output from a collector, and a third transistor in which the first current is supplied to a collector, a bias control current or voltage is supplied to a base, and the first bias current is supplied from an emitter to the base of the first transistor.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: November 12, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shota Ishihara, Seiko Ono, Yusuke Shimamune, Fuminori Morisawa, Shizuki Nakajima, Yuri Honda, Kazuhiro Koshio, Masato Sato
  • Publication number: 20190326865
    Abstract: A control circuit includes a first output unit configured to output a constant bias current for setting an electrical bias state of a bias circuit to the bias circuit; a second output unit configured to output a bias control current or constant voltage for controlling the electrical bias state of the bias circuit to the bias circuit; a resistor having one end connected to a reference potential; and a switch provided between another end of the resistor and an output terminal of the second output unit.
    Type: Application
    Filed: March 26, 2019
    Publication date: October 24, 2019
    Inventors: Takeyuki OKABE, Fuminori MORISAWA, Mizuho ISHIKAWA, Yuri HONDA
  • Publication number: 20190280658
    Abstract: A power amplifier module includes a first transistor that amplifies and outputs a radio frequency signal, a second transistor smaller in size than the first transistor and connected in parallel with the first transistor, a third transistor that supplies a bias current to the first and second transistors, a current detection circuit that detects a current flowing through a collector of the second transistor, and a bias control circuit that controls the bias current supplied from the third transistor to the first and second transistors by supplying a current corresponding to a detection result of the current detection circuit to a collector or a drain of the third transistor. In a case that a current flowing through the collector of the second transistor is larger than a predetermined threshold value, the bias control circuit reduces the current supplied to the collector or the drain of the third transistor.
    Type: Application
    Filed: February 25, 2019
    Publication date: September 12, 2019
    Inventors: Fuminori MORISAWA, Kenji MUKAI, Yuri HONDA
  • Patent number: 10396718
    Abstract: Provided is a bias control circuit that includes: a reference voltage circuit that generates a reference voltage; a resistor; a temperature dependent current generating circuit that generates a temperature dependent current, which changes depending on temperature, on the basis of the reference voltage and that supplies the temperature dependent current to one end of the resistor; a reference voltage buffer circuit that applies the reference voltage to the other end of the resistor; a constant current generating circuit that generates a constant current, which is for driving the reference voltage buffer circuit, on the basis of the reference voltage and that supplies the constant current to the other end of the resistor; and a bias generating circuit that generates a bias voltage or a bias current for a power amplification circuit on the basis of the voltage at the one end of the resistor.
    Type: Grant
    Filed: January 15, 2018
    Date of Patent: August 27, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yoshiaki Harasawa, Fuminori Morisawa
  • Publication number: 20190181816
    Abstract: A power amplifier module includes a first current source that outputs a first current corresponding to a level control voltage for controlling a signal level of an amplified signal, a second current source that outputs a second current corresponding to the level control voltage, a first transistor in which an input signal and a first bias current are supplied to a base and an emitter is grounded, a second transistor in which an emitter is connected to a collector of the first transistor, the second current is supplied to a base, and a first amplified signal obtained by amplifying the input signal is output from a collector, and a third transistor in which the first current is supplied to a collector, a bias control current or voltage is supplied to a base, and the first bias current is supplied from an emitter to the base of the first transistor.
    Type: Application
    Filed: February 20, 2019
    Publication date: June 13, 2019
    Inventors: Shota ISHIHARA, Seiko ONO, Yusuke SHIMAMUNE, Fuminori MORISAWA, Shizuki NAKAJIMA, Yuri HONDA, Kazuhiro KOSHIO, Masato SATO
  • Patent number: 10256778
    Abstract: A power amplifier module includes a first current source that outputs a first current corresponding to a level control voltage for controlling a signal level of an amplified signal, a second current source that outputs a second current corresponding to the level control voltage, a first transistor in which an input signal and a first bias current are supplied to a base and an emitter is grounded, a second transistor in which an emitter is connected to a collector of the first transistor, the second current is supplied to a base, and a first amplified signal obtained by amplifying the input signal is output from a collector, and a third transistor in which the first current is supplied to a collector, a bias control current or voltage is supplied to a base, and the first bias current is supplied from an emitter to the base of the first transistor.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: April 9, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shota Ishihara, Seiko Ono, Yusuke Shimamune, Fuminori Morisawa, Shizuki Nakajima, Yuri Honda, Kazuhiro Koshio, Masato Sato
  • Publication number: 20190103846
    Abstract: The present disclosure provides a power amplifier circuit capable of suppressing the occurrence of noises while enabling control of an output power level. The power amplifier circuit includes a first transistor that amplifies a first signal; a bias circuit that supplies a bias current or voltage based on a control signal to the first transistor; a second transistor to which a control current based on the control signal is supplied, which has an emitter or a source thereof connected to a collector or a drain of the first transistor, and from which a second signal obtained by amplifying the first signal is output; and a first feedback circuit provided between the collector or the drain of the second transistor and the base or the gate of the second transistor.
    Type: Application
    Filed: September 19, 2018
    Publication date: April 4, 2019
    Inventors: Yuri HONDA, Fumio HARIMA, Yoshiki KOGUSHI, Shota ISHIHARA, Fuminori MORISAWA
  • Publication number: 20180302045
    Abstract: A power amplifier module includes a first current source that outputs a first current corresponding to a level control voltage for controlling a signal level of an amplified signal, a second current source that outputs a second current corresponding to the level control voltage, a first transistor in which an input signal and a first bias current are supplied to a base and an emitter is grounded, a second transistor in which an emitter is connected to a collector of the first transistor, the second current is supplied to a base, and a first amplified signal obtained by amplifying the input signal is output from a collector, and a third transistor in which the first current is supplied to a collector, a bias control current or voltage is supplied to a base, and the first bias current is supplied from an emitter to the base of the first transistor.
    Type: Application
    Filed: June 20, 2018
    Publication date: October 18, 2018
    Inventors: Shota ISHIHARA, Seiko ONO, Yusuke SHIMAMUNE, Fuminori MORISAWA, Shizuki NAKAJIMA, Yuri HONDA, Kazuhiro KOSHIO, Masato SATO
  • Publication number: 20180294788
    Abstract: Provided is a power amplification module that includes: an amplification transistor that has a constant power supply voltage supplied to a collector thereof, a bias current supplied to a base thereof and that amplifies an input signal input to the base thereof and outputs an amplified signal from the collector thereof; a first current source that outputs a first current that corresponds to a level control voltage that is for controlling a signal level of the amplified signal; and a bias transistor that has the first current supplied to a collector thereof, a bias control voltage connected to a base thereof and that outputs the bias current from an emitter thereof.
    Type: Application
    Filed: June 13, 2018
    Publication date: October 11, 2018
    Inventors: Shota Ishihara, Yusuke Shimamune, Takashi Soga, Fuminori Morisawa, Seiko Ono, Tetsuaki Adachi
  • Patent number: 10044330
    Abstract: A power amplifier module includes a first current source that outputs a first current corresponding to a level control voltage for controlling a signal level of an amplified signal, a second current source that outputs a second current corresponding to the level control voltage, a first transistor in which an input signal and a first bias current are supplied to a base and an emitter is grounded, a second transistor in which an emitter is connected to a collector of the first transistor, the second current is supplied to a base, and a first amplified signal obtained by amplifying the input signal is output from a collector, and a third transistor in which the first current is supplied to a collector, a bias control current or voltage is supplied to a base, and the first bias current is supplied from an emitter to the base of the first transistor.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: August 7, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shota Ishihara, Seiko Ono, Yusuke Shimamune, Fuminori Morisawa, Shizuki Nakajima, Yuri Honda, Kazuhiro Koshio, Masato Sato