Patents by Inventor Fumio Nagaune

Fumio Nagaune has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9502329
    Abstract: A semiconductor module cooler supplies a cooling medium to a cooling medium jacket from outside to cool a plurality of semiconductor elements thermally connected to the cooling medium jacket through a heat sink. The cooling medium jacket has a cooling fin cooling room including an opening for inserting cooling fins, and cooling the cooling fins; a cooling medium introduction port to introduce the cooling medium; a cooling medium diffusion room to diffuse and supply the cooling medium to the cooling fin cooling room; a cooling medium diffusion wall provided in the cooling medium diffusion room in which the cooling medium diffused by the cooling medium diffusion room flows over to be introduced to the cooling fin cooling room side; a cooling medium discharge port discharging the cooling medium to the outside; and a cooling medium convergence room provided between the cooling fin cooling room and the cooling medium discharge port.
    Type: Grant
    Filed: May 14, 2012
    Date of Patent: November 22, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Fumio Nagaune
  • Patent number: 9153519
    Abstract: A semiconductor device has a connection structure in which a power semiconductor chip is mounted on an insulating substrate having conductor patterns bonded to front and rear surfaces thereof and the insulating substrate is bonded to a heat-dissipating base member to dissipate heat generated from the power semiconductor chip to outside. The conductor pattern bonded to the heat-dissipating base member is formed such that a thickness of a circumferential portion of a bonding surface of the conductor pattern bonded to the insulating substrate is less than that of a center of the bonding portion.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: October 6, 2015
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Fumio Nagaune
  • Patent number: 8957508
    Abstract: A semiconductor device has a connection structure in which a power semiconductor chip is mounted on an insulating substrate having conductor patterns bonded to front and rear surfaces thereof, and the insulating substrate is connected to a heat-dissipating base member to dissipate heat generated from the power semiconductor chip to outside. The conductor pattern on the rear surface bonded to the heat-dissipating base member has a bonding portion having a rectangular shape and a predetermined curvature radius in vicinity of corners.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: February 17, 2015
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Fumio Nagaune
  • Publication number: 20140054762
    Abstract: A semiconductor module cooler supplies a cooling medium to a cooling medium jacket from outside to cool a plurality of semiconductor elements thermally connected to the cooling medium jacket through a heat sink. The cooling medium jacket has a cooling fin cooling room including an opening for inserting cooling fins, and cooling the cooling fins; a cooling medium introduction port to introduce the cooling medium; a cooling medium diffusion room to diffuse and supply the cooling medium to the cooling fin cooling room; a cooling medium diffusion wall provided in the cooling medium diffusion room in which the cooling medium diffused by the cooling medium diffusion room flows over to be introduced to the cooling fin cooling room side; a cooling medium discharge port discharging the cooling medium to the outside; and a cooling medium convergence room provided between the cooling fin cooling room and the cooling medium discharge port.
    Type: Application
    Filed: May 14, 2012
    Publication date: February 27, 2014
    Applicant: FUJI ELECTRIC CO., LTD
    Inventor: Fumio Nagaune
  • Publication number: 20140048918
    Abstract: A semiconductor device has a connection structure in which a power semiconductor chip is mounted on an insulating substrate having conductor patterns bonded to front and rear surfaces thereof, and the insulating substrate is connected to a heat-dissipating base member to dissipate heat generated from the power semiconductor chip to outside. The conductor pattern on the rear surface bonded to the heat-dissipating base member has a bonding portion having a rectangular shape and a predetermined curvature radius in vicinity of corners.
    Type: Application
    Filed: May 11, 2012
    Publication date: February 20, 2014
    Applicant: FUJI ELECTRIC CO., LTD
    Inventor: Fumio Nagaune
  • Publication number: 20140042609
    Abstract: A semiconductor device has a connection structure in which a power semiconductor chip is mounted on an insulating substrate having conductor patterns bonded to front and rear surfaces thereof and the insulating substrate is bonded to a heat-dissipating base member to dissipate heat generated from the power semiconductor chip to outside. The conductor pattern bonded to the heat-dissipating base member is formed such that a thickness of a circumferential portion of a bonding surface of the conductor pattern bonded to the insulating substrate is less than that of a center of the bonding portion.
    Type: Application
    Filed: May 11, 2012
    Publication date: February 13, 2014
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Fumio Nagaune
  • Patent number: 5539253
    Abstract: A resin-sealed semiconductor device includes a heat sink on which a semiconductor chip is provided. An output terminal is connected to the semiconductor chip. A casing surrounds the chip and part of the output terminal. The inside of the casing is filled with a sealing resin containing an aggregate such as glass particle. The chip is mounted in the area of an upper surface of the heat sink and the remaining area is covered with an epoxy resin film, which is from 10 .mu.m to 20 .mu.m thick. The resin film increases the bonding strength between the sealing resin and the heat sink and prevents the sealing resin from peeling away from the heat sink upon heat cycles due to different expansion coefficients.
    Type: Grant
    Filed: September 20, 1994
    Date of Patent: July 23, 1996
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Fumio Nagaune
  • Patent number: 5373105
    Abstract: A terminal structure for a resin-sealed semiconductor device is formed of a circuit assembly, an outer casing for housing the circuit assembly therein and having a recess for retaining a terminal nut therein, molding resin filled in the outer casing to seal the circuit assembly, and an externally drawn terminal connected to the circuit assembly and extending outwardly through the outer casing. The externally drawn terminal has an external wire connecting portion disposed outside the lid. An anchor or a fixing device is attached to the external wire connecting portion so that the external wire connecting portion is fixed to the casing by two points.
    Type: Grant
    Filed: October 4, 1993
    Date of Patent: December 13, 1994
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Fumio Nagaune, Hiraoki Matsushita
  • Patent number: D684544
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: June 18, 2013
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Fumio Nagaune