Patents by Inventor Fumito Isaka

Fumito Isaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250015195
    Abstract: A semiconductor device including an oxide semiconductor layer which is formed over a substrate and includes indium is provided. The oxide semiconductor layer is formed in parallel or substantially in parallel with a surface of the substrate. The oxide semiconductor layer includes a first region, a second region over the first region, and a third region over the second region. The first region is located in a range from a formation surface of the oxide semiconductor layer to greater than or equal to 0 nm to less than or equal to 3 nm in a direction substantially perpendicular to the formation surface. In cross-sectional observation of the oxide semiconductor layer using a transmission electron microscope, bright spots arranged in a layered manner in a direction parallel to the formation surface are observed in each of the first region, the second region, and the third region.
    Type: Application
    Filed: July 3, 2024
    Publication date: January 9, 2025
    Inventors: Shunpei YAMAZAKI, Fumito ISAKA, Yuichi SATO, Toshikazu OHNO, Hitoshi KUNITAKE, Tsutomu MURAKAWA
  • Publication number: 20250015194
    Abstract: A transistor that can be miniaturized is provided. The semiconductor device includes an oxide semiconductor layer, first to fourth conductive layers, and first to fourth insulating layers. Over the first conductive layer including a depressed portion, the first insulating layer, the second conductive layer, the second insulating layer, and the third conductive layer which include a first opening portion overlapping with the depressed portion are provided in this order. The third insulating layer is in contact with at least the side surface of the second conductive layer in the first opening portion. The oxide semiconductor layer is in contact with the top surface of the third conductive layer and the bottom and side surfaces of the depressed portion, and is in contact with the third insulating layer in the first opening portion. The fourth insulating layer is on an inner side of the oxide semiconductor layer in the first opening portion.
    Type: Application
    Filed: July 3, 2024
    Publication date: January 9, 2025
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Tsutomu Murakawa, Fumito Isaka, Hitoshi Kunitake, Yasuhiro Jinbo
  • Publication number: 20250015193
    Abstract: Provided are a transistor with favorable electrical characteristics, a transistor with a high on-state current, a transistor with low parasitic capacitance, or a transistor, a semiconductor device, or a memory device which can be miniaturized or highly integrated. An oxide semiconductor layer included in the transistor, the semiconductor device, or the memory device includes a first region, a second region over the first region, and a third region over the second region. The first region is located in a range from a surface on which the oxide semiconductor layer is to be formed to greater than or equal to 0 nm to less than or equal to 3 nm in a direction substantially perpendicular to the surface. In cross-sectional observation of the oxide semiconductor layer using a transmission electron 10 microscope, bright spots arranged in a layered manner in a direction parallel to the surface are observed in each of the first region, the second region, and the third region.
    Type: Application
    Filed: June 20, 2024
    Publication date: January 9, 2025
    Inventors: Shunpei YAMAZAKI, Fumito ISAKA, Yuichi SATO, Toshikazu OHNO, Hitoshi KUNITAKE, Tsutomu MURAKAWA
  • Publication number: 20240395940
    Abstract: A transistor with high electrical characteristics is provided. A transistor with a high on-state current is provided. A transistor with small parasitic capacitance is provided. A transistor, a semiconductor device, or a memory device which can be miniaturized or highly integrated is provided. The transistor includes a first conductive layer, a second conductive layer, a semiconductor layer, a gate insulating layer over the semiconductor layer, and a gate electrode over the gate insulating layer. A first insulating layer is between the first conductive layer and the second conductive layer. The second conductive layer is over the first insulating layer. The first insulating layer and the second conductive layer include an opening portion reaching the first conductive layer. The semiconductor layer is in contact with a sidewall of the opening portion. The semiconductor layer includes a first oxide layer and a second oxide layer. The first oxide layer includes a first region and a second region.
    Type: Application
    Filed: May 15, 2024
    Publication date: November 28, 2024
    Inventors: Shunpei YAMAZAKI, Fumito ISAKA, Yuichi SATO, Toshikazu OHNO, Hitoshi KUNITAKE, Tsutomu MURAKAWA
  • Patent number: 11985881
    Abstract: A novel display panel that is highly convenient, useful, or reliable is provided. The display panel includes a display region and includes a first pixel, a second pixel, a third pixel, and a filter. The first pixel emits light with a spectrum having a local maximum at a first wavelength, the second pixel emits light with a spectrum having a local maximum at a second wavelength, and the third pixel emits light with a spectrum having a local maximum at a third wavelength. The filter includes a region overlapping with the first pixel, a region overlapping with the second pixel, and a region overlapping with the third pixel, and the filter has a transmittance spectrum having local minimums at a fourth wavelength and a fifth wavelength. The second wavelength is longer than the first wavelength. The third wavelength is longer than the second wavelength. The fourth wavelength is between the first wavelength and the second wavelength. The fifth wavelength is between the second wavelength and the third wavelength.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: May 14, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisao Ikeda, Fumito Isaka
  • Publication number: 20240026537
    Abstract: A novel method for forming a metal oxide is provided. The metal oxide is formed using a precursor with a high decomposition temperature while a substrate is heated to higher than or equal to 300° C. and lower than or equal to 500° C. In the formation, plasma treatment, microwave treatment, or heat treatment is preferably performed as impurity removal treatment in an atmosphere containing oxygen. The impurity removal treatment may be performed while irradiation with ultraviolet light is performed. The metal oxide is formed by alternate repetition of precursor introduction and oxidizer introduction. For example, the impurity removal treatment is preferably performed every time the precursor introduction is performed more than or equal to 5 times and less than or equal to 10 times.
    Type: Application
    Filed: July 5, 2023
    Publication date: January 25, 2024
    Inventors: Shunpei YAMAZAKI, Tetsuya KAKEHATA, Sachiko KAWAKAMI, Fumito ISAKA, Yuji EGI
  • Publication number: 20240002998
    Abstract: A novel sputtering target is provided. The sputtering target includes a first region and a second region. The first region contains a first metal oxide containing an element M1 (the element M1 is one or more elements selected from Al, Ga, Si, Mg, Zr, and B). The second region contains a second metal oxide containing indium and zinc. The first region and the second region are separated from each other. Each of the first region and the second region is a crystal grain. A crystal grain boundary is observed between the first region and the second region. The diameter of each of the first region and the second region is greater than or equal to 5 nm and less than or equal to 10 ?m.
    Type: Application
    Filed: June 23, 2023
    Publication date: January 4, 2024
    Inventors: Shunpei YAMAZAKI, Yuichi SATO, Fumito ISAKA, Toshikazu OHNO
  • Publication number: 20230397427
    Abstract: A semiconductor device that has lower power consumption and is capable of non-destructive reading is provided. The semiconductor device includes a first transistor, a first FTJ element, and a second FTJ element. A first terminal of the first transistor is electrically connected to an output terminal of the first FTJ element and an input terminal of the second FTJ element. In data writing, polarization is caused in each of the first FTJ element and the second FTJ element in accordance with the data. In data reading, voltage with which the polarization does not change is applied between the output terminal of the first FTJ element and the input terminal of the second FTJ element. At this time, the first transistor is turned on, whereby a differential current between current flowing through the first FTJ element and current flowing through the second FTJ element flows through the first transistor.
    Type: Application
    Filed: September 9, 2021
    Publication date: December 7, 2023
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Hitoshi KUNITAKE, Yuji EGI, Fumito ISAKA
  • Publication number: 20230329002
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. A first conductor is formed over a substrate, a ferroelectric layer is formed over the first conductor, a second conductor is formed over the ferroelectric layer while substrate heating is performed, the ferroelectric layer includes hafnium oxide and zirconium oxide, and heat treatment at 500° C. or higher is not performed after the formation of the second conductor.
    Type: Application
    Filed: August 24, 2021
    Publication date: October 12, 2023
    Inventors: Shunpei YAMAZAKI, Yasuhiro JINBO, Hitoshi KUNITAKE, Haruyuki BABA, Yuki ITO, Fumito ISAKA, Kazuki TANEMURA, Yasumasa YAMANE, Tatsuya ONUKI
  • Publication number: 20230317832
    Abstract: A method for modifying an insulating film is provided. The method includes a first step of preparing an insulating film containing hydrogen, and a second step of performing microwave treatment on the insulating film to release the hydrogen in the insulating film as water molecules, so that a hydrogen concentration in the insulating film is reduced. Note that the microwave treatment is preferably performed using an oxygen gas and an argon gas at a temperature range of higher than or equal to 200° C. and lower than or equal to 300° C., and the proportion of the flow rate of the oxygen gas to the total of the flow rate of the oxygen gas and the flow rate of the argon gas is preferably greater than 0 % and less than or equal to 50 %.
    Type: Application
    Filed: August 6, 2021
    Publication date: October 5, 2023
    Inventors: Shunpei YAMAZAKI, Fumito ISAKA, Yoichi IIKUBO, Yuji EGI, Yasuhiro JINBO
  • Publication number: 20230155032
    Abstract: A semiconductor device with a small variation in characteristics is provided. The semiconductor device includes an oxide, a first conductor and a second conductor over the oxide, a first insulator over the first conductor, a second insulator over the second conductor, a third insulator over the first insulator and the second insulator, a fourth insulator over the third insulator, a fifth insulator that is over the oxide and is located between the first conductor and the second conductor; a sixth insulator over the fifth insulator; a seventh insulator over the sixth insulator, and a third conductor over the seventh insulator. The third conductor includes a region overlapping with the oxide, the fifth insulator has a region that is in contact with each of the oxide, the first conductor, the second conductor, and the first to fourth insulators, and the sixth insulator contains hydrogen, nitrogen, oxygen, and silicon.
    Type: Application
    Filed: March 11, 2021
    Publication date: May 18, 2023
    Inventors: Shunpei YAMAZAKI, Tetsuya KAKEHATA, Yasuhiro JINBO, Yuji EGI, Fumito ISAKA, Shuntaro KOCHI, Masahiro TAKAHASHI
  • Publication number: 20210273023
    Abstract: A novel display panel that is highly convenient, useful, or reliable is provided. The display panel includes a display region and includes a first pixel, a second pixel, a third pixel, and a filter. The first pixel emits light with a spectrum having a local maximum at a first wavelength, the second pixel emits light with a spectrum having a local maximum at a second wavelength, and the third pixel emits light with a spectrum having a local maximum at a third wavelength. The filter includes a region overlapping with the first pixel, a region overlapping with the second pixel, and a region overlapping with the third pixel, and the filter has a transmittance spectrum having local minimums at a fourth wavelength and a fifth wavelength. The second wavelength is longer than the first wavelength. The third wavelength is longer than the second wavelength. The fourth wavelength is between the first wavelength and the second wavelength. The fifth wavelength is between the second wavelength and the third wavelength.
    Type: Application
    Filed: June 19, 2019
    Publication date: September 2, 2021
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisao Ikeda, Fumito ISAKA
  • Publication number: 20190391427
    Abstract: To display a high-quality video regardless of a usage environment. To provide a display device which is lightweight and less likely to be broken. To reduce power consumption of the display device. The display device includes a first display element, a first transistor connected to the first display element, a second display element, and a second transistor connected to the second display element. The first display element is a reflective display element. The first display element and the first transistor are bonded to the second display element and the second transistor with an adhesive layer. Light from the second display element is extracted to the display surface on the first display element side. The light is condensed or guided by a light-condensing means or a light-guiding means provided in a path of the light from the second display element to the display surface.
    Type: Application
    Filed: July 2, 2019
    Publication date: December 26, 2019
    Inventors: Hisao IKEDA, Fumito ISAKA, Shunpei YAMAZAKI
  • Patent number: 10451912
    Abstract: A display device includes a display panel and a control portion. The control portion has a function of receiving image data, and a function of generating and supplying first data and second data on the basis of the image data. The display panel includes a pixel and an optical element. The pixel includes a first display element and a second display element. The second display element includes a region adjacent to the first display element. The optical element includes a first region overlapping with the second display element. The first region has a function of directing light which enters a region overlapping with the second display element to the first display element. The first display element is a reflective display element. The second display element is a light-emitting element.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: October 22, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisao Ikeda, Fumito Isaka
  • Patent number: 10345670
    Abstract: To display a high-quality video regardless of a usage environment. To provide a display device which is lightweight and less likely to be broken. To reduce power consumption of the display device. The display device includes a first display element, a first transistor connected to the first display element, a second display element, and a second transistor connected to the second display element. The first display element is a reflective display element. The first display element and the first transistor are bonded to the second display element and the second transistor with an adhesive layer. Light from the second display element is extracted to the display surface on the first display element side. The light is condensed or guided by a light-condensing means or a light-guiding means provided in a path of the light from the second display element to the display surface.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: July 9, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisao Ikeda, Fumito Isaka, Shunpei Yamazaki
  • Patent number: 10153460
    Abstract: A light extraction efficiency is increased in a display device having a plurality of display elements. The display device includes a first display element and a second display element over the first display element, and the first display element has a convex-concave shape. The convex-concave shape overlaps with a first opening provided in a reflective electrode of the second display element. A user can see an image that combines the display from the first display element and the display from the second display element. The convex-concave shape increases the light extraction efficiency of the first display element. The second display element is electrically connected to a transistor through a second opening provided in any layer of the first display element. The second display element can be provided close to the first display element.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: December 11, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Fumito Isaka, Hisao Ikeda
  • Publication number: 20180095559
    Abstract: To provide a novel display panel with high convenience or high reliability. The display panel includes a pixel including a functional layer, a first display element, and a second display element. The functional layer includes a pixel circuit and includes a region positioned between the first and second display elements. The pixel circuit is electrically connected to the first and second display elements. The first display element includes a reflective film and is configured to control the intensity of light reflected by the reflective film. The reflective film has a shape that does not block light emitted from the second display element. The second display element includes a light-emitting element and is provided such that display using the second display element can be seen from part of a region where display using the first display element can be seen.
    Type: Application
    Filed: September 28, 2017
    Publication date: April 5, 2018
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Shingo Eguchi, Hisao Ikeda, Daisuke Kubota, Fumito Isaka
  • Publication number: 20180053917
    Abstract: A light extraction efficiency is increased in a display device having a plurality of display elements. The display device includes a first display element and a second display element over the first display element, and the first display element has a convex-concave shape. The convex-concave shape overlaps with a first opening provided in a reflective electrode of the second display element. A user can see an image that combines the display from the first display element and the display from the second display element. The convex-concave shape increases the light extraction efficiency of the first display element. The second display element is electrically connected to a transistor through a second opening provided in any layer of the first display element. The second display element can be provided close to the first display element.
    Type: Application
    Filed: August 8, 2017
    Publication date: February 22, 2018
    Inventors: Fumito ISAKA, Hisao IKEDA
  • Publication number: 20180039117
    Abstract: To display a high-quality video regardless of a usage environment. To provide a display device which is lightweight and less likely to be broken. To reduce power consumption of the display device. The display device includes a first display element, a first transistor connected to the first display element, a second display element, and a second transistor connected to the second display element. The first display element is a reflective display element. The first display element and the first transistor are bonded to the second display element and the second transistor with an adhesive layer. Light from the second display element is extracted to the display surface on the first display element side. The light is condensed or guided by a light-condensing means or a light-guiding means provided in a path of the light from the second display element to the display surface.
    Type: Application
    Filed: August 2, 2017
    Publication date: February 8, 2018
    Inventors: Hisao IKEDA, Fumito ISAKA, Shunpei YAMAZAKI
  • Publication number: 20180017818
    Abstract: A display device includes a display panel and a control portion. The control portion has a function of receiving image data, and a function of generating and supplying first data and second data on the basis of the image data. The display panel includes a pixel and an optical element. The pixel includes a first display element and a second display element. The second display element includes a region adjacent to the first display element. The optical element includes a first region overlapping with the second display element. The first region has a function of directing light which enters a region overlapping with the second display element to the first display element. The first display element is a reflective display element. The second display element is a light-emitting element.
    Type: Application
    Filed: July 12, 2017
    Publication date: January 18, 2018
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisao IKEDA, Fumito ISAKA