Patents by Inventor Fumito Isaka
Fumito Isaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120086005Abstract: A photoelectric conversion device including a single crystal silicon substrate; a first amorphous silicon layer in contact with a surface (a light-receiving surface) of the single crystal silicon substrate; a first polarity (p-type) impurity diffusion layer in contact with the first amorphous silicon layer; a second amorphous silicon layer in contact with a back surface of the single crystal silicon substrate; and a second polarity (n-type) impurity diffusion layer in contact with the second amorphous silicon layer, in which the first and second polarity impurity diffusion layers are microcrystalline silicon layers formed under a deposition condition where a pressure in a reaction chamber is adjusted to be greater than or equal to 450 Pa and less than or equal to 10000 Pa is provided.Type: ApplicationFiled: October 4, 2011Publication date: April 12, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yoshikazu HIURA, Fumito Isaka
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Patent number: 8143087Abstract: A fragile layer is formed in a region at a depth of less than 1000 nm from one surface of a single crystal semiconductor substrate, and a first impurity semiconductor layer and a first electrode are formed at the one surface side. After bonding the first electrode and a supporting substrate, the single crystal semiconductor substrate is separated using the fragile layer or the vicinity as a separation plane, thereby forming a first single crystal semiconductor layer over the supporting substrate. An amorphous semiconductor layer is formed on the first single crystal semiconductor layer, and a second single crystal semiconductor layer is formed by heat treatment for solid phase growth of the amorphous semiconductor layer. A second impurity semiconductor layer having a conductivity type opposite to that of the first impurity semiconductor layer and a second electrode are formed over the second single crystal semiconductor layer.Type: GrantFiled: December 23, 2010Date of Patent: March 27, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Fumito Isaka, Sho Kato, Koji Dairiki
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Publication number: 20120007078Abstract: It is an object to provide a method of manufacturing a crystalline silicon device and a semiconductor device in which formation of cracks in a substrate, a base protective film, and a crystalline silicon film can be suppressed. First, a layer including a semiconductor film is formed over a substrate, and is heated. A thermal expansion coefficient of the substrate is 6×10?7/° C. to 38×10?7/° C., preferably 6×10?7/° C. to 31.8×10?7/° C. Next, the layer including the semiconductor film is irradiated with a laser beam to crystallize the semiconductor film so as to form a crystalline semiconductor film. Total stress of the layer including the semiconductor film is ?500 N/m to +50 N/m, preferably ?150 N/m to 0 N/m after the heating step.Type: ApplicationFiled: September 22, 2011Publication date: January 12, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Akihisa SHIMOMURA, Hidekazu MIYAIRI, Fumito ISAKA, Yasuhiro JINBO, Junya MARUYAMA
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Publication number: 20110318864Abstract: The purpose is manufacturing a photoelectric conversion device with excellent photoelectric conversion characteristics typified by a solar cell with effective use of a silicon material. A single crystal silicon layer is irradiated with a laser beam through an optical modulator to form an uneven structure on a surface thereof. The single crystal silicon layer is obtained in the following manner; an embrittlement layer is formed in a single crystal silicon substrate; one surface of a supporting substrate and one surface of an insulating layer formed over the single crystal silicon substrate are disposed to be in contact and bonded; heat treatment is performed; and the single crystal silicon layer is formed over the supporting substrate by separating part of the single crystal silicon substrate fixed to the supporting substrate along the embrittlement layer or a periphery of the embrittlement layer.Type: ApplicationFiled: August 31, 2011Publication date: December 29, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Fumito ISAKA, Sho KATO, Junpei MOMO
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Publication number: 20110303272Abstract: An object is to provide a photoelectric conversion device in which defects are suppressed as much as possible by filling a separation process region of a semiconductor film with an insulating resin. A photoelectric conversion device includes a first conductive layer formed over a substrate; first to third semiconductor layers formed over the first conductive layer; a second conductive layer formed over the third semiconductor layer; a first separation groove for separating the first conductive layer and the first to third semiconductor layers into a plurality of pieces; a second separation groove for separating the first to third semiconductor layers into a plurality of pieces; and a third separation groove for separating the second conductive layer into a plurality of pieces. An insulating resin is filled in a structural defect that exists in at least one of the first to third semiconductor layers, and in the first separation groove.Type: ApplicationFiled: June 7, 2011Publication date: December 15, 2011Inventors: Kazuo Nishi, Takashi Hirose, Fumito Isaka, Naoto Kusumoto
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Patent number: 8048754Abstract: An object is to provide a single crystal semiconductor layer with extremely favorable characteristics without performing CMP treatment or heat treatment at high temperature. Further, an object is to provide a semiconductor substrate (or an SOI substrate) having the above single crystal semiconductor layer. A first single crystal semiconductor layer is formed by a vapor-phase epitaxial growth method on a surface of a second single crystal semiconductor layer over a substrate; the first single crystal semiconductor layer and a base substrate are bonded to each other with an insulating layer interposed therebetween; and the first single crystal semiconductor layer and the second single crystal semiconductor layer are separated from each other at an interface therebetween so as to provide the first single crystal semiconductor layer over the base substrate with the insulating layer interposed therebetween. Thus, an SOI substrate can be manufactured.Type: GrantFiled: September 23, 2009Date of Patent: November 1, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Akihisa Shimomura, Fumito Isaka, Sho Kato, Takashi Hirose
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Patent number: 8043935Abstract: An object is to manufacture a semiconductor substrate having a single crystal semiconductor layer with favorable characteristics, without requiring CMP treatment and/or heat treatment at high temperature. In addition, another object is to improve productivity of semiconductor substrates. Vapor-phase epitaxial growth is performed by using a first single crystal semiconductor layer provided over a first substrate as a seed layer, whereby a second single crystal semiconductor layer is formed over the first single crystal semiconductor layer, and separation is performed at an interface of the both layers. Thus, the second single crystal semiconductor layer is transferred to the second substrate to provide a semiconductor substrate, and the semiconductor substrate is reused by performing laser light treatment on the seed layer.Type: GrantFiled: November 19, 2009Date of Patent: October 25, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Fumito Isaka, Sho Kato, Yu Arita, Akihisa Shimomura
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Patent number: 8034724Abstract: It is an object to provide a method of manufacturing a crystalline silicon device and a semiconductor device in which formation of cracks in a substrate, a base protective film, and a crystalline silicon film can be suppressed. First, a layer including a semiconductor film is formed over a substrate, and is heated. A thermal expansion coefficient of the substrate is 6×10?7/° C. to 38×10?7/° C., preferably 6×10?7/° C. to 31.8×10?7/° C. Next, the layer including the semiconductor film is irradiated with a laser beam to crystallize the semiconductor film so as to form a crystalline semiconductor film. Total stress of the layer including the semiconductor film is ?500 N/m to +50 N/m, preferably ?150 N/m to 0 N/m after the heating step.Type: GrantFiled: July 13, 2007Date of Patent: October 11, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Akihisa Shimomura, Hidekazu Miyairi, Fumito Isaka, Yasuhiro Jinbo, Junya Maruyama
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Patent number: 8017429Abstract: The purpose is manufacturing a photoelectric conversion device with excellent photoelectric conversion characteristics typified by a solar cell with effective use of a silicon material. A single crystal silicon layer is irradiated with a laser beam through an optical modulator to form an uneven structure on a surface thereof. The single crystal silicon layer is obtained in the following manner; an embrittlement layer is formed in a single crystal silicon substrate; one surface of a supporting substrate and one surface of an insulating layer formed over the single crystal silicon substrate are disposed to be in contact and bonded; heat treatment is performed; and the single crystal silicon layer is formed over the supporting substrate by separating part of the single crystal silicon substrate fixed to the supporting substrate along the embrittlement layer or a periphery of the embrittlement layer.Type: GrantFiled: February 12, 2009Date of Patent: September 13, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Fumito Isaka, Sho Kato, Junpei Momo
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Patent number: 7985604Abstract: A photoelectric conversion device having an excellent photoelectric conversion characteristic is provided while effectively utilizing limited resources. A fragile layer is formed in a region at a depth of less than 1000 nm from one surface of a single crystal semiconductor substrate, and a first impurity semiconductor layer, a first electrode, and an insulating layer are formed on the one surface side of the single crystal semiconductor substrate. After bonding the insulating layer to a supporting substrate, the single crystal semiconductor substrate is separated with the fragile layer or its vicinity used as a separation plane, thereby forming a first single crystal semiconductor layer over the supporting substrate.Type: GrantFiled: November 26, 2008Date of Patent: July 26, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Fumito Isaka, Sho Kato, Kosei Nei, Ryu Komatsu, Akihisa Shimomura, Koji Dairiki
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Publication number: 20110129969Abstract: A stack including at least an insulating layer, a first electrode, and a first impurity semiconductor layer is provided over a supporting substrate; a first semiconductor layer to which an impurity element imparting one conductivity type is added is formed over the first impurity semiconductor layer; a second semiconductor layer to which an impurity element imparting the one conductivity type is added is formed over the first semiconductor layer under a condition different from that of the first semiconductor layer; crystallinity of the first semiconductor layer and crystallinity of the second semiconductor layer are improved by a solid-phase growth method to form a second impurity semiconductor layer; an impurity element imparting the one conductivity type and an impurity element imparting a conductivity type different from the one conductivity type are added to the second impurity semiconductor layer; and a gate electrode layer is formed via a gate insulating layer.Type: ApplicationFiled: February 10, 2011Publication date: June 2, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Sho KATO, Satoshi TORIUMI, Fumito ISAKA, Hideto OHNUMA
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Patent number: 7951656Abstract: A stack including at least an insulating layer, a first electrode, and a first impurity semiconductor layer is provided over a supporting substrate; a first semiconductor layer to which an impurity element imparting one conductivity type is added is formed over the first impurity semiconductor layer; a second semiconductor layer to which an impurity element imparting the one conductivity type is added is formed over the first semiconductor layer under a condition different from that of the first semiconductor layer; crystallinity of the first semiconductor layer and crystallinity of the second semiconductor layer are improved by a solid-phase growth method to form a second impurity semiconductor layer; an impurity element imparting the one conductivity type and an impurity element imparting a conductivity type different from the one conductivity type are added to the second impurity semiconductor layer; and a gate electrode layer is formed via a gate insulating layer.Type: GrantFiled: May 18, 2009Date of Patent: May 31, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Sho Kato, Satoshi Toriumi, Fumito Isaka, Hideto Ohnuma
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Patent number: 7947523Abstract: An embrittlement layer is formed in the single crystal semiconductor substrate and a first impurity semiconductor layer, a first electrode, and an insulating layer are formed on one surface of the single crystal semiconductor substrate. After attaching the insulating layer and a supporting substrate to each other to bond the single crystal semiconductor substrate and the supporting substrate, the single crystal semiconductor substrate is separated along the embrittlement layer to form a stack including a first single crystal semiconductor layer. A first semiconductor layer and a second semiconductor layer are formed over the first single crystal semiconductor layer. A second single crystal semiconductor layer is formed by solid phase growth. A second impurity semiconductor layer having a conductivity type opposite to that of the first impurity semiconductor layer is formed on the second single crystal semiconductor layer. A second electrode is formed on the second impurity semiconductor layer.Type: GrantFiled: April 16, 2009Date of Patent: May 24, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Sho Kato, Satoshi Toriumi, Fumito Isaka
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Patent number: 7939426Abstract: An SOI substrate is manufactured by a method in which a first insulating film is formed over a first substrate over which a plurality of first single crystal semiconductor films is formed; the first insulating film is planarized; heat treatment is performed on a single crystal semiconductor substrate attached to the first insulating film; a second single crystal semiconductor film is formed; a third single crystal semiconductor film is formed using the first single crystal semiconductor films and the second single crystal semiconductor films as seed layers; a fragile layer is formed by introducing ions into the third single crystal semiconductor film; a second insulating film is formed over the third single crystal semiconductor film; heat treatment is performed on a second substrate superposed on the second insulating film; and a part of the third single crystal semiconductor film is fixed to the second substrate.Type: GrantFiled: July 28, 2010Date of Patent: May 10, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Fumito Isaka, Sho Kato, Kosei Nei, Ryu Komatsu, Tatsuya Mizoi, Akihisa Shimomura
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Publication number: 20110092013Abstract: A fragile layer is formed in a region at a depth of less than 1000 nm from one surface of a single crystal semiconductor substrate, and a first impurity semiconductor layer and a first electrode are formed at the one surface side. After bonding the first electrode and a supporting substrate, the single crystal semiconductor substrate is separated using the fragile layer or the vicinity as a separation plane, thereby forming a first single crystal semiconductor layer over the supporting substrate. An amorphous semiconductor layer is formed on the first single crystal semiconductor layer, and a second single crystal semiconductor layer is formed by heat treatment for solid phase growth of the amorphous semiconductor layer. A second impurity semiconductor layer having a conductivity type opposite to that of the first impurity semiconductor layer and a second electrode are formed over the second single crystal semiconductor layer.Type: ApplicationFiled: December 23, 2010Publication date: April 21, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Fumito ISAKA, Sho KATO, Koji DAIRIKI
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Publication number: 20110053343Abstract: There are provided a semiconductor device having a structure which can realize not only suppression of a punch-through current but also reuse of a silicon wafer used for bonding, in manufacturing a semiconductor device using an SOI technique, and a manufacturing method thereof. A semiconductor film into which an impurity imparting a conductivity type opposite to that of a source region and a drain region is implanted is formed over a substrate, and a single crystal semiconductor film is bonded to the semiconductor film by an SOI technique to form a stacked semiconductor film. A channel formation region is formed using the stacked semiconductor film, thereby suppressing a punch-through current in a semiconductor device.Type: ApplicationFiled: November 9, 2010Publication date: March 3, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Sho KATO, Fumito ISAKA, Tetsuya KAKEHATA, Hiromichi GODO, Akihisa SHIMOMURA
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Patent number: 7858431Abstract: A fragile layer is formed in a region at a depth of less than 1000 nm from one surface of a single crystal semiconductor substrate, and a first impurity semiconductor layer and a first electrode are formed at the one surface side. After bonding the first electrode and a supporting substrate, the single crystal semiconductor substrate is separated using the fragile layer or the vicinity as a separation plane, thereby forming a first single crystal semiconductor layer over the supporting substrate. An amorphous semiconductor layer is formed on the first single crystal semiconductor layer, and a second single crystal semiconductor layer is formed by heat treatment for solid phase growth of the amorphous semiconductor layer. A second impurity semiconductor layer having a conductivity type opposite to that of the first impurity semiconductor layer and a second electrode are formed over the second single crystal semiconductor layer.Type: GrantFiled: November 26, 2008Date of Patent: December 28, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Fumito Isaka, Sho Kato, Koji Dairiki
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Patent number: 7851318Abstract: A semiconductor substrate is irradiated with accelerated hydrogen ions, thereby forming a damaged region including a large amount of hydrogen. After a single crystal semiconductor substrate and a supporting substrate are bonded to each other, the semiconductor substrate is heated, so that the single crystal semiconductor substrate is separated in the damaged region. A single crystal semiconductor layer which is separated from the single crystal semiconductor substrate is irradiated with a laser beam. The single crystal semiconductor layer is melted by laser beam irradiation, whereby the single crystal semiconductor layer is recrystallized to recover its crystallinity and to planarized a surface of the single crystal semiconductor layer. After the laser beam irradiation, the single crystal semiconductor layer is heated at a temperature at which the single crystal semiconductor layer is not melted, so that the lifetime of the single crystal semiconductor layer is improved.Type: GrantFiled: October 16, 2008Date of Patent: December 14, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masaki Koyama, Fumito Isaka, Akihisa Shimomura, Junpei Momo
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Patent number: 7842584Abstract: There are provided a semiconductor device having a structure which can realize not only suppression of a punch-through current but also reuse of a silicon wafer used for bonding, in manufacturing a semiconductor device using an SOI technique, and a manufacturing method thereof. A semiconductor film into which an impurity imparting a conductivity type opposite to that of a source region and a drain region is implanted is formed over a substrate, and a single crystal semiconductor film is bonded to the semiconductor film by an SOI technique to form a stacked semiconductor film. A channel formation region is formed using the stacked semiconductor film, thereby suppressing a punch-through current in a semiconductor device.Type: GrantFiled: December 19, 2008Date of Patent: November 30, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Sho Kato, Fumito Isaka, Tetsuya Kakehata, Hiromichi Godo, Akihisa Shimomura
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Publication number: 20100291754Abstract: A semiconductor substrate is irradiated with accelerated hydrogen ions, thereby forming a damaged region including a large amount of hydrogen. After a single crystal semiconductor substrate and a supporting substrate are bonded to each other, the semiconductor substrate is heated, so that the single crystal semiconductor substrate is separated in the damaged region. A single crystal semiconductor layer which is separated from the single crystal semiconductor substrate is irradiated with a laser beam. The single crystal semiconductor layer is melted by laser beam irradiation, whereby the single crystal semiconductor layer is recrystallized to recover its crystallinity and to planarized a surface of the single crystal semiconductor layer. After the laser beam irradiation, the single crystal semiconductor layer is heated at a temperature at which the single crystal semiconductor layer is not melted, so that the lifetime of the single crystal semiconductor layer is improved.Type: ApplicationFiled: July 27, 2010Publication date: November 18, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Masaki KOYAMA, Fumito ISAKA, Akihisa SHIMOMURA, Junpei MOMO