Patents by Inventor Fumiya Watanabe

Fumiya Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160352335
    Abstract: According to one embodiment, a semiconductor device includes: a first circuit including a first transistor, a second transistor, the first and second transistors being capable of receiving first and second signals, respectively; a second circuit including a third transistor and a fourth transistor, a gate and one end of the third transistor being connected to one end of the first transistor, the fourth transistor being capable of receiving the first signal, one end of the fourth transistor being connected to the other end of the third transistor; and a third circuit configured to charge or discharge a node being connected to the one end of the first transistor according to the first signal.
    Type: Application
    Filed: September 4, 2015
    Publication date: December 1, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Fumiya WATANABE, Mikihiko Ito, Masaru Koyanagi
  • Publication number: 20160036397
    Abstract: According to one embodiment, a semiconductor amplifier circuit includes: a first amplifier circuit including first and second P-type transistors; a second amplifier circuit including first and second N-type transistors; and first to seventh current mirror circuits. The first and second current mirror circuits are connected to drains of the first and second P-type transistors. The third and fourth current mirror circuits are connected to drains of the first and second N-type transistors. The sixth current mirror circuit is connected to the first, fourth and fifth current mirror circuits. The seventh current mirror circuit is connected to the second, third and fifth current mirror circuits.
    Type: Application
    Filed: October 28, 2014
    Publication date: February 4, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Fumiya WATANABE, Mikihiko ITO, Masaru KOYANAGI
  • Patent number: 5675531
    Abstract: The invention relates to a storage device for storage of information using field emission comprising two spaced apart members. Each member comprises a plurality of parallel conducting lines having adsorbates disposed thereon. The lines are disposed on a nonconductive substrate. The members are positioned with the parallel conducting lines of each member facing each other without planar alignment of the lines of one member with the lines of the other member.
    Type: Grant
    Filed: April 5, 1995
    Date of Patent: October 7, 1997
    Assignee: International Business Machines Corporation
    Inventors: Gary Miles McClelland, Fumiya Watanabe