Patents by Inventor Fumiyasu Utsunomiya

Fumiyasu Utsunomiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210281116
    Abstract: A convenient electronic circuit in which a switch is able to be switched through electric power obtained by weak radio waves is provided.
    Type: Application
    Filed: February 26, 2021
    Publication date: September 9, 2021
    Inventors: Yoshifumi YOSHIDA, Noboru KAWAI, Fumiyasu UTSUNOMIYA
  • Publication number: 20210281115
    Abstract: A convenient electronic circuit in which a switch is able to be switched through electric power obtained using weak radio waves is provided.
    Type: Application
    Filed: February 26, 2021
    Publication date: September 9, 2021
    Inventors: Yoshifumi YOSHIDA, Noboru KAWAI, Fumiyasu UTSUNOMIYA
  • Publication number: 20210281176
    Abstract: A convenient electronic circuit in which a switch is able to be switched through electric power obtained using weak radio waves is provided.
    Type: Application
    Filed: February 24, 2021
    Publication date: September 9, 2021
    Inventors: Yoshifumi YOSHIDA, Noboru KAWAI, Fumiyasu UTSUNOMIYA
  • Publication number: 20210251160
    Abstract: A plant cultivation system includes: a first sensor configured to output a sensor signal corresponding to an amount of water in a plant; a second sensor configured to output a sensor signal corresponding to a measurement value of an environment condition; and a controller, wherein the controller is configured to, by using a sensor signal from the first sensor obtained by the first sensor measuring a plant to be cultivated and a sensor signal from the second sensor obtained by the second sensor measuring an environment for cultivating the plant to be cultivated, control a specific environment parameter corresponding to the environment condition and measured by the second sensor, in a cultivation environment for the plant to be cultivated.
    Type: Application
    Filed: February 17, 2021
    Publication date: August 19, 2021
    Applicants: The Ritsumeikan Trust, ABLIC Inc.
    Inventors: Takakuni DOUSEKI, Ami TANAKA, Syuuichi OKAMOTO, Ryoma FURUMORI, Fumiyasu UTSUNOMIYA
  • Patent number: 11011979
    Abstract: Provided is a booster circuit capable of adjusting a power conversion capacity in accordance with input power and also of stably performing a boost operation. The booster circuit includes a first voltage detection circuit configured to output as a first control signal a result of comparing an input voltage and a first voltage obtained by dividing an output voltage, a first oscillation circuit configured to be controlled to operate based on the first control signal, and a first switched-capacitor booster circuit configured to operate in accordance with a first clock signal provided from the first oscillation circuit.
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: May 18, 2021
    Assignee: ABLIC INC.
    Inventor: Fumiyasu Utsunomiya
  • Publication number: 20210123803
    Abstract: Provided is an optical sensor including: a first photodetector including a first photodiode and having a first wavelength sensitivity characteristic; a first resistor having one end connected to a cathode of the first photodiode, and another end connected to a ground point; a second photodetector including a second photodiode and having a second wavelength sensitivity characteristic; a second resistor having one end connected to a cathode of the second photodiode, and another end connected to the ground point; and an amplifier circuit having a first input terminal connected to the first photodiode, a second input terminal connected to the second photodiode, and an output terminal configured to output a potential based on a potential of the first input terminal and a potential of the second input terminal, and using, as an operating power supply, electric power generated by electromotive force of the first photodetector and the second photodetector.
    Type: Application
    Filed: October 28, 2020
    Publication date: April 29, 2021
    Inventors: Fumiyasu UTSUNOMIYA, Takakuni DOUSEKI, Ami TANAKA
  • Publication number: 20210036606
    Abstract: Provided is a booster circuit capable of adjusting a power conversion capacity in accordance with input power and also of stably performing a boost operation. The booster circuit includes a first voltage detection circuit configured to output as a first control signal a result of comparing an input voltage and a first voltage obtained by dividing an output voltage, a first oscillation circuit configured to be controlled to operate based on the first control signal, and a first switched-capacitor booster circuit configured to operate in accordance with a first clock signal provided from the first oscillation circuit.
    Type: Application
    Filed: July 16, 2020
    Publication date: February 4, 2021
    Inventor: Fumiyasu UTSUNOMIYA
  • Patent number: 10794770
    Abstract: A signal detection circuit includes: a power terminal; a first current limitation circuit; a second current limitation circuit; a current-voltage conversion circuit; a first p-channel MOS transistor including a source, a gat, and a drain; a first n-channel MOS transistor including a drain, a gate, and a source; and a second n-channel MOS transistor in which a drain is connected to a first connection point connecting the resistor with the drain of the first n-channel MOS transistor, a gate is connected to a second connection point connecting the drain of the first p-channel MOS transistor with the current-voltage conversion circuit, and a source is grounded.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: October 6, 2020
    Assignees: ABLIC INC., THE RITSUMEIKAN TRUST
    Inventors: Fumiyasu Utsunomiya, Takakuni Douseki, Ami Tanaka
  • Publication number: 20200272189
    Abstract: Provided is a current generation circuit including a first terminal to be connected to a first external circuit; a second terminal to be connected to a second external circuit; a first resistor in which a potential is generated by the first external circuit connected through the first terminal; a second resistor in which a potential is generated by the second external circuit connected through the second terminal; a first amplifier circuit including a first positive input terminal to which the potential generated in the first resistor is supplied, and a first negative input terminal to which the potential generated in the second resistor is supplied; and a first MOS transistor having a gate connected to an output terminal of the first amplifier circuit, a source connected to the first negative input terminal, and a drain connected to a first differential current terminal.
    Type: Application
    Filed: February 20, 2020
    Publication date: August 27, 2020
    Inventor: Fumiyasu UTSUNOMIYA
  • Patent number: 10756713
    Abstract: A clock signal boost circuit includes a first NMOS transistor having a drain to a power terminal, a source to a first node, and a gate to a first terminal, a second NMOS transistor having a drain to the first node, a source to a GND, and a gate to a second terminal, a third NMOS transistor having a drain to the power terminal, a source to a second node, and a gate to the second terminal, a capacitor between the first node and the second node, a PMOS transistor having a source to the second node, a drain to an output terminal, and a gate to the second terminal, and a fourth NMOS transistor having a drain to the output terminal, a source to the GND, and a gate to the second terminal. The first and the third NMOS transistors are depletion type NMOS transistors.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: August 25, 2020
    Assignee: ABLIC INC.
    Inventor: Fumiyasu Utsunomiya
  • Publication number: 20200256755
    Abstract: A parasitic ribbon sensor includes: a first conductive line including a first metal portion formed of a first metal; and a second conductive line including a second metal portion formed of a second metal being different from the first metal, the second conductive line being placed parallel to the first conductive line, being shaped in a ribbon shape together with the first conductive line.
    Type: Application
    Filed: February 10, 2020
    Publication date: August 13, 2020
    Inventors: Yoshihide WAKAYAMA, Teruo YAMAMIYA, Takashi HASEBE, Shozo NISHIYAMA, Toshihiko UEDA, Yusuke TAKEUCHI, Taro YAMASAKI, Norihiro OKAZAKI, Fumiyasu UTSUNOMIYA, Ryo YAMAMURA, Kouichi TAKAHASHI
  • Publication number: 20200052679
    Abstract: A clock signal boost circuit includes a first NMOS transistor having a drain to a power terminal, a source to a first node, and a gate to a first terminal, a second NMOS transistor having a drain to the first node, a source to a GND, and a gate to a second terminal, a third NMOS transistor having a drain to the power terminal, a source to a second node, and a gate to the second terminal, a capacitor between the first node and the second node, a PMOS transistor having a source to the second node, a drain to an output terminal, and a gate to the second terminal, and a fourth NMOS transistor having a drain to the output terminal, a source to the GND, and a gate to the second terminal. The first and the third NMOS transistors are depletion type NMOS transistors.
    Type: Application
    Filed: July 30, 2019
    Publication date: February 13, 2020
    Inventor: Fumiyasu Utsunomiya
  • Patent number: 10447155
    Abstract: A power source device has: a storage unit configured to receive a generated power and store as a storage power; a boost unit configured to generate, from a storage power supplied from the storage unit, a boosted power having a higher voltage than a voltage of the storage power, and supply the boosted power to a load; and a voltage detection unit configured to output a boost operation permission signal permitting a boost operation of the boost unit to the boost unit when the storage voltage of the boost unit increases to become a voltage equal to or higher than a minimum operation voltage of the boost unit. The boost unit is configured to start the boost operation by the storage power supplied from the storage unit and operates on the boosted power generated by the boost operation as an operation power source when the boost operation permission signal is output from the voltage detection unit.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: October 15, 2019
    Assignees: ABLIC INC., THE RITSUMEIKAN TRUST
    Inventors: Fumiyasu Utsunomiya, Takakuni Douseki, Ami Tanaka
  • Publication number: 20190257694
    Abstract: A signal detection circuit includes: a power terminal; a first current limitation circuit; a second current limitation circuit; a current-voltage conversion circuit; a first p-channel MOS transistor including a source, a gat, and a drain; a first n-channel MOS transistor including a drain, a gate, and a source; and a second n-channel MOS transistor in which a drain is connected to a first connection point connecting the resistor with the drain of the first n-channel MOS transistor, a gate is connected to a second connection point connecting the drain of the first p-channel MOS transistor with the current-voltage conversion circuit, and a source is grounded.
    Type: Application
    Filed: February 15, 2019
    Publication date: August 22, 2019
    Inventors: Fumiyasu Utsunomiya, Takakuni Douseki, Ami Tanaka
  • Patent number: 10355588
    Abstract: A power source device includes a storage capacitor, a voltage detection circuit, input terminals, and output terminals, further includes: a boost circuit which converts a storage power provided to the input terminals to a boosted power under the condition that a stored voltage becomes equal to or greater than the predetermined voltage, and outputs the boosted power from the output terminals; and a MOS transistor which controls a supply of the boosted power to a load. One of the input terminals is connected to a gate terminal of the MOS transistor, and one of the output terminals is connected to a source terminal of the MOS transistor. The MOS transistor turns on to convert the storage power to the boosted power in the boost circuit, while the MOS transistor turns off not to convert the storage power to the boosted power in the boost circuit.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: July 16, 2019
    Assignees: ABLIC INC., THE RITSUMEIKAN TRUST
    Inventors: Fumiyasu Utsunomiya, Takakuni Douseki, Ami Tanaka
  • Patent number: 10333400
    Abstract: A boost DC-DC converter includes: an input terminal; an output terminal; a first boost circuit configured to generate, from an input power to the input terminal, a first boosted power having a higher voltage than a voltage of the input power, and outputs the generated first boosted power from the output terminal; a second boost circuit configured to generate, from the input power, a second boosted power having a higher voltage than the voltage of the input power; and a storage capacitor configured to store the second boosted power as a storage power, and supply the storage power to the first boost circuit as an operation power source. The first boost circuit is configured to start a boost operation with the storage power when a voltage of the storage power is equal to or higher than a minimum operation voltage of the first boost circuit.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: June 25, 2019
    Assignee: ABLIC INC.
    Inventors: Fumiyasu Utsunomiya, Takakuni Douseki, Ami Tanaka
  • Publication number: 20180367034
    Abstract: A power source device includes a storage capacitor, a voltage detection circuit, input terminals, and output terminals, further includes: a boost circuit which converts a storage power provided to the input terminals to a boosted power under the condition that a stored voltage becomes equal to or greater than the predetermined voltage, and outputs the boosted power from the output terminals; and a MOS transistor which controls a supply of the boosted power to a load. One of the input terminals is connected to a gate terminal of the MOS transistor, and one of the output terminals is connected to a source terminal of the MOS transistor. The MOS transistor turns on to convert the storage power to the boosted power in the boost circuit, while the MOS transistor turns off not to convert the storage power to the boosted power in the boost circuit.
    Type: Application
    Filed: June 12, 2018
    Publication date: December 20, 2018
    Inventors: Fumiyasu UTSUNOMIYA, Takakuni DOUSEKI, Ami TANAKA
  • Publication number: 20180342949
    Abstract: A power source device has: a storage unit configured to receive a generated power and store as a storage power; a boost unit configured to generate, from a storage power supplied from the storage unit, a boosted power having a higher voltage than a voltage of the storage power, and supply the boosted power to a load; and a voltage detection unit configured to output a boost operation permission signal permitting a boost operation of the boost unit to the boost unit when the storage voltage of the boost unit increases to become a voltage equal to or higher than a minimum operation voltage of the boost unit. The boost unit is configured to start the boost operation by the storage power supplied from the storage unit and operates on the boosted power generated by the boost operation as an operation power source when the boost operation permission signal is output from the voltage detection unit.
    Type: Application
    Filed: August 3, 2018
    Publication date: November 29, 2018
    Inventors: Fumiyasu Utsunomiya, Takakuni Douseki, Ami Tanaka
  • Patent number: 10094857
    Abstract: To provide a current detection circuit capable of detecting with low current consumption that a prescribed current flows into a current measuring resistor. A current detection circuit is equipped with a reference voltage circuit which has two NMOS transistors having different threshold voltages and a resistor, and generates a reference voltage at the resistor, and a comparison output circuit which is comprised of a PMOS transistor, an NMOS transistor, and a measuring resistor connected in series in a manner similar to a PMOS transistor, an NMOS transistor, and a resistor and outputs a comparison result.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: October 9, 2018
    Assignee: ABLIC INC.
    Inventor: Fumiyasu Utsunomiya
  • Patent number: 10075068
    Abstract: A power source device has: a storage unit configured to receive a generated power and store as a storage power; a boost unit configured to generate, from a storage power supplied from the storage unit, a boosted power having a higher voltage than a voltage of the storage power, and supply the boosted power to a load; and a voltage detection unit configured to output a boost operation permission signal permitting a boost operation of the boost unit to the boost unit when the storage voltage of the boost unit increases to become a voltage equal to or higher than a minimum operation voltage of the boost unit. The boost unit is configured to start the boost operation by the storage power supplied from the storage unit and operates on the boosted power generated by the boost operation as an operation power source when the boost operation permission signal is output from the voltage detection unit.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: September 11, 2018
    Assignees: ABLIC INC., THE RITSUMEIKAN TRUST
    Inventors: Fumiyasu Utsunomiya, Takakuni Douseki, Ami Tanaka