Patents by Inventor Fumiyasu Utsunomiya

Fumiyasu Utsunomiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180054666
    Abstract: Provided is a microphone which is capable of detecting a face or the like of the person and maintaining an on-state even when the face or the like of the person which has approached the microphone does not move. A power supply of the microphone turns on according to a reception of a reflected light of an emission from the first and/or second light-emitting element, which is arranged at a position around an outer periphery of the sound pickup portion of the microphone by the first and/or second light-receiving element, which is arranged at an another position around the outer periphery of the sound pickup portion of the microphone.
    Type: Application
    Filed: August 17, 2017
    Publication date: February 22, 2018
    Inventor: Fumiyasu UTSUNOMIYA
  • Patent number: 9812958
    Abstract: A voltage regulator includes an error amplifier; an output transistor; and a first transistor including a gate for inputting a reference voltage and a source for inputting an output voltage. The first transistor is configured to cause a current to flow when the output voltage becomes an irregular voltage, and a current of the output transistor is controlled based on the current flowing through the first transistor. The voltage regulator capable of improving the overshoot or undershoot of the output voltage in a wide temperature range and to reduce a delay in detection of the overshoot or undershoot.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: November 7, 2017
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventor: Fumiyasu Utsunomiya
  • Patent number: 9798346
    Abstract: Provided is a reference voltage circuit capable of outputting, with a low voltage and low current consumption, a voltage that is less liable to change due to a temperature change, and has a low GND terminal reference voltage. The reference voltage circuit includes a first NMOS transistor and a second NMOS transistor connected by a current mirror circuit, the first NMOS transistor having a gate and a drain connected to each other via a first resistor, the second NMOS transistor having a gate connected to the drain of the first NMOS transistor, and a source connected to a GND terminal via a second resistor, the second NMOS transistor having a threshold voltage lower than a threshold voltage of the first NMOS transistor, in which a reference voltage is output from the source of the second NMOS transistor.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: October 24, 2017
    Assignee: SII Semiconductor Corporation
    Inventor: Fumiyasu Utsunomiya
  • Publication number: 20170276709
    Abstract: To provide a current detection circuit capable of detecting with low current consumption that a prescribed current flows into a current measuring resistor. A current detection circuit is equipped with a reference voltage circuit which has two NMOS transistors having different threshold voltages and a resistor, and generates a reference voltage at the resistor, and a comparison output circuit which is comprised of a PMOS transistor, an NMOS transistor, and a measuring resistor connected in series in a manner similar to a PMOS transistor, an NMOS transistor, and a resistor and outputs a comparison result.
    Type: Application
    Filed: March 22, 2017
    Publication date: September 28, 2017
    Inventor: Fumiyasu UTSUNOMIYA
  • Publication number: 20170005508
    Abstract: An electronic device includes: a light detection circuit having a first light sensor and a second light sensor each generating a photocurrent by photoelectric conversion, a resistive element which allows a difference between the photocurrents generated by the first light sensor and the second light sensor to flow, and a voltage detection circuit which detects a voltage generated by the flow of the differential photocurrent through the resistive element, said electronic device being controlled in operation by an output signal of the light detection circuit; a storing unit charged each time the electronic device is operated; and a rectifying element provided between the storing unit and the resistive element. A current with which the storing unit is charged is made to flow to the resistive element through the rectifying element.
    Type: Application
    Filed: June 28, 2016
    Publication date: January 5, 2017
    Inventors: Fumiyasu UTSUNOMIYA, Takakuni DOUSEKI, Ami TANAKA
  • Patent number: 9530810
    Abstract: To provide a photoelectric conversion device which prevents a reset time from being made long when a large quantity of light is entered. There is provided a photoelectric conversion device equipped with a photodiode which causes a photoelectric current corresponding to a quantity of incident light to flow, a reset circuit which charges a parasitic capacitance of the photodiode to a reset voltage, a voltage limit circuit which prevents the voltage of the parasitic capacitance of the photodiode from being lower than a prescribed voltage, and an output circuit which outputs the voltage of the parasitic capacitance of the photodiode.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: December 27, 2016
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventor: Fumiyasu Utsunomiya
  • Patent number: 9523995
    Abstract: Provided is a reference voltage circuit with improved temperature characteristics. A current based on a current flowing through a first depletion transistor whose gate and source are connected to each other is caused to flow through a third depletion transistor having the same threshold, to thereby generate a voltage between a gate and a source of the third depletion transistor. A current based on a current flowing through a second depletion transistor whose gate and source are connected to each other is caused to flow through a fourth depletion transistor having the same threshold, to thereby generate a voltage between a gate and a source of the fourth depletion transistor. A reference voltage is generated based on a difference voltage of the two voltages, to thereby obtain a reference voltage having less voltage fluctuations with respect to a temperature change.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: December 20, 2016
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventor: Fumiyasu Utsunomiya
  • Publication number: 20160259360
    Abstract: Provided is a reference voltage circuit capable of outputting, with a low voltage and low current consumption, a voltage that is less liable to change due to a temperature change, and has a low GND terminal reference voltage. The reference voltage circuit includes a first NMOS transistor and a second NMOS transistor connected by a current mirror circuit, the first NMOS transistor having a gate and a drain connected to each other via a first resistor, the second NMOS transistor having a gate connected to the drain of the first NMOS transistor, and a source connected to a GND terminal via a second resistor, the second NMOS transistor having a threshold voltage lower than a threshold voltage of the first NMOS transistor, in which a reference voltage is output from the source of the second NMOS transistor.
    Type: Application
    Filed: March 1, 2016
    Publication date: September 8, 2016
    Inventor: Fumiyasu UTSUNOMIYA
  • Patent number: 9417645
    Abstract: Provided is a voltage regulator capable of controlling an output voltage to a predetermined voltage quickly after an overshoot occurs in the output voltage. The voltage regulator includes: an overshoot detection circuit configured to detect a voltage that is based on an output voltage of the voltage regulator, and output a current corresponding to an overshoot amount of the output voltage; and an I-V converter circuit configured to control a current flowing through an output transistor based on a current controlled by an output of an error amplifier and a current flowing from the overshoot detection circuit.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: August 16, 2016
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventor: Fumiyasu Utsunomiya
  • Patent number: 9411345
    Abstract: Provided is a voltage regulator capable of controlling an output voltage to a predetermined voltage quickly after an undershoot occurs in the output voltage. The voltage regulator includes: an undershoot detection circuit configured to detect a voltage that is based on an output voltage of the voltage regulator, and output a current corresponding to an undershoot amount of the output voltage; and an I-V converter circuit configured to control a current flowing through an output transistor based on a current controlled by an output of an error amplifier and a current flowing from the undershoot detection circuit.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: August 9, 2016
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventor: Fumiyasu Utsunomiya
  • Publication number: 20160190189
    Abstract: To provide a photoelectric conversion device which prevents a reset time from being made long when a large quantity of light is entered. There is provided a photoelectric conversion device equipped with a photodiode which causes a photoelectric current corresponding to a quantity of incident light to flow, a reset circuit which charges a parasitic capacitance of the photodiode to a reset voltage, a voltage limit circuit which prevents the voltage of the parasitic capacitance of the photodiode from being lower than a prescribed voltage, and an output circuit which outputs the voltage of the parasitic capacitance of the photodiode.
    Type: Application
    Filed: December 21, 2015
    Publication date: June 30, 2016
    Inventor: Fumiyasu UTSUNOMIYA
  • Patent number: 9236747
    Abstract: Provided is an electronic device capable of supplying desired electric power to a load so as to operate the load even in a case where charged power is minute and a voltage increase rate of a capacitor, which increases by charge, is low. The electronic device includes: a power source which has supply power less than consumption power of the load; a capacitor to be charged with the supply power; and a charge/discharge control circuit which controls charging of the capacitor and consumption of charged power of the capacitor by the load, and the charge/discharge control circuit includes: a first node to which the supply power of the power source is supplied; and a circuit which charges the capacitor with the supply power from the first node.
    Type: Grant
    Filed: April 26, 2013
    Date of Patent: January 12, 2016
    Assignee: SEIKO INSTRUMENTS INC.
    Inventors: Fumiyasu Utsunomiya, Takakuni Douseki, Ami Tanaka
  • Patent number: 9117365
    Abstract: Each device identification apparatus includes a circuit for generating a delay time and transmits a device identification code signal at a different delay time in response to a device selecting signal from a remote controller, thereby making it possible to prevent interference. Further, an infrared light amount detecting circuit is provided in a device identification apparatus or a remote controller, and an electronic device to which a device identification apparatus having a higher intensity of infrared is attached is displayed on the remote controller so that the electronic device is easily selected.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: August 25, 2015
    Assignee: SEIKO INSTRUMENTS INC.
    Inventors: Hironori Yano, Fumiyasu Utsunomiya
  • Patent number: 9063013
    Abstract: Provide is an infrared detector that has a simple configuration, has a high amplification factor, and is configured to operate at low voltage. An NMOS transistor at an output stage of a pyroelectric infrared detection element serves as a common source amplifier circuit in which a source is connected to GND via a resistor and a capacitor that are connected in parallel.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: June 23, 2015
    Assignee: Seiko Instruments Inc.
    Inventor: Fumiyasu Utsunomiya
  • Patent number: 9042733
    Abstract: The device identification apparatus includes: a remote controller signal detecting section for detecting an optical signal from a remote controller; a receiving section for receiving the optical signal from the remote controller; a signal decryption section for decrypting the optical signal received by the receiving section; and a transmitting section for transmitting a device identification signal when the optical signal is a device selecting signal, and configured such that operations of the receiving section, the signal decryption section, and the transmitting section are started in response to a detecting signal of the remote controller signal detecting section, thereby realizing a device identification apparatus in which power consumption during standby is minimized.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: May 26, 2015
    Assignee: SEIKO INSTRUMENTS INC.
    Inventors: Hironori Yano, Fumiyasu Utsunomiya
  • Publication number: 20150060671
    Abstract: Provide is an infrared detector that has a simple configuration, has a high amplification factor, and is configured to operate at low voltage. An NMOS transistor at an output stage of a pyroelectric infrared detection element serves as a common source amplifier circuit in which a source is connected to GND via a resistor and a capacitor that are connected in parallel.
    Type: Application
    Filed: August 27, 2014
    Publication date: March 5, 2015
    Inventor: Fumiyasu UTSUNOMIYA
  • Patent number: 8941413
    Abstract: The light receiving circuit includes: a photoelectric conversion element for causing a current corresponding to an amount of incident light to flow to a node; a voltage detection circuit for outputting a detection signal when a voltage of the node becomes equal to or higher than a first voltage; a reset circuit for causing, when the detection signal of the voltage detection circuit is input, the current of the photoelectric conversion element to flow to a GND terminal so that the voltage of the node becomes a second voltage lower than the first voltage, and for holding this state when the detection signal is no longer input; and a voltage increase detection circuit for detecting a fluctuation in the voltage of the node and outputting a detection result.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: January 27, 2015
    Assignee: Seiko Instruments Inc.
    Inventor: Fumiyasu Utsunomiya
  • Patent number: 8907717
    Abstract: The light receiving circuit includes: a photoelectric conversion element for causing a current corresponding to an amount of incident light to flow; a MOS transistor including a source connected to the photoelectric conversion element and a drain connected to a node, for causing the current of the photoelectric conversion element to flow to the node while maintaining a voltage of the source to a first voltage; a reset circuit for causing a current to flow from the node to a GND terminal so that a voltage of the node becomes a second voltage lower than the first voltage; a control circuit for outputting a reset signal to the reset circuit; and a voltage increase detection circuit for detecting a fluctuation in the voltage of the node and outputting a detection result.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: December 9, 2014
    Assignee: Seiko Instruments Inc.
    Inventor: Fumiyasu Utsunomiya
  • Patent number: 8884602
    Abstract: A constant current flowing through a first depletion transistor whose gate and source are connected to each other is caused to flow through a second depletion transistor having the same threshold as the first depletion transistor, to thereby generate a first voltage between a gate and a source of the second depletion transistor. The constant current of the first depletion transistor and a constant current flowing through a third depletion transistor whose gate and source are connected to each other are caused to flow through a fourth depletion transistor. A threshold of the fourth depletion transistor is the same as that of the third depletion transistor but different from that of the first depletion transistor, and hence a second voltage is generated between a gate and a source of the fourth depletion transistor. A reference voltage is generated based on a voltage difference between the first and second voltages.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: November 11, 2014
    Assignee: Seiko Instruments Inc.
    Inventor: Fumiyasu Utsunomiya
  • Publication number: 20140266313
    Abstract: The light receiving circuit includes: a photoelectric conversion element for causing a current corresponding to an amount of incident light to flow to a node; a voltage detection circuit for outputting a detection signal when a voltage of the node becomes equal to or higher than a first voltage; a reset circuit for causing, when the detection signal of the voltage detection circuit is input, the current of the photoelectric conversion element to flow to a GND terminal so that the voltage of the node becomes a second voltage lower than the first voltage, and for holding this state when the detection signal is no longer input; and a voltage increase detection circuit for detecting a fluctuation in the voltage of the node and outputting a detection result.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 18, 2014
    Applicant: Seiko Instruments Inc.
    Inventor: Fumiyasu UTSUNOMIYA