Patents by Inventor Gabriele NAVARRO
Gabriele NAVARRO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20210066395Abstract: A filament type non-volatile memory device, includes a first electrode, a second electrode and an active layer extending between the first electrode and the second electrode, the active layer electrically interconnecting the first electrode to the second electrode, the device being suitable for having: a low resistive state, in which a conducting filament electrically interconnecting the first electrode to the second electrode uninterruptedly extends from end to end through the active layer, the filament having a low electric resistance, and a highly resistive state, in which the filament is broken, the filament having a high electric resistance. The device further includes a shunt resistance electrically connected in parallel to the active layer, between the first electrode and the second electrode.Type: ApplicationFiled: August 28, 2020Publication date: March 4, 2021Inventors: Gabriele NAVARRO, Nicolas GUILLAUME, Serge BLONKOWSKI, Patrice GONON, Eric JALAGUIER
-
Patent number: 10910558Abstract: A phase-change memory cell includes, in at least a first portion, a stack of at least one germanium layer covered by at least one layer made of a first alloy of germanium, antimony, and tellurium. In a programmed state, resulting from heating a portion of the stack to a sufficient temperature, portions of layers of germanium and of the first alloy form a second alloy made up of germanium, antimony, and tellurium, where the second alloy has a higher germanium concentration than the first alloy.Type: GrantFiled: August 6, 2019Date of Patent: February 2, 2021Assignees: STMicroelectronics S.r.l., Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Paolo Giuseppe Cappelletti, Gabriele Navarro
-
Patent number: 10854673Abstract: An elementary cell includes a non-volatile resistive random-access memory mounted in series with a volatile selector device, the memory including an upper electrode, a lower electrode and a layer made of a first active material, designated memory active layer. The selector device includes an upper electrode, a lower electrode and a layer made of a second active material, designated selector active layer. The cell includes a one-piece conductor element including a first branch having one face in contact with the lower surface of the memory active layer in order to form the lower electrode of the memory, a second branch having one face in contact with the upper surface of the selector active layer in order to form the lower electrode of the memory.Type: GrantFiled: December 26, 2018Date of Patent: December 1, 2020Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventor: Gabriele Navarro
-
Patent number: 10755754Abstract: A method for programming a phase change memory cell placed in an initial crystalline state, the memory cell being called of taking a plurality of resistance values belonging to a range of values called “programming window”, the method including parameterizing a lower limit of the programming window by applying to the memory cell a single gradual writing voltage pulse or a first series of identical gradual writing voltage pulses; progressively adjusting the resistance value of the memory cell by the following operations: a gradual erasing operation during which a series of identical gradual erasing voltage pulses is applied to the memory cell; a gradual writing operation during which a second series of identical gradual writing voltage pulses is applied to the memory cell; the gradual writing and gradual erasing voltage pulses have a width less than 50 ns.Type: GrantFiled: March 8, 2019Date of Patent: August 25, 2020Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Selina La Barbera, Niccolo Castellani, Gabriele Navarro, Elisa Vianello
-
Publication number: 20200243766Abstract: A phase change resistive memory includes an upper electrode; a lower electrode; a layer made of an active material, called an active layer; the memory passing from a highly resistive state to a weakly resistive state by application of a voltage or a current between the upper electrode and the lower electrode and wherein the material of the active layer is a ternary composed of germanium Ge, tellurium Te and antimony Sb, the ternary including between 60 and 66% of antimony Sb.Type: ApplicationFiled: January 27, 2020Publication date: July 30, 2020Inventor: Gabriele NAVARRO
-
Publication number: 20200052197Abstract: A phase-change storage element including, in a first portion, a stack of amorphous layers, the thickness of each layer in the stack being smaller than or equal to 5 nm.Type: ApplicationFiled: August 5, 2019Publication date: February 13, 2020Applicant: Commissariat à l'Énergie Atomique et aux Énergies AlternativesInventors: Gabriele Navarro, Mathieu Bernard, Marie-Claire Cyrille, Chiara Sabbione
-
Publication number: 20200052199Abstract: A phase-change memory cell includes, in at least a first portion, a stack of at least one germanium layer covered by at least one layer made of a first alloy of germanium, antimony, and tellurium In a programmed state, resulting from heating a portion of the stack to a sufficient temperature, portions of layers of germanium and of the first alloy form a second alloy made up of germanium, antimony, and tellurium, where the second alloy has a higher germanium concentration than the first alloy.Type: ApplicationFiled: August 6, 2019Publication date: February 13, 2020Applicants: STMicroelectronics S.r.l., Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Paolo Giuseppe CAPPELLETTI, Gabriele NAVARRO
-
Publication number: 20200052198Abstract: A phase-change memory cell includes, in at least a first portion, a stack of at least one germanium layer covered by at least one layer made of a first alloy of germanium, antimony, and tellurium. In a programmed state, resulting from heating a portion of the stack to a sufficient temperature, portions of layers of germanium and of the first alloy form a second alloy made up of germanium, antimony, and tellurium, where the second alloy has a higher germanium concentration than the first alloy.Type: ApplicationFiled: August 6, 2019Publication date: February 13, 2020Applicants: STMicroelectronics S.r.l., Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Paolo Giuseppe CAPPELLETTI, Gabriele NAVARRO
-
Patent number: 10547002Abstract: A method for manufacturing resistive random access memories, each resistive random access memory including first and second electrodes separated by a layer of active material, the method including producing connector elements with a step Cp along a first direction, each connector element having a width Cb along the first direction; producing a plurality of first electrodes with a step Ep along the first direction, each first electrode having a first end surface and a second end surface, the second end surface having a width Eb along the first direction and an area greater than the area of the first end surface; wherein: 0<Ep?Eb?Cp?Cb and: Eb<Cp?Cb such that, for each connector element, a first electrode is in contact, via its second end surface, with the connector element, and each first electrode is only in contact, via its second end surface, with at the most one connector element.Type: GrantFiled: April 7, 2017Date of Patent: January 28, 2020Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Gabriele Navarro, Christelle Charpin-Nicolle
-
Patent number: 10529515Abstract: Selector switch provided with: a structure based on at least one phase change material placed between a first conducting element and a second conducting element, the phase change material being capable of changing state, means of heating the phase change material provided with at least one first heating electrode and at least one other heating electrode, the structure based on a phase change material being configured to form a confined active zone of the phase change material at a distance from the conducting elements.Type: GrantFiled: August 4, 2017Date of Patent: January 7, 2020Assignee: Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Gabriele Navarro, Damien Saint-Patrice, Alexandre Leon, Vincent Puyal, Bruno Reig
-
Publication number: 20190318781Abstract: A method for programming a phase change memory cell placed in an initial crystalline state, the memory cell being called of taking a plurality of resistance values belonging to a range of values called “programming window”, the method including parameterizing a lower limit of the programming window by applying to the memory cell a single gradual writing voltage pulse or a first series of identical gradual writing voltage pulses; progressively adjusting the resistance value of the memory cell by the following operations: a gradual erasing operation during which a series of identical gradual erasing voltage pulses is applied to the memory cell; a gradual writing operation during which a second series of identical gradual writing voltage pulses is applied to the memory cell; the gradual writing and gradual erasing voltage pulses have a width less than 50 ns.Type: ApplicationFiled: March 8, 2019Publication date: October 17, 2019Inventors: Selina LA BARBERA, Niccolo CASTELLANI, Gabriele NAVARRO, Elisa VIANELLO
-
Publication number: 20190198570Abstract: An elementary cell includes a non-volatile resistive random-access memory mounted in series with a volatile selector device, the memory including an upper electrode, a lower electrode and a layer made of a first active material, designated memory active layer. The selector device includes an upper electrode, a lower electrode and a layer made of a second active material, designated selector active layer. The cell includes a one-piece conductor element including a first branch having one face in contact with the lower surface of the memory active layer in order to form the lower electrode of the memory, a second branch having one face in contact with the upper surface of the selector active layer in order to form the lower electrode of the memory.Type: ApplicationFiled: December 26, 2018Publication date: June 27, 2019Inventor: Gabriele NAVARRO
-
Patent number: 10056266Abstract: A method for manufacturing a resistive device, includes depositing a first electrically conductive layer on a substrate; forming an etching mask on the first conductive layer; etching the first conductive layer through the mask, such as to obtain a plurality of electrically conductive pillars separated from one another; and forming storage elements with variable electrical resistance at the tops of the electrically conductive pillars, such that each storage element is supported by one of the electrically conductive pillars, the step of forming the storage elements including the following operations depositing a first layer by non-collimated cathode sputtering at normal incidence relative to the substrate; and depositing a second layer on the first layer by cathode sputtering, the second layer including a first chemical species sputtered at an oblique incidence.Type: GrantFiled: October 15, 2015Date of Patent: August 21, 2018Assignees: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS), UNIVERSITE GRENOBLE ALPESInventors: Bernard Dieny, Maxime Darnon, Gabriele Navarro, Olivier Joubert
-
Patent number: 9941471Abstract: A method for manufacturing a PCRAM memory includes forming in a first dielectric layer arranged on a substrate, which includes bottom electrodes, a first rectilinear trench opening onto the set of electrodes; depositing a first active layer in the first trench, such that the first active layer is in electrical contact with the electrodes; covering the first active layer with a second dielectric layer; etching, in the second and second dielectric layers and the first active layer, additional rectilinear trenches oriented perpendicularly to the first trench, to obtain a group of memory devices each including a portion of the first active layer in electrical contact with one of the electrodes; filling the additional trenches with a sacrificial dielectric material; performing an anisotropic etching of the sacrificial material to expose a side surface of each portion of the first active layer; and covering the side surface with a second active layer.Type: GrantFiled: November 10, 2016Date of Patent: April 10, 2018Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventor: Gabriele Navarro
-
Patent number: 9934922Abstract: RF commutator including: a phase change material (7) arranged between a first conducting element (2) and a second conducting element (4), means of heating (11, 13) the phase change material provided with a first electrode (11) and a second electrode (13), the means of heating being capable of modifying the state of the phase change material (7) by injection of an electrical activation signal between the first electrode and the second electrode, at least one given electrode (11, 13) among the first electrode (11) and second electrode (13) comprising a conducting part (15a) arranged between the first conducting element (2) and the second conducting element (4), zones of the phase change material being laid out between the first conducting element (2) and the second conducting element (4) and being arranged on either side of this conducting part (15a).Type: GrantFiled: February 28, 2017Date of Patent: April 3, 2018Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Bruno Reig, Alexandre Leon, Gabriele Navarro, Vincent Puyal, Damien Saint-Patrice
-
Publication number: 20180005786Abstract: Selector switch provided with: a structure based on at least one phase change material placed between a first conducting element and a second conducting element, the phase change material being capable of changing state, means of heating the phase change material provided with at least one first heating electrode and at least one other heating electrode, the structure based on a phase change material being configured to form a confined active zone of the phase change material at a distance from the conducting elements.Type: ApplicationFiled: August 4, 2017Publication date: January 4, 2018Applicant: Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Gabriele NAVARRO, Damien SAINT-PATRICE, Alexandre LEON, Vincent PUYAL, Bruno REIG
-
Publication number: 20170309497Abstract: A method for manufacturing a resistive device, includes depositing a first electrically conductive layer on a substrate; forming an etching mask on the first conductive layer; etching the first conductive layer through the mask, such as to obtain a plurality of electrically conductive pillars separated from one another; and forming storage elements with variable electrical resistance at the tops of the electrically conductive pillars, such that each storage element is supported by one of the electrically conductive pillars, the step of forming the storage elements including the following operations depositing a first layer by non-collimated cathode sputtering at normal incidence relative to the substrate; and depositing a second layer on the first layer by cathode sputtering, the second layer including a first chemical species sputtered at an oblique incidence.Type: ApplicationFiled: October 15, 2015Publication date: October 26, 2017Inventors: Bernard DIENY, Maxime DARNON, Gabriele NAVARRO, Olivier JOUBERT
-
Publication number: 20170294580Abstract: A method for manufacturing resistive random access memories, each resistive random access memory including first and second electrodes separated by a layer of active material, the method including producing connector elements with a step Cp along a first direction, each connector element having a width Cb along the first direction; producing a plurality of first electrodes with a step Ep along the first direction, each first electrode having a first end surface and a second end surface, the second end surface having a width Eb along the first direction and an area greater than the area of the first end surface; wherein: 0<Ep?Eb?Cp?Cb and:Eb<Cp?Cb such that, for each connector element, a first electrode is in contact, via its second end surface, with the connector element, and each first electrode is only in contact, via its second end surface, with at the most one connector element.Type: ApplicationFiled: April 7, 2017Publication date: October 12, 2017Inventors: Gabriele NAVARRO, Christelle CHARPIN-NICOLLE
-
Publication number: 20170141307Abstract: A method for manufacturing a PCRAM memory includes forming in a first dielectric layer arranged on a substrate, which includes bottom electrodes, a first rectilinear trench opening onto the set of electrodes; depositing a first active layer in the first trench, such that the first active layer is in electrical contact with the electrodes; covering the first active layer with a second dielectric layer; etching, in the second and second dielectric layers and the first active layer, additional rectilinear trenches oriented perpendicularly to the first trench, to obtain a group of memory devices each including a portion of the first active layer in electrical contact with one of the electrodes; filling the additional trenches with a sacrificial dielectric material; performing an anisotropic etching of the sacrificial material to expose a side surface of each portion of the first active layer; and covering the side surface with a second active layer.Type: ApplicationFiled: November 10, 2016Publication date: May 18, 2017Inventor: Gabriele NAVARRO