Patents by Inventor Gandhi

Gandhi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200128072
    Abstract: Migrating and delivering datasets to mobile Internet of Things (IoT) devices is provided. A time is predicted for delivery of one or more datasets to a target intermediate data delivery destination closest to a current geographic location of a mobile IoT device based on context and type of each detected data delivery event and the current geographic location of the mobile IoT device. The one or more datasets are migrated to the target intermediate data delivery destination closest to the current geographic location of the mobile IoT device according to the predicted time. The one or more datasets are delivered to the mobile IoT device from the target intermediate data delivery destination closest to the current geographic location of the mobile IoT device based on the context and the type of each detected data delivery event that corresponds to a particular dataset in the one or more datasets.
    Type: Application
    Filed: October 23, 2018
    Publication date: April 23, 2020
    Inventors: Craig M. Trim, Martin G. Keen, Gandhi Sivakumar, Kushal Patel, Sarvesh Patel
  • Patent number: 10631083
    Abstract: A speaker assembly can include a speaker and one or more actuators operatively positioned to cause the position and/or the orientation of the speaker to be adjusted. The one or more actuators include a bladder. The bladder can include a flexible casing. The bladder can define a fluid chamber. The fluid chamber can contain a dielectric fluid. The one or more actuators can include a first conductor and a second conductor operatively positioned on opposite portions of the bladder. The one or more actuators can be configured such that, when electrical energy is supplied to the first conductor and the second conductor, the first conductor and the second conductor can become oppositely charged. As a result, the first conductor and the second conductor are electrostatically attracted toward each other to cause at least a portion of the dielectric fluid to be displaced to an outer peripheral region of the fluid chamber.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: April 21, 2020
    Assignee: Toyota Motor Engineering & Manufacturing North America, Inc.
    Inventors: Umesh N. Gandhi, Danil V. Prokhorov, Michael Paul Rowe, Ryohei Tsuruta
  • Patent number: 10628853
    Abstract: Location-based filtering and advertising enhancements for merged browsing of network content are described herein. In various embodiments, a client device may obtain its geographic location and provide that location to a server for filtering by the server of network content fragment suggestions based at least in part on the location. The client device may then receive some or all of the filtered suggestions for utilization in merged browsing. In some embodiments, a server may further receive an indicator of content being browsed. In response, the server may determine network content fragment suggestions, and may also determine an additional suggestion or prioritize a suggestion based an advertiser's interest. The server may then provide the suggestions and/or prioritization to the client device. In various embodiments, the server may also provide the advertisement(s) for display in a user interface of the client device along with the (prioritized) suggestions.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: April 21, 2020
    Assignee: Intel Corporation
    Inventors: Robert Ennals, Prashant Gandhi
  • Patent number: 10629732
    Abstract: A device comprises an array comprising rows and columns of elevationally-extending transistors. An access line interconnects multiple of the elevationally-extending transistors along individual of the rows. The transistors individually comprise an upper source/drain region, a lower source/drain region, and a channel region extending elevationally there-between. The channel region comprises an oxide semiconductor. A transistor gate is operatively laterally-proximate the channel region and comprises a portion of an individual of the access lines. Intra-row-insulating material is longitudinally between immediately-intra-row-adjacent of the elevationally-extending transistors. Inter-row-insulating material is laterally between immediately-adjacent of the rows of the elevationally-extending transistors. At least one of the intra-row-insulating material and the inter-row-insulating material comprises void space. Other embodiments, including method embodiments, are disclosed.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: April 21, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Scott E. Sills, Kirk D. Prall, Durai Vishak Nirmal Ramaswamy, Ramanathan Gandhi
  • Publication number: 20200118149
    Abstract: Methods, systems, and computer program products are included for categorizing and filtering content. A comment is stored in one or more data structures. The one or more data structures are modified to associate the comment with a tag and a password. The amount of comments that are associated with the tag are determined and compared with a threshold amount of comments. Based on the amount of comments exceeding the threshold, access is restricted to the comments that are associated with the tag.
    Type: Application
    Filed: October 14, 2019
    Publication date: April 16, 2020
    Inventor: Saumil Gandhi
  • Publication number: 20200118060
    Abstract: A system and method for intelligent classification for product pedigree identification are presented. A transactional block may be dynamically created for recording both pedigree information for one or more supply ingredients at a time of origin and one or more parameters relating to the one or more supply ingredients at each temporal event. One or more transactional blocks may be linked via a shared ledger according to the one or more supply ingredients and the one or more parameters.
    Type: Application
    Filed: October 12, 2018
    Publication date: April 16, 2020
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Maharaj MUKHERJEE, Faried ABRAHAMS, Gandhi SIVAKUMAR, Amol DHONDSE, Anand PIKLE
  • Publication number: 20200117612
    Abstract: An example method of managing memory in a computer system implementing non-uniform memory access (NUMA) by a plurality of sockets each having a processor component and a memory component is described. The method includes replicating page tables for an application executing on a first socket of the plurality of sockets across each of the plurality of sockets; associating metadata for pages of the memory storing the replicated page tables in each of the plurality of sockets; and updating the replicated page tables using the metadata to locate the pages of the memory that store the replicated page tables.
    Type: Application
    Filed: January 24, 2019
    Publication date: April 16, 2020
    Inventors: Jayneel GANDHI, Reto ACHERMANN
  • Patent number: 10623214
    Abstract: The present disclosure relates to system(s) and method(s) for multi-level amplitude modulation and demodulation. The system accepts a frame delimiter signal, when a comparator is triggered upon receiving the frame delimiter signal from a transmitter. Further, the system receives modulated data associated with a data frame from the transmitter. In one aspect, the modulated data may be generated by modulation of the data frame using a set of three amplitude levels. Upon receiving the modulated data, the system demodulates the modulated data to retrieve the data frame along with the frame delimiter signal, which can be used for successive digital logic elements for enhanced performance.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: April 14, 2020
    Assignee: HCL TECHNOLOGIES LIMITED
    Inventor: Gandhi Karuna K T
  • Patent number: 10622290
    Abstract: In a described example, a packaged device includes a substrate having a device mounting surface including a first layer of conductive material having a first thickness less than a substrate thickness, the substrate having a second layer of the conductive material having a second thickness less than the substrate thickness. A first semiconductor device is mounted to a first area of the device mounting surface; and a second semiconductor device is mounted to a second area on the device mounting surface and spaced from the first semiconductor device. At least two connectors are formed of the first layer of the substrate having first ends coupled to one of first bond pads on the first semiconductor device and the at least two connectors having second ends coupled to one of second bond pads on the second semiconductor device.
    Type: Grant
    Filed: July 11, 2018
    Date of Patent: April 14, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Siva Prakash Gurrum, Manu J. Prakuzhy, Saumya Gandhi
  • Patent number: 10623119
    Abstract: The present technology pertain to a continuous calibration performed by real-time location system controller to continuously calibrate itself to handle data received from network infrastructure devices more accurately, and to use this continuous calibration to accurately predict a location of a portable computing device.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: April 14, 2020
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Jerome Henry, Indermeet Singh Gandhi, Robert Edgar Barton, Vishal Satyendra Desai
  • Publication number: 20200111919
    Abstract: A device comprises a vertical transistor. The vertical transistor comprises a pillar structure, at least one gate electrode, and a dielectric material. The pillar structure comprises a source region, a drain region, and a channel region. The source region and the drain region each individually comprise at least one electrically conductive material configured to inhibit hydrogen permeation therethrough. The channel region comprises a semiconductive material vertically between the source region and the drain region. The at least one gate electrode laterally neighbors the channel region of the semiconductive structure. The dielectric material is laterally between the semiconductive structure and the at least one gate electrode. Additional devices, and related electronic systems and methods are also disclosed.
    Type: Application
    Filed: October 8, 2019
    Publication date: April 9, 2020
    Inventors: Kamal M. Karda, Ramanathan Gandhi, Yi Fang Lee, Haitao Liu, Durai Vishak Nirmal Ramaswamy, Scott E. Sills
  • Publication number: 20200111907
    Abstract: A device comprises a vertical transistor. The vertical transistor comprises a semiconductive pillar, at least one gate electrode, a gate dielectric material, and void spaces. The semiconductive pillar comprises a source region, a drain region, and a channel region extending vertically between the source region and the drain region, the channel region comprising a semiconductive material having a band gap greater than 1.65 electronvolts. The at least one gate electrode laterally neighbors the semiconductive pillar. The gate dielectric material is laterally between the semiconductive pillar and the at least one gate electrode. The void spaces are vertically adjacent the gate dielectric material and laterally intervening between the at least one gate electrode and each of the source region and the drain region of the semiconductive pillar. Related electronic systems and methods are also disclosed.
    Type: Application
    Filed: October 8, 2019
    Publication date: April 9, 2020
    Inventors: Kamal M. Karda, Ramanathan Gandhi, Hong Li, Haitao Liu, Durai Vishak Nirmal Ramaswamy, Sanh D. Tang, Scott E. Sills
  • Publication number: 20200111920
    Abstract: A method of forming a device comprises forming dielectric structures over other dielectric structures overlying conductive contact structures, the dielectric structures separated from one another by trenches and laterally extending orthogonal to the other dielectric structures and the conductive contact structures. Conductive gate structures are formed on exposed side surfaces of the dielectric structures within the trenches. Dielectric oxide structures are formed on exposed side surfaces of the conductive gate structures within the trenches. Exposed portions of the other dielectric structures are removed to form isolation structures. Semiconductive pillars are formed on exposed side surfaces of the dielectric oxide structures and the isolation structures within the trenches. The semiconductive pillars are in electrical contact with the conductive contact structures. Additional conductive contact structures are formed on upper surfaces of the semiconductive pillars.
    Type: Application
    Filed: October 8, 2019
    Publication date: April 9, 2020
    Inventors: Scott E. Sills, Ramanathan Gandhi, Durai Vishak Nirmal Ramaswamy
  • Publication number: 20200110795
    Abstract: In some embodiments, a computing system computes a hierarchical entity data model to facilitate autocompleting forms by generating an electronic schema extraction from an electronic form lacking data for one or more fields. The computing system generates an electronic schema including an input category and input field elements. The computing system accesses a hierarchical entity-data model including and entity category and entity-data elements. The computing system identifies associations between the entity category and input category based on semantic matching including text of an entity category label and an input field category label or matching a number of fields within an entity category to an input category. The computing system verifies the association by applying a natural language processing engine to the input field elements and the entity-data elements. The computing system autocompletes one or more input field elements with entity data from one or more of the entity-data elements.
    Type: Application
    Filed: October 5, 2018
    Publication date: April 9, 2020
    Inventors: Mayank Gupta, Mandeep Gandhi
  • Publication number: 20200111908
    Abstract: A transistor comprises a first conductive contact, a heterogeneous channel comprising at least one oxide semiconductor material over the first conductive contact, a second conductive contact over the heterogeneous channel, and a gate electrode laterally neighboring the heterogeneous channel. A device, a method of forming a device, a memory device, and an electronic system are also described.
    Type: Application
    Filed: October 8, 2019
    Publication date: April 9, 2020
    Inventors: Scott E. Sills, Ramanathan Gandhi, Durai Vishak Nirmal Ramaswamy, Yi Fang Lee, Kamal M. Karda
  • Publication number: 20200111915
    Abstract: A device comprises an array comprising rows and columns of elevationally-extending transistors. An access line interconnects multiple of the elevationally-extending transistors along individual of the rows. The transistors individually comprise an upper source/drain region, a lower source/drain region, and a channel region extending elevationally there-between. The channel region comprises an oxide semiconductor. A transistor gate is operatively laterally-proximate the channel region and comprises a portion of an individual of the access lines. Intra-row-insulating material is longitudinally between immediately-intra-row-adjacent of the elevationally-extending transistors. Inter-row-insulating material is laterally between immediately-adjacent of the rows of the elevationally-extending transistors. At least one of the intra-row-insulating material and the inter-row-insulating material comprises void space. Other embodiments, including method embodiments, are disclosed.
    Type: Application
    Filed: October 9, 2018
    Publication date: April 9, 2020
    Applicant: Micron Technology, Inc.
    Inventors: Scott E. Sills, Kirk D. Prall, Durai Vishak Nirmal Ramaswamy, Ramanathan Gandhi
  • Patent number: 10616391
    Abstract: A method and system for providing a second line service (“SLS”) feature to a subscriber using a telecommunications device (“TD”) which includes receiving at a switch on the network of the subscriber's primary service provider a communication made up of a trigger and a directory number. When the communication is received at the primary service provider's switch, the switch parses the communication and detects the trigger. Once the switch has received the communication, the switch additionally transmits a query message to a SLS platform that manages the SLS feature. As a result of the switch's query message transmission, the switch receives a reply to the query message from the SLS platform. Based at least in part on the reply to the query message, the switch can route the communication such that the switch connects one or multiple voice channel circuit between the subscriber's TD and the terminating TD.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: April 7, 2020
    Assignee: Movius Interactive Corporation
    Inventors: George Backhaus, Philip Lowman, Jingnesh Gandhi, Julio Gonzalez, John Green, Paul Rubenstein, Mike Speanburg
  • Publication number: 20200105642
    Abstract: A chip package assembly and method for fabricating the same are provided which utilize a plurality of extra-die heat transfer posts for improved thermal management. In one example, a chip package assembly is provided that includes a first integrated circuit (IC) die mounted to a substrate, a cover disposed over the first IC die, and a plurality of extra-die conductive posts disposed between the cover and substrate. The extra-die conductive posts provide a heat transfer path between the cover and substrate that is laterally outward of the first IC die.
    Type: Application
    Filed: September 28, 2018
    Publication date: April 2, 2020
    Applicant: Xilinx, Inc.
    Inventors: Jaspreet Singh Gandhi, Gamal Refai-Ahmed, Henley Liu, Myongseob Kim, Tien-Yu Lee, Suresh Ramalingam, Cheang-Whang Chang
  • Patent number: 10608927
    Abstract: An example method is provided and may include steps of configuring a HeNB with plurality of global eNode B identities (global eNB IDs), where each global eNB ID is associated with one of a plurality of HeNB gateways (HeNB-GWs), and broadcasting a first global eNB ID by the HeNB when the HeNB is served by a first HeNB-GW. When/if the HeNB loses connectivity with the first HeNB-GW, the method provides a step of switching the broadcasting from the first global eNB ID to a second global eNB ID and re-parenting the HeNB, now broadcasting or is configured to start/continue broadcasting the second global eNB ID, from being served by the first HeNB-GW to being served by a second HeNB-GW.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: March 31, 2020
    Assignee: Cisco Technology, Inc.
    Inventor: Indermeet Singh Gandhi
  • Patent number: 10609575
    Abstract: Aspects of the subject disclosure may include, for example, initiating first and second groups of communication sessions according to testing criteria where the first group of communication sessions is established via a local area wireless access technology utilizing the distributed antenna system and the second group of communication sessions is established via the second radio access technology utilizing the distributed antenna system, and measuring performance data for the first and second groups of communication sessions according to the testing criteria. Other embodiments are disclosed.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: March 31, 2020
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: Shane Michael Elliott, Mehul Gandhi, Ryan Tidwell, Sreekanth Bolloju, Ravindra Dravid, Shoubha Chakrabarty, Amol Kaveeshwar