Patents by Inventor Ganesh Balasubramanian

Ganesh Balasubramanian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210143029
    Abstract: A system may include a main line for delivering a first gas, and a sensor for measuring a concentration of a precursor in the first gas delivered through the main line. The system may further include first and second sublines for providing fluid access to first and second processing chambers, respectively. The first subline may include a first flow controller for controlling the first gas flowed through the first subline. The second subline may include a second flow controller for controlling the first gas flowed through the second subline. A delivery controller may be configured to control the first and second flow controllers based on the measured concentration of the precursor to deliver a first mixture of the first gas and a second gas and a second mixture of the first and second gases into the first and second semiconductor processing chambers, respectively.
    Type: Application
    Filed: November 11, 2020
    Publication date: May 13, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Diwakar Kedlaya, Fang Ruan, Zubin Huang, Ganesh Balasubramanian, Kaushik Alayavalli, Martin Seamons, Kwangduk Lee, Rajaram Narayanan, Karthik Janakiraman
  • Patent number: 11004710
    Abstract: Methods and systems of detection of wafer placement error in a semiconductor processing chamber are disclosed. Methods and systems of interdiction are also disclosed to prevent hardware and wafer damage during semiconductor fabrication if and when a wafer placement error is detected. The method—is based on measuring a slope of current in an electrostatic chuck (ESC), which is correlated to lack of contact between the wafer and the ESC. Wafer placement detection at an early stage, when a heater and an ESC are being set up, gives the option of stopping the process before high power RF plasma is created.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: May 11, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Hemant Mungekar, Ganesh Balasubramanian
  • Publication number: 20210108309
    Abstract: Implementations of the present disclosure generally relate to hardmask films and methods for depositing hardmask films. More particularly, implementations of the present disclosure generally relate to tungsten carbide hardmask films and processes for depositing tungsten carbide hardmask films. In one implementation, a method of forming a tungsten carbide film is provided. The method comprises forming a tungsten carbide initiation layer on a silicon-containing surface of a substrate at a first deposition rate. The method further comprises forming a tungsten carbide film on the tungsten carbide initiation layer at a second deposition rate, wherein the second deposition rate is greater than the first deposition rate.
    Type: Application
    Filed: January 3, 2019
    Publication date: April 15, 2021
    Inventors: Vivek Bharat SHAH, Anup Kumar SINGH, Bhaskar KUMAR, Ganesh BALASUBRAMANIAN
  • Patent number: 10971390
    Abstract: The present disclosure generally relates to substrate supports for semiconductor processing. In one embodiment, a substrate support is provided. The substrate support includes a body comprising a substrate chucking surface, an electrode disposed within the body, a plurality of substrate supporting features formed on the substrate chucking surface, wherein the number of substrate supporting features increases radially from a center of the substrate chucking surface to an edge of the substrate chucking surface, and a seasoning layer formed on the plurality of the substrate supporting features, the seasoning layer comprising a silicon nitride.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: April 6, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Abdul Aziz Khaja, Liangfa Hu, Sudha S. Rathi, Ganesh Balasubramanian
  • Publication number: 20210047730
    Abstract: Exemplary semiconductor processing chambers may include a showerhead. The chambers may also include a substrate support characterized by a first surface facing the showerhead. The first surface may be configured to support a semiconductor substrate. The substrate support may define a recessed pocket centrally located within the first surface. The recessed pocket may be defined by an outer radial wall characterized by a height from the first surface within the recessed pocket that is greater than or about 150% of a thickness of the semiconductor substrate.
    Type: Application
    Filed: August 6, 2020
    Publication date: February 18, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Sai Susmita Addepalli, Yue Chen, Zhijun Jiang, Shailendra Srivastava, Nikhil Sudhindrarao Jorapur, Daemian Raj Benjamin Raj, Greg Chichkanoff, Qiang Ma, Abhigyan Keshri, Xinhai Han, Ganesh Balasubramanian, Deenesh Padhi
  • Patent number: 10910227
    Abstract: An apparatus for plasma processing a substrate is provided. The apparatus comprises a processing chamber, a substrate support disposed in the processing chamber, and a lid assembly coupled to the processing chamber. The lid assembly comprises a conductive gas distributor coupled to a power source. A tuning electrode may be disposed between the conductive gas distributor and the chamber body for adjusting a ground pathway of the plasma. A second tuning electrode may be coupled to the substrate support, and a bias electrode may also be coupled to the substrate support.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: February 2, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Juan Carlos Rocha-Alvarez, Amit Kumar Bansal, Ganesh Balasubramanian, Jianhua Zhou, Ramprakash Sankarakrishnan, Mohamad A. Ayoub, Jian J. Chen
  • Publication number: 20210015901
    Abstract: The present invention concerns methods comprising co-administration of pegfilgrastim and romiplostim for treatment of diseases and conditions characterized by low neutrophil levels (neutropenia) and/or low platelet levels (thrombocytopenia). The present invention concerns an enhanced effect on neutrophil levels and on platelet levels resulting from co-administration of pegfilgrastim and romiplostim. The present invention further concerns a method of treating a patient who has been exposed to radiation, which comprises administering romiplostim at a dose of about 1 to about 10 ?g/kg. The invention further concerns such methods wherein a single dose of romiplostim is administered to the patient and wherein romiplostim is administered about 24 hours or less after the radiation exposure. The invention further concerns treatment with romiplostim and pegfilgrastim for radiation exposure.
    Type: Application
    Filed: March 11, 2019
    Publication date: January 21, 2021
    Applicant: Amgen Inc.
    Inventors: Ganesh BALASUBRAMANIAN, Deborah I. BUNIN, Polly Y. CHANG, Simon AUTHIER, Sameer V. DOSHI, James BAKKE, Janet GAHAGEN, Karen WONG, Mark FIELDEN
  • Patent number: 10892143
    Abstract: Implementations of the present disclosure provide methods for treating a processing chamber. In one implementation, the method includes purging a 300 mm substrate processing chamber, without the presence of a substrate, by flowing a purging gas into the substrate processing chamber at a flow rate of about 0.14 sccm/mm2 to about 0.33 sccm/mm2 and a chamber pressure of about 1 Torr to about 30 Torr, with a throttle valve of a vacuum pump system of the substrate processing chamber in a fully opened position, wherein the purging gas is chemically reactive with deposition residue on exposed surfaces of the substrate processing chamber.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: January 12, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Vivek Bharat Shah, Bhaskar Kumar, Anup Kumar Singh, Ganesh Balasubramanian
  • Publication number: 20200399756
    Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.
    Type: Application
    Filed: September 3, 2020
    Publication date: December 24, 2020
    Inventors: Nagarajan RAJAGOPALAN, Xinhai HAN, Michael Wenyoung TSIANG, Masaki OGATA, Zhijun JIANG, Juan Carlos ROCHA-ALVAREZ, Thomas NOWAK, Jianhua ZHOU, Ramprakash SANKARAKRISHNAN, Amit Kumar BANSAL, Jeongmin LEE, Todd EGAN, Edward BUDIARTO, Dmitriy PANASYUK, Terrance Y. LEE, Jian J. CHEN, Mohamad A. AYOUB, Heung Lak PARK, Patrick REILLY, Shahid SHAIKH, Bok Hoen KIM, Sergey STARIK, Ganesh BALASUBRAMANIAN
  • Publication number: 20200388518
    Abstract: Methods and systems of detection of wafer placement error in a semiconductor processing chamber are disclosed. Methods and systems of interdiction are also disclosed to prevent hardware and wafer damage during semiconductor fabrication if and when a wafer placement error is detected. The method-is based on measuring a slope of current in an electrostatic chuck (ESC), which is correlated to lack of contact between the wafer and the ESC. Wafer placement detection at an early stage, when a heater and an ESC are being set up, gives the option of stopping the process before high power RF plasma is created.
    Type: Application
    Filed: June 4, 2019
    Publication date: December 10, 2020
    Inventors: Hemant MUNGEKAR, Ganesh BALASUBRAMANIAN
  • Publication number: 20200381222
    Abstract: Embodiments of the present disclosure generally relate to apparatuses for reducing particle contamination on substrates in a plasma processing chamber. In one or more embodiments, an edge ring is provided and includes a top surface, a bottom surface opposite the top surface and extending radially outward, an outer vertical wall extending between and connected to the top surface and the bottom surface, an inner vertical wall opposite the outer vertical wall, an inner lip extending radially inward from the inner vertical wall, and an inner step disposed between and connected to the inner wall and the bottom surface. During processing, the edge ring shifts the high plasma density zone away from the edge area of the substrate to avoid depositing particles on the substrate when the plasma is de-energized.
    Type: Application
    Filed: August 18, 2020
    Publication date: December 3, 2020
    Inventors: Bhaskar KUMAR, Prashanth KOTHNUR, Sidharth BHATIA, Anup Kumar SINGH, Vivek Bharat SHAH, Ganesh BALASUBRAMANIAN, Changgong WANG
  • Publication number: 20200365370
    Abstract: A processing system comprises a chamber body, a substrate support and a lid assembly. The substrate support is located in the chamber body and comprises a first electrode. The lid assembly is positioned over the chamber body and defines a processing volume. The lid assembly comprises a faceplate, a second electrode positioned between the faceplate and the chamber body, and an insulating member positioned between the second electrode and the processing volume. A power supply system is coupled to the first electrode and the faceplate and is configured to generate a plasma in the processing volume.
    Type: Application
    Filed: April 23, 2020
    Publication date: November 19, 2020
    Inventors: Fei WU, Abdul Aziz KHAJA, Sungwon HA, Vinay K. PRABHAKAR, Ganesh BALASUBRAMANIAN
  • Publication number: 20200362457
    Abstract: The present disclosure relates to systems and methods for reducing the formation of hardware residue and minimizing secondary plasma formation during substrate processing in a process chamber. The process chamber may include a gas distribution member configured to flow a first gas into a process volume and generate a plasma therefrom. A second gas is supplied into a lower region of the process volume. Further, an exhaust port is disposed in the lower region to remove excess gases or by-products from the process volume during or after processing.
    Type: Application
    Filed: April 24, 2020
    Publication date: November 19, 2020
    Inventors: Liangfa HU, Prashant Kumar KULSHRESHTHA, Anjana M. PATEL, Abdul Aziz KHAJA, Viren KALSEKAR, Vinay K. PRABHAKAR, Satya Teja Babu THOKACHICHU, Byung Seok KWON, Ratsamee LIMDULPAIBOON, Kwangduk Douglas LEE, Ganesh BALASUBRAMANIAN
  • Publication number: 20200357668
    Abstract: Embodiments of the present disclosure relate to a method and an apparatus for monitoring plasma behavior inside a plasma processing chamber. In one example, a method for monitoring plasma behavior includes acquiring at least one image of a plasma, and determining a plasma parameter based on the at least one image.
    Type: Application
    Filed: July 28, 2020
    Publication date: November 12, 2020
    Inventors: Sidharth BHATIA, Edward P. HAMMOND, IV, Bhaskar KUMAR, Anup Kumar SINGH, Vivek Bharat SHAH, Ganesh BALASUBRAMANIAN
  • Publication number: 20200350146
    Abstract: A method and apparatus for operating a plasma processing chamber includes performing a plasma process at a process pressure and a pressure power to generate a plasma. A first ramping-down stage starts in which the process power and the process pressure are ramped down substantially simultaneously to an intermediate power level and an intermediate pressure level, respectively. The intermediate power level and intermediate pressure level are preselected so as to raise a plasma sheath boundary above a threshold height from a surface of a substrate. A purge gas is flowed from a showerhead assembly at a sufficiently high rate to sweep away contaminant particles trapped in the plasma such that one or more contaminant particles move outwardly of an edge of the substrate. A second ramping-down stage starts where the intermediate power level and the intermediate pressure level decline to a zero level and a base pressure, respectively.
    Type: Application
    Filed: July 13, 2020
    Publication date: November 5, 2020
    Inventors: Bhaskar KUMAR, Anup Kumar SINGH, Vivek Bharat SHAH, Sidharth BHATIA, Ganesh BALASUBRAMANIAN
  • Patent number: 10793954
    Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: October 6, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Nagarajan Rajagopalan, Xinhai Han, Michael Wenyoung Tsiang, Masaki Ogata, Zhijun Jiang, Juan Carlos Rocha-Alvarez, Thomas Nowak, Jianhua Zhou, Ramprakash Sankarakrishnan, Amit Kumar Bansal, Jeongmin Lee, Todd Egan, Edward Budiarto, Dmitriy Panasyuk, Terrance Y. Lee, Jian J. Chen, Mohamad A. Ayoub, Heung Lak Park, Patrick Reilly, Shahid Shaikh, Bok Hoen Kim, Sergey Starik, Ganesh Balasubramanian
  • Patent number: 10790121
    Abstract: Implementations of the present disclosure generally relate to an apparatus for reducing particle contamination on substrates in a plasma processing chamber. The apparatus for reduced particle contamination includes a chamber body, a lid coupled to the chamber body. The chamber body and the lid define a processing volume therebetween. The apparatus also includes a substrate support disposed in the processing volume and an edge ring. The edge ring includes an inner lip disposed over a substrate, a top surface connected to the inner lip, a bottom surface opposite the top surface and extending radially outward from the substrate support, and an inner step between the bottom surface and the inner lip. To avoid depositing the particles on the substrate being processed when the plasma is de-energized, the edge ring shifts the high plasma density zone away from the edge area of the substrate.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: September 29, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Bhaskar Kumar, Prashanth Kothnur, Sidharth Bhatia, Anup Kumar Singh, Vivek Bharat Shah, Ganesh Balasubramanian, Changgong Wang
  • Publication number: 20200286716
    Abstract: The present disclosure relates to methods and systems for chucking in substrate processing chambers. In one implementation, a method of chucking one or more substrates in a substrate processing chamber includes applying a chucking voltage to a pedestal. A substrate is disposed on a support surface of the pedestal. The method also includes ramping the chucking voltage from the applied voltage, detecting an impedance shift while ramping the chucking voltage, determining a corresponding chucking voltage at which the impedance shift occurs, and determining a refined chucking voltage based on the impedance shift and the corresponding chucking voltage.
    Type: Application
    Filed: February 27, 2020
    Publication date: September 10, 2020
    Inventors: Bhaskar KUMAR, Ganesh BALASUBRAMANIAN, Vivek Bharat SHAH, Jiheng ZHAO
  • Patent number: 10755903
    Abstract: A method of cleaning a remote plasma source includes supplying a first cycle of one or more first cleaning gases to a remote plasma source. The method includes supplying a second cycle of one or more second cleaning gases to the remote plasma source. The method includes supplying one or more cooling fluids to one or more cooling conduits coupled with the remote plasma source.
    Type: Grant
    Filed: January 4, 2017
    Date of Patent: August 25, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Sidharth Bhatia, Zhili Zuo, Hidehiro Kojiri, Anjana M. Patel, Song-Moon Suh, Ganesh Balasubramanian
  • Publication number: 20200264335
    Abstract: Methods, systems, and non-transitory computer readable medium are described for sensor metrology data integration. A method includes receiving sets of sensor data and sets of metrology data. Each set of sensor data includes corresponding sensor values associated with producing corresponding product by manufacturing equipment and a corresponding sensor data identifier. Each set of metrology data includes corresponding metrology values associated with the corresponding product manufactured by the manufacturing equipment and a corresponding metrology data identifier. The method further includes determining common portions between each corresponding sensor data identifier and each corresponding metrology data identifier. The method further includes, for each of the sensor-metrology matches, generating a corresponding set of aggregated sensor-metrology data and storing the sets of aggregated sensor-metrology data to train a machine learning model.
    Type: Application
    Filed: February 14, 2020
    Publication date: August 20, 2020
    Inventors: Sidharth Bhatia, Garrett H. Sin, Heng-Cheng Pai, Pramod Nambiar, Ganesh Balasubramanian, Irfan Jamil