Patents by Inventor Ganesh Kumar

Ganesh Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • PYRAZOLOCHALCONES AS POTENTIAL ANTICANCER AGENTS
    Publication number: 20160207888
    Abstract: The present invention relates to a pyrazolochalcone of formula A useful as potential antitumor agent against human cancer cell lines and a process for the preparation thereof. Formula A wherein, R1, R2, R3, R4, R5=H, Cl, F, CH3, OCH3, 3,4(OCH2O) X=H, Cl, CH3, OCH3, 3,4(OCH2O), NH2, NO2, OH, dotted line indicates optionally cyclic structure.
    Type: Application
    Filed: December 16, 2013
    Publication date: July 21, 2016
    Inventors: Ahmed KAMAL, Shaik Anver BASHA, Gajjela Bharath KUMAR, Vangala Santhosh REDDY, Chityal Ganesh KUMAR
  • LOW OVERHEAD HIERARCHICAL CONNECTIVITY OF CACHE COHERENT AGENTS TO A COHERENT FABRIC
    Publication number: 20160188469
    Abstract: In an example, a system-on-a-chip comprises a plurality of multi-core processors, such as four dual-core processors for eight total cores. Each of the processors connects to shared resources such as memory and peripherals via a shared uncore fabric. Because each input bus for each core can include hundreds of data lines, the number of lines into the shared uncore fabric can become prohibitive. Thus, inputs from each core are multiplexed, such as in a two-to-one configuration. The multiplexing may be a non-blocking, queued (such as FIFO) multiplexing to ensure that all packets from all cores are delivered to the uncore fabric. In certain embodiment, some smaller input lines may be provided to the uncore fabric non-multiplexed, and returns (outputs) from the uncore fabric to the cores may also be non-multiplexed.
    Type: Application
    Filed: December 27, 2014
    Publication date: June 30, 2016
    Inventors: Ramadass Nagarajan, Jose S. Niell, Michael T. Klinglesmith, Derek T. Bachand, Ganesh Kumar
  • Portable, Liquid Free, Electroless, Electrochemical Deposition of Metal on Conductive and Nonconductive Surfaces
    Publication number: 20160177463
    Abstract: Electroless plating is accomplished by forming a metal salt and a polymer solution as a binder into a solid electrolyte block and depositing metal on the surface by rubbing or brushing the solid electrolyte block onto a surface with minimal or no water and without an electric potential/power source. The solid electrolyte block is also conformable/moldable and can be used to deposit metal on to both conductive and nonconductive surface through electroless deposition process.
    Type: Application
    Filed: March 12, 2015
    Publication date: June 23, 2016
    Inventors: Ganesh Kumar Arumugam, Ashavani Kumar, Vinod P. Veedu, Sumil Thapa
  • Fine art samples
    Patent number: 9349139
    Abstract: Methods and systems for selecting and shipping an art sample that will degrade after a pre-defined period of time are provided. A user can request an art sample while browsing for items associated with an electronic marketplace. The art sample, which can be a lower quality replica of an original art piece, may be printed utilizing a printing technique which results in the art sample degrading after a pre-defined period of time. The art sample may then be shipped to the user to aid in determining whether to purchase the original art piece by utilizing the art sample to visualize the potential purchase in the user's own viewing space.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: May 24, 2016
    Assignee: Amazon Technologies, Inc.
    Inventors: Ganesh Kumar Gella, Ramiah Kandasamy, Kosar Akram Jaff
  • Predictive and reactive control of secondary side synchronous rectifiers in forward converters
    Patent number: 9270190
    Abstract: A forward converter has a primary side containing a PWM controller for controlling switching of a power switch and has a secondary side coupled to the primary side via a transformer. The secondary side includes a forward transistor and a catch transistor. A secondary side switch controller controls switching of the forward transistor and the catch transistor without communication from the primary side. The secondary side switch controller detects the rising and falling of the voltages at the ends of the secondary winding to control the switching of the forward and catch transistors. A delay locked loop (DLL) is provided in the secondary side switch controller that turns on the catch transistor when the power switch is turned off and turns off the catch transistor at a predetermined time before the power switch is turned on. A separate circuit controls the catch transistor during a discontinuous mode.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: February 23, 2016
    Assignee: Linear Technology Corporation
    Inventor: Niranjan Ganesh Kumar
  • PROCESS FOR THE PREPARATION OF POLYMERIC BIOSURFACTANTS
    Publication number: 20150322173
    Abstract: The present invention relates to polymeric biosurfactants isolated from two bacterial strains of Microbacterium sp. strain BS-2 [MTCC 5822] and Brevibacillus sp. strain BS-207 [MTCC 5823]. The present invention relates to an acidic exopolysaccharide (EPS), termed Microsan, with chemical composition of glucose, mannose and glucuronic acid (?-D-glucuronyl-(1-2)-D-mannosyl-(1-4)-D-glucose) produced by Microbacterium sp. strain BS-2 and a neutral EPS, termed Brevisan, of galactomannan with galactose and mannose residues in the ratio of 1:1 produced by Brevibacillus sp. strain BS-207. Both these polysaccharides exhibited surface-active and potential antibacterial, antioxidant, anti-inflammatory, and immunomodulatory activities.
    Type: Application
    Filed: April 1, 2015
    Publication date: November 12, 2015
    Inventors: Chityal Ganesh KUMAR, Sujitha POMBALA
  • Directory cache supporting non-atomic input/output operations
    Patent number: 9170946
    Abstract: Responsive to receiving a write request for a cache line from an input/output device, a caching agent of a first processor determines that the cache line is managed by a home agent of a second processor. The caching agent sends an ownership request for the cache line to the second processor. A home agent of the second processor receives the ownership request, generates an entry in a directory cache for the cache line, the entry identifying the remote caching agent as having ownership of the cache line, and grants ownership of the cache line to the remote caching agent. Responsive to receiving the grant of ownership for the cache line from the home agent an input/output controller of the first processor adds an entry for the cache line to an input/output write cache, the entry comprising a first indicator that the cache line is managed by the home agent of the second processor.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: October 27, 2015
    Assignee: Intel Corporation
    Inventors: Herbert H. Hum, James R. Vash, Eric A. Gouldey, Ganesh Kumar, David Bubien, Manoj K. Arora, Luke Chang, Lavanya Nama, Mahak Gupta
  • PORTABLE INTELLIGENT CONTROLLING SYSTEM FOR MACHINES
    Publication number: 20150293528
    Abstract: A portable plug-and-play intelligent system for monitoring and controlling process variations of a workpiece of a machine is provided. The portable plug-and-play intelligent system includes one or more sensors, a controller, a work piece, a plug & play modular fixture with a motor, a database, a comparison unit, and a control unit. The one or more sensors collect real-time data of the workpiece from the machine. The controller processes the real-time data collected from the one or more sensors. The database stores the processed real-time data. The comparison unit compares the real-time data of the workpiece with predefined specifications of the workpiece to check whether the real-time data is accurate or not. The control unit triggers the motor to allow the plug-and-play modular fixture to adjust the parameter variables of the machine to the predefined specifications of the workpiece when the real-time data is not accurate.
    Type: Application
    Filed: July 17, 2014
    Publication date: October 15, 2015
    Inventors: Ganesh Kumar Nithyanandam, Radhakrishnan Pezhinkattil
  • Isolated bacterial strain of sp. MTCC 5605 and a highly enantioselective epoxide hydrolase isolated therefrom
    Patent number: 9150840
    Abstract: The present invention relates to a novel epoxide hydrolase enzyme which aims to achieve a high degree of resolution towards a broader range of substrates with high enantioselectivity and yields with minimal product inhibition. The invention further relates to a new bacterial strain Achromobacter sp. MTCC 5605 isolated from a petroleum-contaminated sludge sample, capable of producing the said enzyme. It is notable that the enzyme can be used as whole bacterial cell preparation, which allows continuous hydrolysis of substrates at even higher concentration and have an advantage of being recycled. The invention further relates to a process for the hydrolysis of different aryl epoxides which are potential synthons of intermediates for the synthesis of chiral amino alcohols and bioactive compounds like ?-blockers.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: October 6, 2015
    Assignee: COUNCIL OF SCIENTIFIC & INDUSTRIAL RESEARCH
    Inventors: Ahmed Kamal, Rohini Khanna, Chityal Ganesh Kumar, Anver Basha Shaik, Matam Shiva Kumar
  • PREDICTIVE AND REACTIVE CONTROL OF SECONDARY SIDE SYNCHRONOUS RECTIFIERS IN FORWARD CONVERTERS
    Publication number: 20150207423
    Abstract: A forward converter has a primary side containing a PWM controller for controlling switching of a power switch and has a secondary side coupled to the primary side via a transformer. The secondary side includes a forward transistor and a catch transistor. A secondary side switch controller controls switching of the forward transistor and the catch transistor without communication from the primary side. The secondary side switch controller detects the rising and falling of the voltages at the ends of the secondary winding to control the switching of the forward and catch transistors. A delay locked loop (DLL) is provided in the secondary side switch controller that turns on the catch transistor when the power switch is turned off and turns off the catch transistor at a predetermined time before the power switch is turned on. A separate circuit controls the catch transistor during a discontinuous mode.
    Type: Application
    Filed: January 22, 2014
    Publication date: July 23, 2015
    Applicant: Linear Technology Corporation
    Inventor: Niranjan Ganesh Kumar
  • Disk storage system with rebuild sequence and method of operation thereof
    Patent number: 9087019
    Abstract: A method of operation of a disk storage system includes: providing a disk storage controller; coupling a first physical disk to the disk storage controller; detecting a failure of the first physical disk; and rebuilding a first logical drive, after replacing the first physical disk, includes: selecting a selected stripe of the first logical drive, reading a selected stripe status of the selected stripe, and marking the selected stripe as on-line in the selected stripe status.
    Type: Grant
    Filed: January 27, 2012
    Date of Patent: July 21, 2015
    Assignee: Promise Technology, Inc.
    Inventors: Raghuraman Govindasamy, Mohan B. Rowlands, Ganesh Kumar
  • TRANSGENIC PLANTS WITH ENHANCED AGRONOMIC TRAITS
    Publication number: 20150197764
    Abstract: This invention provides transgenic plant cells with recombinant DNA for expression of proteins that are useful for imparting enhanced agronomic trait(s) to transgenic crop plants. This invention also provides transgenic plants and progeny seed comprising the transgenic plant cells where the plants are selected for having an enhanced trait selected from the group of traits consisting of enhanced water use efficiency, enhanced cold tolerance, increased yield, enhanced nitrogen use efficiency, enhanced seed protein and enhanced seed oil. Also disclosed are methods for manufacturing transgenic seed and plants with enhanced trait.
    Type: Application
    Filed: February 26, 2015
    Publication date: July 16, 2015
    Applicant: MONSANTO TECHNOLOGY LLC
    Inventors: Eric D. Aasen, Mark Scott Abad, Edwards Allen, Thandoni Rao Ambika, Veena S. Anil, Alice Clara Augustine, Stephanie L. Back, Pranesh Badami, Amarjit Basra, Kraig L. Brustad, Molian Deng, Todd Dezwaan, Charles Dietrich, Stephen M. Duff, Karen K. Gabbert, Steve He, Bill L. Hendrix, Hongwu Jia, Vidya Kammaradi Ramanath Bhat, Balasulojini Karunanandaa, Kevin R. Kosola, Kempagangaiah Krishnamurthy, Ganesh Kumar, Saritha V. Kuriakose, Shantala Lakkanna, Mark E. Leibman, Linda Lutfiyya, Savitha Madappa, Sivalinganna Manjunath, Robert J. Meister, Bellur Narasimha Prasad, Sasha Preuss, Qungang Qi, Dhanalakshmi Ramachandra, Aniruddha Raychaudhuri, S. Sangeetha, Scott Saracco, Chitresh Sharma, Vijay K. Sharma, Rajani Monnanda Somaiah, Padmini Sudarshana, Rebecca L. Thompson-Mize, Srikanth Venkatachalayya, Tyamagondlu V. Venkatesh, Huai Wang, Jingrui Wu, Xiaoyun Wu, Xiaofeng Sean Yang, Qin Zeng, Jianmin Zhao
  • Apparatus and method for partial memory mirroring
    Patent number: 9037903
    Abstract: An apparatus and method are described for performing partial memory mirroring operations. For example, one embodiment of a processor comprises: a processor core for generating a read or write transaction having a system memory address; a home agent identified to service the read or write transaction based on the system memory address; one or more target address decoders (TADs) associated with the home agent to determine whether the system memory address is within a mirrored memory region or a non-mirrored memory region, wherein: if the system memory address is within a mirrored memory region, then the one or more TADs identifying multiple mirrored memory channels for the read or write transaction; and if the system memory address is not within a mirrored memory region, then the one or more TADs identifying a single memory channel for the read or write transaction.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: May 19, 2015
    Assignee: Intel Corporation
    Inventors: Herbert H Hum, Ganesh Kumar, Robert C Swanson, David Bubien
  • System and Method for Visitor Guidance and Registration Using Digital Locations
    Publication number: 20150111536
    Abstract: A system including a smartphone or tablet of a visiting user accessing a web site and security system of a visited person, the security system having a secured area with the visited person located at a predetermined location within the secured area, the web site downloading an initial geographical location of the visiting user from the smartphone or tablet of the visiting user, a processor of the web site generating and sending a map to the smartphone or tablet based upon the downloaded initial geographic location of the visiting user and the predetermined location of the visited person, the smartphone or table displaying the generated map on a display of the smartphone or tablet guiding the visiting user from the initial location of the visiting user to the predetermined location of the visited person and the processor of the website dynamically updating the map displayed on the smartphone or tablet.
    Type: Application
    Filed: October 22, 2013
    Publication date: April 23, 2015
    Applicant: Honeywell International Inc.
    Inventors: K. Naga SUNDAR, N. Ganesh Kumar, B. S. Balaji, Vinoth Dharmalingam
  • Systems, methods, and apparatus for predicting impact on a pipeline delivery infrastructure
    Patent number: 8938379
    Abstract: Certain embodiments of the invention may include systems, methods, and apparatus for predicting impact on a pipeline delivery infrastructure. According to an example embodiment of the invention, a method is provided that can include simulating a pipeline delivery infrastructure; identifying one or more sections in the infrastructure; and forecasting an impact of the infrastructure based on one or more modifications to the infrastructure or on one or more new demand points wherein the forecasting comprises estimating pressures in each of identified one or more sections.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: January 20, 2015
    Assignee: General Electric Company
    Inventors: Kavitha Andoji, Uday Kumar Dubasi, Ganesh Kumar Somesula
  • Virtual port world wide names
    Patent number: 8929252
    Abstract: A network switch allows defining a virtual port worldwide name (VPWWN) and associating the VPWWN with an F_port of the network switch, for use by a host bus adaptor (HBA) connecting to the network switch. Both a default and a user VPWWN may be defined, with the user VPWWN typically taking precedence over the default VPWWN. A database of VPWWN associations may be used to ensure uniqueness of the user VPWWN. Where the HBA allows dynamic assignment of WWNs, the VPWWN may be pushed to the HBA. The VPWWNs may be deleted, and moved to another port as desired.
    Type: Grant
    Filed: June 3, 2014
    Date of Patent: January 6, 2015
    Assignee: Brocade Communications Systems, Inc.
    Inventors: Srikara Subramanyan, Badrinath Kollu, Ganesh Kumar Murugesan, Nhan Trong Pham, Sathish Kumar Gnanasekaran, Nadeem Kattangere, Vinodh Ravindran, Vidya Renganarayanan Vineet, Vidya Sagar Ravipati, Blayne Rawsky
  • Value exchange system for use within an internet-based social network
    Patent number: 8849714
    Abstract: Certain embodiments contemplate a computer-implemented method of enabling a value exchange between users of a SNS which functions within the confines of the SNS. Certain embodiments comprise an application which creates at least an interface to the value exchange system, a means for registration to enable users to register with the value exchange system, a means for receiving at the value exchange system, a value exchange transaction between a first user and a second user, wherein the users are members of a same internet-based social network and the value exchange system makes use of the internet-based social network account identifiers of the respective users to enable the communication of value exchange transactions between the users. The application may also create a value exchange means for debiting from or crediting to the value exchange system account of first and second users.
    Type: Grant
    Filed: August 13, 2010
    Date of Patent: September 30, 2014
    Assignee: MOL AccessPortal Sdn. Bhd
    Inventors: Ganesh Kumar Bangah, Tjen Tseng Siew
  • Virtual Port World Wide Names
    Publication number: 20140286194
    Abstract: A network switch allows defining a virtual port worldwide name (VPWWN) and associating the VPWWN with an F_port of the network switch, for use by a host bus adaptor (HBA) connecting to the network switch. Both a default and a user VPWWN may be defined, with the user VPWWN typically taking precedence over the default VPWWN. A database of VPWWN associations may be used to ensure uniqueness of the user VPWWN. Where the HBA allows dynamic assignment of WWNs, the VPWWN may be pushed to the HBA. The VPWWNs may be deleted, and moved to another port as desired.
    Type: Application
    Filed: June 3, 2014
    Publication date: September 25, 2014
    Applicant: Brocade Communications Systems, Inc.
    Inventors: Srikara Subramanyan, Badrinath Kollu, Ganesh Kumar Murugesan, Nhan Trong Pham, Sathish Kumar Gnanasekaran, Nadeem Kattangere, Vinodh Ravindran, Vidya Renganarayanan Vineet, Vidya Sagar Ravipati, Blayne Rawsky
  • MECHANISM TO IMPROVE INPUT/OUTPUT WRITE BANDWIDTH IN SCALABLE SYSTEMS UTILIZING DIRECTORY BASED COHERECY
    Publication number: 20140281270
    Abstract: Methods and apparatus relating to directory based coherency to improve input/output write bandwidth in scalable systems are described. In one embodiment, a first agent receives a request to write data from a second agent via a link and logic causes the first agent to write the directory state to an Input/Output Directory Cache (IODC) of the first agent. Additionally, the logic causes the second agent to send data from a modified state to an exclusive state using write back to the first agent, while allowing the data to remain cached exclusively in the second agent and also enabling the deallocation of the IODC entry in the first agent. Other embodiments are also disclosed.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Inventors: Henk G. Neefs, Ganesh Kumar, Vedaraman Geetha, Jeffrey D. Chamberlain, Sailesh Kottapalli, Jeffrey S. Wilder
  • TRANSGENIC PLANTS WITH ENHANCED TRAITS AND METHODS OF PRODUCING THEREOF
    Publication number: 20140259224
    Abstract: The present disclosure provides methods of producing a plant that exhibits an enhanced trait selected from the group consisting of altered hexose sugar level, altered starch level, altered sucrose phosphate synthase activity, altered ureide level and delayed senescence, as compared to a control plant. The present disclosure also provides transgenic cells, plants, plant parts, seeds, progeny plants, products or commodity products produced by this method.
    Type: Application
    Filed: March 21, 2012
    Publication date: September 11, 2014
    Applicants: BASF PLANT SCIENCE COMPANY GMBH, MONSANTO TECHNOLOGY L.L.C.
    Inventors: Nicole Christiansen, Stefan Henkes, Ganesh Kumar, Amanda McClerren, Robert Meister, Marie Petracek, Sasha Preuss, Richard Trethewey, Qingzhang Xu